X86TargetMachine.cpp revision 218893
1139743Simp//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 243412Snewton// 343412Snewton// The LLVM Compiler Infrastructure 443412Snewton// 543412Snewton// This file is distributed under the University of Illinois Open Source 643412Snewton// License. See LICENSE.TXT for details. 743412Snewton// 843412Snewton//===----------------------------------------------------------------------===// 943412Snewton// 1043412Snewton// This file defines the X86 specific subclass of TargetMachine. 1143412Snewton// 1243412Snewton//===----------------------------------------------------------------------===// 1343412Snewton 1443412Snewton#include "X86MCAsmInfo.h" 1543412Snewton#include "X86TargetMachine.h" 1643412Snewton#include "X86.h" 1743412Snewton#include "llvm/PassManager.h" 1843412Snewton#include "llvm/CodeGen/MachineFunction.h" 1943412Snewton#include "llvm/CodeGen/Passes.h" 2043412Snewton#include "llvm/MC/MCCodeEmitter.h" 2143412Snewton#include "llvm/MC/MCStreamer.h" 2243412Snewton#include "llvm/Support/FormattedStream.h" 2343412Snewton#include "llvm/Target/TargetOptions.h" 2443412Snewton#include "llvm/Target/TargetRegistry.h" 2543412Snewtonusing namespace llvm; 2643412Snewton 2749267Snewtonstatic MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { 2850477Speter Triple TheTriple(TT); 2943412Snewton switch (TheTriple.getOS()) { 3043412Snewton case Triple::Darwin: 3143412Snewton return new X86MCAsmInfoDarwin(TheTriple); 3243412Snewton case Triple::MinGW32: 3343412Snewton case Triple::Cygwin: 3443412Snewton case Triple::Win32: 3543412Snewton if (TheTriple.getEnvironment() == Triple::MachO) 3643412Snewton return new X86MCAsmInfoDarwin(TheTriple); 3743412Snewton else 3843412Snewton return new X86MCAsmInfoCOFF(TheTriple); 3943412Snewton default: 4043412Snewton return new X86ELFMCAsmInfo(TheTriple); 4143412Snewton } 4243412Snewton} 4343412Snewton 4443412Snewtonstatic MCStreamer *createMCStreamer(const Target &T, const std::string &TT, 4543412Snewton MCContext &Ctx, TargetAsmBackend &TAB, 4643412Snewton raw_ostream &_OS, 4743412Snewton MCCodeEmitter *_Emitter, 48 bool RelaxAll, 49 bool NoExecStack) { 50 Triple TheTriple(TT); 51 switch (TheTriple.getOS()) { 52 case Triple::Darwin: 53 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll); 54 case Triple::MinGW32: 55 case Triple::Cygwin: 56 case Triple::Win32: 57 if (TheTriple.getEnvironment() == Triple::MachO) 58 return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll); 59 else 60 return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll); 61 default: 62 return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll, NoExecStack); 63 } 64} 65 66extern "C" void LLVMInitializeX86Target() { 67 // Register the target. 68 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target); 69 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); 70 71 // Register the target asm info. 72 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo); 73 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo); 74 75 // Register the code emitter. 76 TargetRegistry::RegisterCodeEmitter(TheX86_32Target, 77 createX86_32MCCodeEmitter); 78 TargetRegistry::RegisterCodeEmitter(TheX86_64Target, 79 createX86_64MCCodeEmitter); 80 81 // Register the asm backend. 82 TargetRegistry::RegisterAsmBackend(TheX86_32Target, 83 createX86_32AsmBackend); 84 TargetRegistry::RegisterAsmBackend(TheX86_64Target, 85 createX86_64AsmBackend); 86 87 // Register the object streamer. 88 TargetRegistry::RegisterObjectStreamer(TheX86_32Target, 89 createMCStreamer); 90 TargetRegistry::RegisterObjectStreamer(TheX86_64Target, 91 createMCStreamer); 92} 93 94 95X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT, 96 const std::string &FS) 97 : X86TargetMachine(T, TT, FS, false), 98 DataLayout(getSubtargetImpl()->isTargetDarwin() ? 99 "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" : 100 (getSubtargetImpl()->isTargetCygMing() || 101 getSubtargetImpl()->isTargetWindows()) ? 102 "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" : 103 "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"), 104 InstrInfo(*this), 105 TSInfo(*this), 106 TLInfo(*this), 107 JITInfo(*this) { 108} 109 110 111X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, 112 const std::string &FS) 113 : X86TargetMachine(T, TT, FS, true), 114 DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"), 115 InstrInfo(*this), 116 TSInfo(*this), 117 TLInfo(*this), 118 JITInfo(*this) { 119} 120 121/// X86TargetMachine ctor - Create an X86 target. 122/// 123X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, 124 const std::string &FS, bool is64Bit) 125 : LLVMTargetMachine(T, TT), 126 Subtarget(TT, FS, is64Bit), 127 FrameLowering(*this, Subtarget), 128 ELFWriterInfo(is64Bit, true) { 129 DefRelocModel = getRelocationModel(); 130 131 // If no relocation model was picked, default as appropriate for the target. 132 if (getRelocationModel() == Reloc::Default) { 133 // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode. 134 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we 135 // use static relocation model by default. 136 if (Subtarget.isTargetDarwin()) { 137 if (Subtarget.is64Bit()) 138 setRelocationModel(Reloc::PIC_); 139 else 140 setRelocationModel(Reloc::DynamicNoPIC); 141 } else if (Subtarget.isTargetWin64()) 142 setRelocationModel(Reloc::PIC_); 143 else 144 setRelocationModel(Reloc::Static); 145 } 146 147 assert(getRelocationModel() != Reloc::Default && 148 "Relocation mode not picked"); 149 150 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC 151 // is defined as a model for code which may be used in static or dynamic 152 // executables but not necessarily a shared library. On X86-32 we just 153 // compile in -static mode, in x86-64 we use PIC. 154 if (getRelocationModel() == Reloc::DynamicNoPIC) { 155 if (is64Bit) 156 setRelocationModel(Reloc::PIC_); 157 else if (!Subtarget.isTargetDarwin()) 158 setRelocationModel(Reloc::Static); 159 } 160 161 // If we are on Darwin, disallow static relocation model in X86-64 mode, since 162 // the Mach-O file format doesn't support it. 163 if (getRelocationModel() == Reloc::Static && 164 Subtarget.isTargetDarwin() && 165 is64Bit) 166 setRelocationModel(Reloc::PIC_); 167 168 // Determine the PICStyle based on the target selected. 169 if (getRelocationModel() == Reloc::Static) { 170 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None. 171 Subtarget.setPICStyle(PICStyles::None); 172 } else if (Subtarget.is64Bit()) { 173 // PIC in 64 bit mode is always rip-rel. 174 Subtarget.setPICStyle(PICStyles::RIPRel); 175 } else if (Subtarget.isTargetCygMing()) { 176 Subtarget.setPICStyle(PICStyles::None); 177 } else if (Subtarget.isTargetDarwin()) { 178 if (getRelocationModel() == Reloc::PIC_) 179 Subtarget.setPICStyle(PICStyles::StubPIC); 180 else { 181 assert(getRelocationModel() == Reloc::DynamicNoPIC); 182 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC); 183 } 184 } else if (Subtarget.isTargetELF()) { 185 Subtarget.setPICStyle(PICStyles::GOT); 186 } 187 188 // Finally, if we have "none" as our PIC style, force to static mode. 189 if (Subtarget.getPICStyle() == PICStyles::None) 190 setRelocationModel(Reloc::Static); 191} 192 193//===----------------------------------------------------------------------===// 194// Pass Pipeline Configuration 195//===----------------------------------------------------------------------===// 196 197bool X86TargetMachine::addInstSelector(PassManagerBase &PM, 198 CodeGenOpt::Level OptLevel) { 199 // Install an instruction selector. 200 PM.add(createX86ISelDag(*this, OptLevel)); 201 202 // For 32-bit, prepend instructions to set the "global base reg" for PIC. 203 if (!Subtarget.is64Bit()) 204 PM.add(createGlobalBaseRegPass()); 205 206 return false; 207} 208 209bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, 210 CodeGenOpt::Level OptLevel) { 211 PM.add(createX86MaxStackAlignmentHeuristicPass()); 212 return false; // -print-machineinstr shouldn't print after this. 213} 214 215bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, 216 CodeGenOpt::Level OptLevel) { 217 PM.add(createX86FloatingPointStackifierPass()); 218 return true; // -print-machineinstr should print after this. 219} 220 221bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM, 222 CodeGenOpt::Level OptLevel) { 223 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) { 224 PM.add(createSSEDomainFixPass()); 225 return true; 226 } 227 return false; 228} 229 230bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 231 CodeGenOpt::Level OptLevel, 232 JITCodeEmitter &JCE) { 233 // FIXME: Move this to TargetJITInfo! 234 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 235 if (DefRelocModel == Reloc::Default && 236 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 237 setRelocationModel(Reloc::Static); 238 Subtarget.setPICStyle(PICStyles::None); 239 } 240 241 242 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 243 244 return false; 245} 246 247void X86TargetMachine::setCodeModelForStatic() { 248 249 if (getCodeModel() != CodeModel::Default) return; 250 251 // For static codegen, if we're not already set, use Small codegen. 252 setCodeModel(CodeModel::Small); 253} 254 255 256void X86TargetMachine::setCodeModelForJIT() { 257 258 if (getCodeModel() != CodeModel::Default) return; 259 260 // 64-bit JIT places everything in the same buffer except external functions. 261 if (Subtarget.is64Bit()) 262 setCodeModel(CodeModel::Large); 263 else 264 setCodeModel(CodeModel::Small); 265} 266