X86TargetMachine.cpp revision 207618
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86 specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86MCAsmInfo.h" 15#include "X86TargetMachine.h" 16#include "X86.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Support/FormattedStream.h" 21#include "llvm/Target/TargetOptions.h" 22#include "llvm/Target/TargetRegistry.h" 23#include "llvm/Support/CommandLine.h" 24 25using namespace llvm; 26 27static cl::opt<bool> DisableSSEDomain("disable-sse-domain", 28 cl::init(false), cl::Hidden, 29 cl::desc("Disable SSE Domain Fixing")); 30 31static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { 32 Triple TheTriple(TT); 33 switch (TheTriple.getOS()) { 34 case Triple::Darwin: 35 return new X86MCAsmInfoDarwin(TheTriple); 36 case Triple::MinGW32: 37 case Triple::MinGW64: 38 case Triple::Cygwin: 39 case Triple::Win32: 40 return new X86MCAsmInfoCOFF(TheTriple); 41 default: 42 return new X86ELFMCAsmInfo(TheTriple); 43 } 44} 45 46extern "C" void LLVMInitializeX86Target() { 47 // Register the target. 48 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target); 49 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); 50 51 // Register the target asm info. 52 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo); 53 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo); 54 55 // Register the code emitter. 56 TargetRegistry::RegisterCodeEmitter(TheX86_32Target, 57 createX86_32MCCodeEmitter); 58 TargetRegistry::RegisterCodeEmitter(TheX86_64Target, 59 createX86_64MCCodeEmitter); 60 61 // Register the asm backend. 62 TargetRegistry::RegisterAsmBackend(TheX86_32Target, 63 createX86_32AsmBackend); 64 TargetRegistry::RegisterAsmBackend(TheX86_64Target, 65 createX86_64AsmBackend); 66} 67 68 69X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT, 70 const std::string &FS) 71 : X86TargetMachine(T, TT, FS, false) { 72} 73 74 75X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, 76 const std::string &FS) 77 : X86TargetMachine(T, TT, FS, true) { 78} 79 80/// X86TargetMachine ctor - Create an X86 target. 81/// 82X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, 83 const std::string &FS, bool is64Bit) 84 : LLVMTargetMachine(T, TT), 85 Subtarget(TT, FS, is64Bit), 86 DataLayout(Subtarget.getDataLayout()), 87 FrameInfo(TargetFrameInfo::StackGrowsDown, 88 Subtarget.getStackAlignment(), 89 (Subtarget.isTargetWin64() ? -40 : 90 (Subtarget.is64Bit() ? -8 : -4))), 91 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) { 92 DefRelocModel = getRelocationModel(); 93 94 // If no relocation model was picked, default as appropriate for the target. 95 if (getRelocationModel() == Reloc::Default) { 96 if (!Subtarget.isTargetDarwin()) 97 setRelocationModel(Reloc::Static); 98 else if (Subtarget.is64Bit()) 99 setRelocationModel(Reloc::PIC_); 100 else 101 setRelocationModel(Reloc::DynamicNoPIC); 102 } 103 104 assert(getRelocationModel() != Reloc::Default && 105 "Relocation mode not picked"); 106 107 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC 108 // is defined as a model for code which may be used in static or dynamic 109 // executables but not necessarily a shared library. On X86-32 we just 110 // compile in -static mode, in x86-64 we use PIC. 111 if (getRelocationModel() == Reloc::DynamicNoPIC) { 112 if (is64Bit) 113 setRelocationModel(Reloc::PIC_); 114 else if (!Subtarget.isTargetDarwin()) 115 setRelocationModel(Reloc::Static); 116 } 117 118 // If we are on Darwin, disallow static relocation model in X86-64 mode, since 119 // the Mach-O file format doesn't support it. 120 if (getRelocationModel() == Reloc::Static && 121 Subtarget.isTargetDarwin() && 122 is64Bit) 123 setRelocationModel(Reloc::PIC_); 124 125 // Determine the PICStyle based on the target selected. 126 if (getRelocationModel() == Reloc::Static) { 127 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None. 128 Subtarget.setPICStyle(PICStyles::None); 129 } else if (Subtarget.isTargetCygMing()) { 130 Subtarget.setPICStyle(PICStyles::None); 131 } else if (Subtarget.isTargetDarwin()) { 132 if (Subtarget.is64Bit()) 133 Subtarget.setPICStyle(PICStyles::RIPRel); 134 else if (getRelocationModel() == Reloc::PIC_) 135 Subtarget.setPICStyle(PICStyles::StubPIC); 136 else { 137 assert(getRelocationModel() == Reloc::DynamicNoPIC); 138 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC); 139 } 140 } else if (Subtarget.isTargetELF()) { 141 if (Subtarget.is64Bit()) 142 Subtarget.setPICStyle(PICStyles::RIPRel); 143 else 144 Subtarget.setPICStyle(PICStyles::GOT); 145 } 146 147 // Finally, if we have "none" as our PIC style, force to static mode. 148 if (Subtarget.getPICStyle() == PICStyles::None) 149 setRelocationModel(Reloc::Static); 150} 151 152//===----------------------------------------------------------------------===// 153// Pass Pipeline Configuration 154//===----------------------------------------------------------------------===// 155 156bool X86TargetMachine::addInstSelector(PassManagerBase &PM, 157 CodeGenOpt::Level OptLevel) { 158 // Install an instruction selector. 159 PM.add(createX86ISelDag(*this, OptLevel)); 160 161 // Install a pass to insert x87 FP_REG_KILL instructions, as needed. 162 PM.add(createX87FPRegKillInserterPass()); 163 164 return false; 165} 166 167bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, 168 CodeGenOpt::Level OptLevel) { 169 PM.add(createX86MaxStackAlignmentHeuristicPass()); 170 return false; // -print-machineinstr shouldn't print after this. 171} 172 173bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, 174 CodeGenOpt::Level OptLevel) { 175 PM.add(createX86FloatingPointStackifierPass()); 176 return true; // -print-machineinstr should print after this. 177} 178 179bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM, 180 CodeGenOpt::Level OptLevel) { 181 if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2() && 182 !DisableSSEDomain) { 183 PM.add(createSSEDomainFixPass()); 184 return true; 185 } 186 return false; 187} 188 189bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 190 CodeGenOpt::Level OptLevel, 191 JITCodeEmitter &JCE) { 192 // FIXME: Move this to TargetJITInfo! 193 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 194 if (DefRelocModel == Reloc::Default && 195 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 196 setRelocationModel(Reloc::Static); 197 Subtarget.setPICStyle(PICStyles::None); 198 } 199 200 201 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 202 203 return false; 204} 205 206void X86TargetMachine::setCodeModelForStatic() { 207 208 if (getCodeModel() != CodeModel::Default) return; 209 210 // For static codegen, if we're not already set, use Small codegen. 211 setCodeModel(CodeModel::Small); 212} 213 214 215void X86TargetMachine::setCodeModelForJIT() { 216 217 if (getCodeModel() != CodeModel::Default) return; 218 219 // 64-bit JIT places everything in the same buffer except external functions. 220 if (Subtarget.is64Bit()) 221 setCodeModel(CodeModel::Large); 222 else 223 setCodeModel(CodeModel::Small); 224} 225