X86TargetMachine.cpp revision 204642
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86 specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86MCAsmInfo.h" 15#include "X86TargetMachine.h" 16#include "X86.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Support/FormattedStream.h" 21#include "llvm/Target/TargetOptions.h" 22#include "llvm/Target/TargetRegistry.h" 23using namespace llvm; 24 25static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { 26 Triple TheTriple(TT); 27 switch (TheTriple.getOS()) { 28 case Triple::Darwin: 29 return new X86MCAsmInfoDarwin(TheTriple); 30 case Triple::MinGW32: 31 case Triple::MinGW64: 32 case Triple::Cygwin: 33 case Triple::Win32: 34 return new X86MCAsmInfoCOFF(TheTriple); 35 default: 36 return new X86ELFMCAsmInfo(TheTriple); 37 } 38} 39 40extern "C" void LLVMInitializeX86Target() { 41 // Register the target. 42 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target); 43 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); 44 45 // Register the target asm info. 46 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo); 47 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo); 48 49 // Register the code emitter. 50 TargetRegistry::RegisterCodeEmitter(TheX86_32Target, 51 createX86_32MCCodeEmitter); 52 TargetRegistry::RegisterCodeEmitter(TheX86_64Target, 53 createX86_64MCCodeEmitter); 54 55 // Register the asm backend. 56 TargetRegistry::RegisterAsmBackend(TheX86_32Target, 57 createX86_32AsmBackend); 58 TargetRegistry::RegisterAsmBackend(TheX86_64Target, 59 createX86_64AsmBackend); 60} 61 62 63X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT, 64 const std::string &FS) 65 : X86TargetMachine(T, TT, FS, false) { 66} 67 68 69X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, 70 const std::string &FS) 71 : X86TargetMachine(T, TT, FS, true) { 72} 73 74/// X86TargetMachine ctor - Create an X86 target. 75/// 76X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, 77 const std::string &FS, bool is64Bit) 78 : LLVMTargetMachine(T, TT), 79 Subtarget(TT, FS, is64Bit), 80 DataLayout(Subtarget.getDataLayout()), 81 FrameInfo(TargetFrameInfo::StackGrowsDown, 82 Subtarget.getStackAlignment(), 83 (Subtarget.isTargetWin64() ? -40 : 84 (Subtarget.is64Bit() ? -8 : -4))), 85 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) { 86 DefRelocModel = getRelocationModel(); 87 88 // If no relocation model was picked, default as appropriate for the target. 89 if (getRelocationModel() == Reloc::Default) { 90 if (!Subtarget.isTargetDarwin()) 91 setRelocationModel(Reloc::Static); 92 else if (Subtarget.is64Bit()) 93 setRelocationModel(Reloc::PIC_); 94 else 95 setRelocationModel(Reloc::DynamicNoPIC); 96 } 97 98 assert(getRelocationModel() != Reloc::Default && 99 "Relocation mode not picked"); 100 101 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC 102 // is defined as a model for code which may be used in static or dynamic 103 // executables but not necessarily a shared library. On X86-32 we just 104 // compile in -static mode, in x86-64 we use PIC. 105 if (getRelocationModel() == Reloc::DynamicNoPIC) { 106 if (is64Bit) 107 setRelocationModel(Reloc::PIC_); 108 else if (!Subtarget.isTargetDarwin()) 109 setRelocationModel(Reloc::Static); 110 } 111 112 // If we are on Darwin, disallow static relocation model in X86-64 mode, since 113 // the Mach-O file format doesn't support it. 114 if (getRelocationModel() == Reloc::Static && 115 Subtarget.isTargetDarwin() && 116 is64Bit) 117 setRelocationModel(Reloc::PIC_); 118 119 // Determine the PICStyle based on the target selected. 120 if (getRelocationModel() == Reloc::Static) { 121 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None. 122 Subtarget.setPICStyle(PICStyles::None); 123 } else if (Subtarget.isTargetCygMing()) { 124 Subtarget.setPICStyle(PICStyles::None); 125 } else if (Subtarget.isTargetDarwin()) { 126 if (Subtarget.is64Bit()) 127 Subtarget.setPICStyle(PICStyles::RIPRel); 128 else if (getRelocationModel() == Reloc::PIC_) 129 Subtarget.setPICStyle(PICStyles::StubPIC); 130 else { 131 assert(getRelocationModel() == Reloc::DynamicNoPIC); 132 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC); 133 } 134 } else if (Subtarget.isTargetELF()) { 135 if (Subtarget.is64Bit()) 136 Subtarget.setPICStyle(PICStyles::RIPRel); 137 else 138 Subtarget.setPICStyle(PICStyles::GOT); 139 } 140 141 // Finally, if we have "none" as our PIC style, force to static mode. 142 if (Subtarget.getPICStyle() == PICStyles::None) 143 setRelocationModel(Reloc::Static); 144} 145 146//===----------------------------------------------------------------------===// 147// Pass Pipeline Configuration 148//===----------------------------------------------------------------------===// 149 150bool X86TargetMachine::addInstSelector(PassManagerBase &PM, 151 CodeGenOpt::Level OptLevel) { 152 // Install an instruction selector. 153 PM.add(createX86ISelDag(*this, OptLevel)); 154 155 // Install a pass to insert x87 FP_REG_KILL instructions, as needed. 156 PM.add(createX87FPRegKillInserterPass()); 157 158 return false; 159} 160 161bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, 162 CodeGenOpt::Level OptLevel) { 163 return false; // -print-machineinstr shouldn't print after this. 164} 165 166bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, 167 CodeGenOpt::Level OptLevel) { 168 PM.add(createX86FloatingPointStackifierPass()); 169 return true; // -print-machineinstr should print after this. 170} 171 172bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 173 CodeGenOpt::Level OptLevel, 174 JITCodeEmitter &JCE) { 175 // FIXME: Move this to TargetJITInfo! 176 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 177 if (DefRelocModel == Reloc::Default && 178 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 179 setRelocationModel(Reloc::Static); 180 Subtarget.setPICStyle(PICStyles::None); 181 } 182 183 184 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 185 186 return false; 187} 188 189void X86TargetMachine::setCodeModelForStatic() { 190 191 if (getCodeModel() != CodeModel::Default) return; 192 193 // For static codegen, if we're not already set, use Small codegen. 194 setCodeModel(CodeModel::Small); 195} 196 197 198void X86TargetMachine::setCodeModelForJIT() { 199 200 if (getCodeModel() != CodeModel::Default) return; 201 202 // 64-bit JIT places everything in the same buffer except external functions. 203 if (Subtarget.is64Bit()) 204 setCodeModel(CodeModel::Large); 205 else 206 setCodeModel(CodeModel::Small); 207} 208