X86TargetMachine.cpp revision 203954 
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the X86 specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86MCAsmInfo.h"
15#include "X86TargetMachine.h"
16#include "X86.h"
17#include "llvm/PassManager.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Support/FormattedStream.h"
21#include "llvm/Target/TargetOptions.h"
22#include "llvm/Target/TargetRegistry.h"
23using namespace llvm;
24
25static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
26  Triple TheTriple(TT);
27  switch (TheTriple.getOS()) {
28  case Triple::Darwin:
29    return new X86MCAsmInfoDarwin(TheTriple);
30  case Triple::MinGW32:
31  case Triple::MinGW64:
32  case Triple::Cygwin:
33  case Triple::Win32:
34    return new X86MCAsmInfoCOFF(TheTriple);
35  default:
36    return new X86ELFMCAsmInfo(TheTriple);
37  }
38}
39
40extern "C" void LLVMInitializeX86Target() {
41  // Register the target.
42  RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
43  RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
44
45  // Register the target asm info.
46  RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
47  RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
48
49  // Register the code emitter.
50  TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
51                                      createX86_32MCCodeEmitter);
52  TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
53                                      createX86_64MCCodeEmitter);
54}
55
56
57X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
58                                         const std::string &FS)
59  : X86TargetMachine(T, TT, FS, false) {
60}
61
62
63X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
64                                         const std::string &FS)
65  : X86TargetMachine(T, TT, FS, true) {
66}
67
68/// X86TargetMachine ctor - Create an X86 target.
69///
70X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
71                                   const std::string &FS, bool is64Bit)
72  : LLVMTargetMachine(T, TT),
73    Subtarget(TT, FS, is64Bit),
74    DataLayout(Subtarget.getDataLayout()),
75    FrameInfo(TargetFrameInfo::StackGrowsDown,
76              Subtarget.getStackAlignment(),
77              (Subtarget.isTargetWin64() ? -40 :
78               (Subtarget.is64Bit() ? -8 : -4))),
79    InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
80  DefRelocModel = getRelocationModel();
81
82  // If no relocation model was picked, default as appropriate for the target.
83  if (getRelocationModel() == Reloc::Default) {
84    if (!Subtarget.isTargetDarwin())
85      setRelocationModel(Reloc::Static);
86    else if (Subtarget.is64Bit())
87      setRelocationModel(Reloc::PIC_);
88    else
89      setRelocationModel(Reloc::DynamicNoPIC);
90  }
91
92  assert(getRelocationModel() != Reloc::Default &&
93         "Relocation mode not picked");
94
95  // ELF and X86-64 don't have a distinct DynamicNoPIC model.  DynamicNoPIC
96  // is defined as a model for code which may be used in static or dynamic
97  // executables but not necessarily a shared library. On X86-32 we just
98  // compile in -static mode, in x86-64 we use PIC.
99  if (getRelocationModel() == Reloc::DynamicNoPIC) {
100    if (is64Bit)
101      setRelocationModel(Reloc::PIC_);
102    else if (!Subtarget.isTargetDarwin())
103      setRelocationModel(Reloc::Static);
104  }
105
106  // If we are on Darwin, disallow static relocation model in X86-64 mode, since
107  // the Mach-O file format doesn't support it.
108  if (getRelocationModel() == Reloc::Static &&
109      Subtarget.isTargetDarwin() &&
110      is64Bit)
111    setRelocationModel(Reloc::PIC_);
112
113  // Determine the PICStyle based on the target selected.
114  if (getRelocationModel() == Reloc::Static) {
115    // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
116    Subtarget.setPICStyle(PICStyles::None);
117  } else if (Subtarget.isTargetCygMing()) {
118    Subtarget.setPICStyle(PICStyles::None);
119  } else if (Subtarget.isTargetDarwin()) {
120    if (Subtarget.is64Bit())
121      Subtarget.setPICStyle(PICStyles::RIPRel);
122    else if (getRelocationModel() == Reloc::PIC_)
123      Subtarget.setPICStyle(PICStyles::StubPIC);
124    else {
125      assert(getRelocationModel() == Reloc::DynamicNoPIC);
126      Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
127    }
128  } else if (Subtarget.isTargetELF()) {
129    if (Subtarget.is64Bit())
130      Subtarget.setPICStyle(PICStyles::RIPRel);
131    else
132      Subtarget.setPICStyle(PICStyles::GOT);
133  }
134
135  // Finally, if we have "none" as our PIC style, force to static mode.
136  if (Subtarget.getPICStyle() == PICStyles::None)
137    setRelocationModel(Reloc::Static);
138}
139
140//===----------------------------------------------------------------------===//
141// Pass Pipeline Configuration
142//===----------------------------------------------------------------------===//
143
144bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
145                                       CodeGenOpt::Level OptLevel) {
146  // Install an instruction selector.
147  PM.add(createX86ISelDag(*this, OptLevel));
148
149  // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
150  PM.add(createX87FPRegKillInserterPass());
151
152  return false;
153}
154
155bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
156                                      CodeGenOpt::Level OptLevel) {
157  return false;  // -print-machineinstr shouldn't print after this.
158}
159
160bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
161                                       CodeGenOpt::Level OptLevel) {
162  PM.add(createX86FloatingPointStackifierPass());
163  return true;  // -print-machineinstr should print after this.
164}
165
166bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
167                                      CodeGenOpt::Level OptLevel,
168                                      JITCodeEmitter &JCE) {
169  // FIXME: Move this to TargetJITInfo!
170  // On Darwin, do not override 64-bit setting made in X86TargetMachine().
171  if (DefRelocModel == Reloc::Default &&
172      (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
173    setRelocationModel(Reloc::Static);
174    Subtarget.setPICStyle(PICStyles::None);
175  }
176
177
178  PM.add(createX86JITCodeEmitterPass(*this, JCE));
179
180  return false;
181}
182
183void X86TargetMachine::setCodeModelForStatic() {
184
185    if (getCodeModel() != CodeModel::Default) return;
186
187    // For static codegen, if we're not already set, use Small codegen.
188    setCodeModel(CodeModel::Small);
189}
190
191
192void X86TargetMachine::setCodeModelForJIT() {
193
194  if (getCodeModel() != CodeModel::Default) return;
195
196  // 64-bit JIT places everything in the same buffer except external functions.
197  if (Subtarget.is64Bit())
198    setCodeModel(CodeModel::Large);
199  else
200    setCodeModel(CodeModel::Small);
201}
202