X86TargetMachine.cpp revision 201360 
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the X86 specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86MCAsmInfo.h"
15#include "X86TargetMachine.h"
16#include "X86.h"
17#include "llvm/PassManager.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Support/FormattedStream.h"
21#include "llvm/Target/TargetOptions.h"
22#include "llvm/Target/TargetRegistry.h"
23using namespace llvm;
24
25static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
26  Triple TheTriple(TT);
27  switch (TheTriple.getOS()) {
28  case Triple::Darwin:
29    return new X86MCAsmInfoDarwin(TheTriple);
30  case Triple::MinGW32:
31  case Triple::MinGW64:
32  case Triple::Cygwin:
33    return new X86MCAsmInfoCOFF(TheTriple);
34  case Triple::Win32:
35    return new X86WinMCAsmInfo(TheTriple);
36  default:
37    return new X86ELFMCAsmInfo(TheTriple);
38  }
39}
40
41extern "C" void LLVMInitializeX86Target() {
42  // Register the target.
43  RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
44  RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
45
46  // Register the target asm info.
47  RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
48  RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
49
50  // Register the code emitter.
51  TargetRegistry::RegisterCodeEmitter(TheX86_32Target, createX86MCCodeEmitter);
52  TargetRegistry::RegisterCodeEmitter(TheX86_64Target, createX86MCCodeEmitter);
53}
54
55
56X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
57                                         const std::string &FS)
58  : X86TargetMachine(T, TT, FS, false) {
59}
60
61
62X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
63                                         const std::string &FS)
64  : X86TargetMachine(T, TT, FS, true) {
65}
66
67/// X86TargetMachine ctor - Create an X86 target.
68///
69X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
70                                   const std::string &FS, bool is64Bit)
71  : LLVMTargetMachine(T, TT),
72    Subtarget(TT, FS, is64Bit),
73    DataLayout(Subtarget.getDataLayout()),
74    FrameInfo(TargetFrameInfo::StackGrowsDown,
75              Subtarget.getStackAlignment(),
76              (Subtarget.isTargetWin64() ? -40 :
77               (Subtarget.is64Bit() ? -8 : -4))),
78    InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
79  DefRelocModel = getRelocationModel();
80
81  // If no relocation model was picked, default as appropriate for the target.
82  if (getRelocationModel() == Reloc::Default) {
83    if (!Subtarget.isTargetDarwin())
84      setRelocationModel(Reloc::Static);
85    else if (Subtarget.is64Bit())
86      setRelocationModel(Reloc::PIC_);
87    else
88      setRelocationModel(Reloc::DynamicNoPIC);
89  }
90
91  assert(getRelocationModel() != Reloc::Default &&
92         "Relocation mode not picked");
93
94  // ELF and X86-64 don't have a distinct DynamicNoPIC model.  DynamicNoPIC
95  // is defined as a model for code which may be used in static or dynamic
96  // executables but not necessarily a shared library. On X86-32 we just
97  // compile in -static mode, in x86-64 we use PIC.
98  if (getRelocationModel() == Reloc::DynamicNoPIC) {
99    if (is64Bit)
100      setRelocationModel(Reloc::PIC_);
101    else if (!Subtarget.isTargetDarwin())
102      setRelocationModel(Reloc::Static);
103  }
104
105  // If we are on Darwin, disallow static relocation model in X86-64 mode, since
106  // the Mach-O file format doesn't support it.
107  if (getRelocationModel() == Reloc::Static &&
108      Subtarget.isTargetDarwin() &&
109      is64Bit)
110    setRelocationModel(Reloc::PIC_);
111
112  // Determine the PICStyle based on the target selected.
113  if (getRelocationModel() == Reloc::Static) {
114    // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
115    Subtarget.setPICStyle(PICStyles::None);
116  } else if (Subtarget.isTargetCygMing()) {
117    Subtarget.setPICStyle(PICStyles::None);
118  } else if (Subtarget.isTargetDarwin()) {
119    if (Subtarget.is64Bit())
120      Subtarget.setPICStyle(PICStyles::RIPRel);
121    else if (getRelocationModel() == Reloc::PIC_)
122      Subtarget.setPICStyle(PICStyles::StubPIC);
123    else {
124      assert(getRelocationModel() == Reloc::DynamicNoPIC);
125      Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
126    }
127  } else if (Subtarget.isTargetELF()) {
128    if (Subtarget.is64Bit())
129      Subtarget.setPICStyle(PICStyles::RIPRel);
130    else
131      Subtarget.setPICStyle(PICStyles::GOT);
132  }
133
134  // Finally, if we have "none" as our PIC style, force to static mode.
135  if (Subtarget.getPICStyle() == PICStyles::None)
136    setRelocationModel(Reloc::Static);
137}
138
139//===----------------------------------------------------------------------===//
140// Pass Pipeline Configuration
141//===----------------------------------------------------------------------===//
142
143bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
144                                       CodeGenOpt::Level OptLevel) {
145  // Install an instruction selector.
146  PM.add(createX86ISelDag(*this, OptLevel));
147
148  // If we're using Fast-ISel, clean up the mess.
149  if (EnableFastISel)
150    PM.add(createDeadMachineInstructionElimPass());
151
152  // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
153  PM.add(createX87FPRegKillInserterPass());
154
155  return false;
156}
157
158bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
159                                      CodeGenOpt::Level OptLevel) {
160  // Calculate and set max stack object alignment early, so we can decide
161  // whether we will need stack realignment (and thus FP).
162  PM.add(createMaxStackAlignmentCalculatorPass());
163  return false;  // -print-machineinstr shouldn't print after this.
164}
165
166bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
167                                       CodeGenOpt::Level OptLevel) {
168  PM.add(createX86FloatingPointStackifierPass());
169  return true;  // -print-machineinstr should print after this.
170}
171
172bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
173                                      CodeGenOpt::Level OptLevel,
174                                      MachineCodeEmitter &MCE) {
175  // FIXME: Move this to TargetJITInfo!
176  // On Darwin, do not override 64-bit setting made in X86TargetMachine().
177  if (DefRelocModel == Reloc::Default &&
178      (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
179    setRelocationModel(Reloc::Static);
180    Subtarget.setPICStyle(PICStyles::None);
181  }
182
183  PM.add(createX86CodeEmitterPass(*this, MCE));
184
185  return false;
186}
187
188bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
189                                      CodeGenOpt::Level OptLevel,
190                                      JITCodeEmitter &JCE) {
191  // FIXME: Move this to TargetJITInfo!
192  // On Darwin, do not override 64-bit setting made in X86TargetMachine().
193  if (DefRelocModel == Reloc::Default &&
194      (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
195    setRelocationModel(Reloc::Static);
196    Subtarget.setPICStyle(PICStyles::None);
197  }
198
199
200  PM.add(createX86JITCodeEmitterPass(*this, JCE));
201
202  return false;
203}
204
205bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
206                                      CodeGenOpt::Level OptLevel,
207                                      ObjectCodeEmitter &OCE) {
208  PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
209  return false;
210}
211
212bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
213                                            CodeGenOpt::Level OptLevel,
214                                            MachineCodeEmitter &MCE) {
215  PM.add(createX86CodeEmitterPass(*this, MCE));
216  return false;
217}
218
219bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
220                                            CodeGenOpt::Level OptLevel,
221                                            JITCodeEmitter &JCE) {
222  PM.add(createX86JITCodeEmitterPass(*this, JCE));
223  return false;
224}
225
226bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
227                                            CodeGenOpt::Level OptLevel,
228                                            ObjectCodeEmitter &OCE) {
229  PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
230  return false;
231}
232
233void X86TargetMachine::setCodeModelForStatic() {
234
235    if (getCodeModel() != CodeModel::Default) return;
236
237    // For static codegen, if we're not already set, use Small codegen.
238    setCodeModel(CodeModel::Small);
239}
240
241
242void X86TargetMachine::setCodeModelForJIT() {
243
244  if (getCodeModel() != CodeModel::Default) return;
245
246  // 64-bit JIT places everything in the same buffer except external functions.
247  if (Subtarget.is64Bit())
248    setCodeModel(CodeModel::Large);
249  else
250    setCodeModel(CodeModel::Small);
251}
252