X86TargetMachine.cpp revision 199481
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86 specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86MCAsmInfo.h" 15#include "X86TargetMachine.h" 16#include "X86.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Support/FormattedStream.h" 21#include "llvm/Target/TargetOptions.h" 22#include "llvm/Target/TargetRegistry.h" 23using namespace llvm; 24 25static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) { 26 Triple TheTriple(TT); 27 switch (TheTriple.getOS()) { 28 case Triple::Darwin: 29 return new X86MCAsmInfoDarwin(TheTriple); 30 case Triple::MinGW32: 31 case Triple::MinGW64: 32 case Triple::Cygwin: 33 return new X86MCAsmInfoCOFF(TheTriple); 34 case Triple::Win32: 35 return new X86WinMCAsmInfo(TheTriple); 36 default: 37 return new X86ELFMCAsmInfo(TheTriple); 38 } 39} 40 41extern "C" void LLVMInitializeX86Target() { 42 // Register the target. 43 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target); 44 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); 45 46 // Register the target asm info. 47 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo); 48 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo); 49 50 // Register the code emitter. 51 TargetRegistry::RegisterCodeEmitter(TheX86_32Target, createX86MCCodeEmitter); 52 TargetRegistry::RegisterCodeEmitter(TheX86_64Target, createX86MCCodeEmitter); 53} 54 55 56X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT, 57 const std::string &FS) 58 : X86TargetMachine(T, TT, FS, false) { 59} 60 61 62X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, 63 const std::string &FS) 64 : X86TargetMachine(T, TT, FS, true) { 65} 66 67/// X86TargetMachine ctor - Create an X86 target. 68/// 69X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, 70 const std::string &FS, bool is64Bit) 71 : LLVMTargetMachine(T, TT), 72 Subtarget(TT, FS, is64Bit), 73 DataLayout(Subtarget.getDataLayout()), 74 FrameInfo(TargetFrameInfo::StackGrowsDown, 75 Subtarget.getStackAlignment(), 76 (Subtarget.isTargetWin64() ? -40 : 77 (Subtarget.is64Bit() ? -8 : -4))), 78 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) { 79 DefRelocModel = getRelocationModel(); 80 81 // If no relocation model was picked, default as appropriate for the target. 82 if (getRelocationModel() == Reloc::Default) { 83 if (!Subtarget.isTargetDarwin()) 84 setRelocationModel(Reloc::Static); 85 else if (Subtarget.is64Bit()) 86 setRelocationModel(Reloc::PIC_); 87 else 88 setRelocationModel(Reloc::DynamicNoPIC); 89 } 90 91 assert(getRelocationModel() != Reloc::Default && 92 "Relocation mode not picked"); 93 94 // If no code model is picked, default to small. 95 if (getCodeModel() == CodeModel::Default) 96 setCodeModel(CodeModel::Small); 97 98 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC 99 // is defined as a model for code which may be used in static or dynamic 100 // executables but not necessarily a shared library. On X86-32 we just 101 // compile in -static mode, in x86-64 we use PIC. 102 if (getRelocationModel() == Reloc::DynamicNoPIC) { 103 if (is64Bit) 104 setRelocationModel(Reloc::PIC_); 105 else if (!Subtarget.isTargetDarwin()) 106 setRelocationModel(Reloc::Static); 107 } 108 109 // If we are on Darwin, disallow static relocation model in X86-64 mode, since 110 // the Mach-O file format doesn't support it. 111 if (getRelocationModel() == Reloc::Static && 112 Subtarget.isTargetDarwin() && 113 is64Bit) 114 setRelocationModel(Reloc::PIC_); 115 116 // Determine the PICStyle based on the target selected. 117 if (getRelocationModel() == Reloc::Static) { 118 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None. 119 Subtarget.setPICStyle(PICStyles::None); 120 } else if (Subtarget.isTargetCygMing()) { 121 Subtarget.setPICStyle(PICStyles::None); 122 } else if (Subtarget.isTargetDarwin()) { 123 if (Subtarget.is64Bit()) 124 Subtarget.setPICStyle(PICStyles::RIPRel); 125 else if (getRelocationModel() == Reloc::PIC_) 126 Subtarget.setPICStyle(PICStyles::StubPIC); 127 else { 128 assert(getRelocationModel() == Reloc::DynamicNoPIC); 129 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC); 130 } 131 } else if (Subtarget.isTargetELF()) { 132 if (Subtarget.is64Bit()) 133 Subtarget.setPICStyle(PICStyles::RIPRel); 134 else 135 Subtarget.setPICStyle(PICStyles::GOT); 136 } 137 138 // Finally, if we have "none" as our PIC style, force to static mode. 139 if (Subtarget.getPICStyle() == PICStyles::None) 140 setRelocationModel(Reloc::Static); 141} 142 143//===----------------------------------------------------------------------===// 144// Pass Pipeline Configuration 145//===----------------------------------------------------------------------===// 146 147bool X86TargetMachine::addInstSelector(PassManagerBase &PM, 148 CodeGenOpt::Level OptLevel) { 149 // Install an instruction selector. 150 PM.add(createX86ISelDag(*this, OptLevel)); 151 152 // If we're using Fast-ISel, clean up the mess. 153 if (EnableFastISel) 154 PM.add(createDeadMachineInstructionElimPass()); 155 156 // Install a pass to insert x87 FP_REG_KILL instructions, as needed. 157 PM.add(createX87FPRegKillInserterPass()); 158 159 return false; 160} 161 162bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, 163 CodeGenOpt::Level OptLevel) { 164 // Calculate and set max stack object alignment early, so we can decide 165 // whether we will need stack realignment (and thus FP). 166 PM.add(createX86MaxStackAlignmentCalculatorPass()); 167 return false; // -print-machineinstr shouldn't print after this. 168} 169 170bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, 171 CodeGenOpt::Level OptLevel) { 172 PM.add(createX86FloatingPointStackifierPass()); 173 return true; // -print-machineinstr should print after this. 174} 175 176bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 177 CodeGenOpt::Level OptLevel, 178 MachineCodeEmitter &MCE) { 179 // FIXME: Move this to TargetJITInfo! 180 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 181 if (DefRelocModel == Reloc::Default && 182 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 183 setRelocationModel(Reloc::Static); 184 Subtarget.setPICStyle(PICStyles::None); 185 } 186 187 // 64-bit JIT places everything in the same buffer except external functions. 188 if (Subtarget.is64Bit()) 189 setCodeModel(CodeModel::Large); 190 191 PM.add(createX86CodeEmitterPass(*this, MCE)); 192 193 return false; 194} 195 196bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 197 CodeGenOpt::Level OptLevel, 198 JITCodeEmitter &JCE) { 199 // FIXME: Move this to TargetJITInfo! 200 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 201 if (DefRelocModel == Reloc::Default && 202 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 203 setRelocationModel(Reloc::Static); 204 Subtarget.setPICStyle(PICStyles::None); 205 } 206 207 // 64-bit JIT places everything in the same buffer except external functions. 208 if (Subtarget.is64Bit()) 209 setCodeModel(CodeModel::Large); 210 211 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 212 213 return false; 214} 215 216bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 217 CodeGenOpt::Level OptLevel, 218 ObjectCodeEmitter &OCE) { 219 PM.add(createX86ObjectCodeEmitterPass(*this, OCE)); 220 return false; 221} 222 223bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 224 CodeGenOpt::Level OptLevel, 225 MachineCodeEmitter &MCE) { 226 PM.add(createX86CodeEmitterPass(*this, MCE)); 227 return false; 228} 229 230bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 231 CodeGenOpt::Level OptLevel, 232 JITCodeEmitter &JCE) { 233 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 234 return false; 235} 236 237bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 238 CodeGenOpt::Level OptLevel, 239 ObjectCodeEmitter &OCE) { 240 PM.add(createX86ObjectCodeEmitterPass(*this, OCE)); 241 return false; 242} 243