X86TargetMachine.cpp revision 198090
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86 specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86MCAsmInfo.h" 15#include "X86TargetMachine.h" 16#include "X86.h" 17#include "llvm/PassManager.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Support/FormattedStream.h" 21#include "llvm/Target/TargetOptions.h" 22#include "llvm/Target/TargetRegistry.h" 23using namespace llvm; 24 25static const MCAsmInfo *createMCAsmInfo(const Target &T, 26 const StringRef &TT) { 27 Triple TheTriple(TT); 28 switch (TheTriple.getOS()) { 29 case Triple::Darwin: 30 return new X86MCAsmInfoDarwin(TheTriple); 31 case Triple::MinGW32: 32 case Triple::MinGW64: 33 case Triple::Cygwin: 34 return new X86MCAsmInfoCOFF(TheTriple); 35 case Triple::Win32: 36 return new X86WinMCAsmInfo(TheTriple); 37 default: 38 return new X86ELFMCAsmInfo(TheTriple); 39 } 40} 41 42extern "C" void LLVMInitializeX86Target() { 43 // Register the target. 44 RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target); 45 RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); 46 47 // Register the target asm info. 48 RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo); 49 RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo); 50 51 // Register the code emitter. 52 TargetRegistry::RegisterCodeEmitter(TheX86_32Target, createX86MCCodeEmitter); 53 TargetRegistry::RegisterCodeEmitter(TheX86_64Target, createX86MCCodeEmitter); 54} 55 56 57X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT, 58 const std::string &FS) 59 : X86TargetMachine(T, TT, FS, false) { 60} 61 62 63X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, 64 const std::string &FS) 65 : X86TargetMachine(T, TT, FS, true) { 66} 67 68/// X86TargetMachine ctor - Create an X86 target. 69/// 70X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, 71 const std::string &FS, bool is64Bit) 72 : LLVMTargetMachine(T, TT), 73 Subtarget(TT, FS, is64Bit), 74 DataLayout(Subtarget.getDataLayout()), 75 FrameInfo(TargetFrameInfo::StackGrowsDown, 76 Subtarget.getStackAlignment(), 77 (Subtarget.isTargetWin64() ? -40 : 78 (Subtarget.is64Bit() ? -8 : -4))), 79 InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) { 80 DefRelocModel = getRelocationModel(); 81 82 // If no relocation model was picked, default as appropriate for the target. 83 if (getRelocationModel() == Reloc::Default) { 84 if (!Subtarget.isTargetDarwin()) 85 setRelocationModel(Reloc::Static); 86 else if (Subtarget.is64Bit()) 87 setRelocationModel(Reloc::PIC_); 88 else 89 setRelocationModel(Reloc::DynamicNoPIC); 90 } 91 92 assert(getRelocationModel() != Reloc::Default && 93 "Relocation mode not picked"); 94 95 // If no code model is picked, default to small. 96 if (getCodeModel() == CodeModel::Default) 97 setCodeModel(CodeModel::Small); 98 99 // ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC 100 // is defined as a model for code which may be used in static or dynamic 101 // executables but not necessarily a shared library. On X86-32 we just 102 // compile in -static mode, in x86-64 we use PIC. 103 if (getRelocationModel() == Reloc::DynamicNoPIC) { 104 if (is64Bit) 105 setRelocationModel(Reloc::PIC_); 106 else if (!Subtarget.isTargetDarwin()) 107 setRelocationModel(Reloc::Static); 108 } 109 110 // If we are on Darwin, disallow static relocation model in X86-64 mode, since 111 // the Mach-O file format doesn't support it. 112 if (getRelocationModel() == Reloc::Static && 113 Subtarget.isTargetDarwin() && 114 is64Bit) 115 setRelocationModel(Reloc::PIC_); 116 117 // Determine the PICStyle based on the target selected. 118 if (getRelocationModel() == Reloc::Static) { 119 // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None. 120 Subtarget.setPICStyle(PICStyles::None); 121 } else if (Subtarget.isTargetCygMing()) { 122 Subtarget.setPICStyle(PICStyles::None); 123 } else if (Subtarget.isTargetDarwin()) { 124 if (Subtarget.is64Bit()) 125 Subtarget.setPICStyle(PICStyles::RIPRel); 126 else if (getRelocationModel() == Reloc::PIC_) 127 Subtarget.setPICStyle(PICStyles::StubPIC); 128 else { 129 assert(getRelocationModel() == Reloc::DynamicNoPIC); 130 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC); 131 } 132 } else if (Subtarget.isTargetELF()) { 133 if (Subtarget.is64Bit()) 134 Subtarget.setPICStyle(PICStyles::RIPRel); 135 else 136 Subtarget.setPICStyle(PICStyles::GOT); 137 } 138 139 // Finally, if we have "none" as our PIC style, force to static mode. 140 if (Subtarget.getPICStyle() == PICStyles::None) 141 setRelocationModel(Reloc::Static); 142} 143 144//===----------------------------------------------------------------------===// 145// Pass Pipeline Configuration 146//===----------------------------------------------------------------------===// 147 148bool X86TargetMachine::addInstSelector(PassManagerBase &PM, 149 CodeGenOpt::Level OptLevel) { 150 // Install an instruction selector. 151 PM.add(createX86ISelDag(*this, OptLevel)); 152 153 // If we're using Fast-ISel, clean up the mess. 154 if (EnableFastISel) 155 PM.add(createDeadMachineInstructionElimPass()); 156 157 // Install a pass to insert x87 FP_REG_KILL instructions, as needed. 158 PM.add(createX87FPRegKillInserterPass()); 159 160 return false; 161} 162 163bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, 164 CodeGenOpt::Level OptLevel) { 165 // Calculate and set max stack object alignment early, so we can decide 166 // whether we will need stack realignment (and thus FP). 167 PM.add(createX86MaxStackAlignmentCalculatorPass()); 168 return false; // -print-machineinstr shouldn't print after this. 169} 170 171bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, 172 CodeGenOpt::Level OptLevel) { 173 PM.add(createX86FloatingPointStackifierPass()); 174 return true; // -print-machineinstr should print after this. 175} 176 177bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 178 CodeGenOpt::Level OptLevel, 179 MachineCodeEmitter &MCE) { 180 // FIXME: Move this to TargetJITInfo! 181 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 182 if (DefRelocModel == Reloc::Default && 183 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 184 setRelocationModel(Reloc::Static); 185 Subtarget.setPICStyle(PICStyles::None); 186 } 187 188 // 64-bit JIT places everything in the same buffer except external functions. 189 // On Darwin, use small code model but hack the call instruction for 190 // externals. Elsewhere, do not assume globals are in the lower 4G. 191 if (Subtarget.is64Bit()) { 192 if (Subtarget.isTargetDarwin()) 193 setCodeModel(CodeModel::Small); 194 else 195 setCodeModel(CodeModel::Large); 196 } 197 198 PM.add(createX86CodeEmitterPass(*this, MCE)); 199 200 return false; 201} 202 203bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 204 CodeGenOpt::Level OptLevel, 205 JITCodeEmitter &JCE) { 206 // FIXME: Move this to TargetJITInfo! 207 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 208 if (DefRelocModel == Reloc::Default && 209 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) { 210 setRelocationModel(Reloc::Static); 211 Subtarget.setPICStyle(PICStyles::None); 212 } 213 214 // 64-bit JIT places everything in the same buffer except external functions. 215 // On Darwin, use small code model but hack the call instruction for 216 // externals. Elsewhere, do not assume globals are in the lower 4G. 217 if (Subtarget.is64Bit()) { 218 if (Subtarget.isTargetDarwin()) 219 setCodeModel(CodeModel::Small); 220 else 221 setCodeModel(CodeModel::Large); 222 } 223 224 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 225 226 return false; 227} 228 229bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 230 CodeGenOpt::Level OptLevel, 231 ObjectCodeEmitter &OCE) { 232 PM.add(createX86ObjectCodeEmitterPass(*this, OCE)); 233 return false; 234} 235 236bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 237 CodeGenOpt::Level OptLevel, 238 MachineCodeEmitter &MCE) { 239 PM.add(createX86CodeEmitterPass(*this, MCE)); 240 return false; 241} 242 243bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 244 CodeGenOpt::Level OptLevel, 245 JITCodeEmitter &JCE) { 246 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 247 return false; 248} 249 250bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 251 CodeGenOpt::Level OptLevel, 252 ObjectCodeEmitter &OCE) { 253 PM.add(createX86ObjectCodeEmitterPass(*this, OCE)); 254 return false; 255} 256