X86TargetMachine.cpp revision 193574
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86 specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86TargetAsmInfo.h" 15#include "X86TargetMachine.h" 16#include "X86.h" 17#include "llvm/Module.h" 18#include "llvm/PassManager.h" 19#include "llvm/CodeGen/MachineFunction.h" 20#include "llvm/CodeGen/Passes.h" 21#include "llvm/Support/raw_ostream.h" 22#include "llvm/Target/TargetOptions.h" 23#include "llvm/Target/TargetMachineRegistry.h" 24using namespace llvm; 25 26/// X86TargetMachineModule - Note that this is used on hosts that cannot link 27/// in a library unless there are references into the library. In particular, 28/// it seems that it is not possible to get things to work on Win32 without 29/// this. Though it is unused, do not remove it. 30extern "C" int X86TargetMachineModule; 31int X86TargetMachineModule = 0; 32 33// Register the target. 34static RegisterTarget<X86_32TargetMachine> 35X("x86", "32-bit X86: Pentium-Pro and above"); 36static RegisterTarget<X86_64TargetMachine> 37Y("x86-64", "64-bit X86: EM64T and AMD64"); 38 39// No assembler printer by default 40X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0; 41 42const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const { 43 if (Subtarget.isFlavorIntel()) 44 return new X86WinTargetAsmInfo(*this); 45 else 46 switch (Subtarget.TargetType) { 47 case X86Subtarget::isDarwin: 48 return new X86DarwinTargetAsmInfo(*this); 49 case X86Subtarget::isELF: 50 return new X86ELFTargetAsmInfo(*this); 51 case X86Subtarget::isMingw: 52 case X86Subtarget::isCygwin: 53 return new X86COFFTargetAsmInfo(*this); 54 case X86Subtarget::isWindows: 55 return new X86WinTargetAsmInfo(*this); 56 default: 57 return new X86GenericTargetAsmInfo(*this); 58 } 59} 60 61unsigned X86_32TargetMachine::getJITMatchQuality() { 62#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86) 63 return 10; 64#endif 65 return 0; 66} 67 68unsigned X86_64TargetMachine::getJITMatchQuality() { 69#if defined(__x86_64__) || defined(_M_AMD64) 70 return 10; 71#endif 72 return 0; 73} 74 75unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) { 76 // We strongly match "i[3-9]86-*". 77 std::string TT = M.getTargetTriple(); 78 if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' && 79 TT[4] == '-' && TT[1] - '3' < 6) 80 return 20; 81 // If the target triple is something non-X86, we don't match. 82 if (!TT.empty()) return 0; 83 84 if (M.getEndianness() == Module::LittleEndian && 85 M.getPointerSize() == Module::Pointer32) 86 return 10; // Weak match 87 else if (M.getEndianness() != Module::AnyEndianness || 88 M.getPointerSize() != Module::AnyPointerSize) 89 return 0; // Match for some other target 90 91 return getJITMatchQuality()/2; 92} 93 94unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) { 95 // We strongly match "x86_64-*". 96 std::string TT = M.getTargetTriple(); 97 if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' && 98 TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-') 99 return 20; 100 101 // We strongly match "amd64-*". 102 if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' && 103 TT[3] == '6' && TT[4] == '4' && TT[5] == '-') 104 return 20; 105 106 // If the target triple is something non-X86-64, we don't match. 107 if (!TT.empty()) return 0; 108 109 if (M.getEndianness() == Module::LittleEndian && 110 M.getPointerSize() == Module::Pointer64) 111 return 10; // Weak match 112 else if (M.getEndianness() != Module::AnyEndianness || 113 M.getPointerSize() != Module::AnyPointerSize) 114 return 0; // Match for some other target 115 116 return getJITMatchQuality()/2; 117} 118 119X86_32TargetMachine::X86_32TargetMachine(const Module &M, const std::string &FS) 120 : X86TargetMachine(M, FS, false) { 121} 122 123 124X86_64TargetMachine::X86_64TargetMachine(const Module &M, const std::string &FS) 125 : X86TargetMachine(M, FS, true) { 126} 127 128/// X86TargetMachine ctor - Create an ILP32 architecture model 129/// 130X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, 131 bool is64Bit) 132 : Subtarget(M, FS, is64Bit), 133 DataLayout(Subtarget.getDataLayout()), 134 FrameInfo(TargetFrameInfo::StackGrowsDown, 135 Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4), 136 InstrInfo(*this), JITInfo(*this), TLInfo(*this), 137 ELFWriterInfo(Subtarget.is64Bit()) { 138 DefRelocModel = getRelocationModel(); 139 // FIXME: Correctly select PIC model for Win64 stuff 140 if (getRelocationModel() == Reloc::Default) { 141 if (Subtarget.isTargetDarwin() || 142 (Subtarget.isTargetCygMing() && !Subtarget.isTargetWin64())) 143 setRelocationModel(Reloc::DynamicNoPIC); 144 else 145 setRelocationModel(Reloc::Static); 146 } 147 148 // ELF doesn't have a distinct dynamic-no-PIC model. Dynamic-no-PIC 149 // is defined as a model for code which may be used in static or 150 // dynamic executables but not necessarily a shared library. On ELF 151 // implement this by using the Static model. 152 if (Subtarget.isTargetELF() && 153 getRelocationModel() == Reloc::DynamicNoPIC) 154 setRelocationModel(Reloc::Static); 155 156 if (Subtarget.is64Bit()) { 157 // No DynamicNoPIC support under X86-64. 158 if (getRelocationModel() == Reloc::DynamicNoPIC) 159 setRelocationModel(Reloc::PIC_); 160 // Default X86-64 code model is small. 161 if (getCodeModel() == CodeModel::Default) 162 setCodeModel(CodeModel::Small); 163 } 164 165 if (Subtarget.isTargetCygMing()) 166 Subtarget.setPICStyle(PICStyles::WinPIC); 167 else if (Subtarget.isTargetDarwin()) { 168 if (Subtarget.is64Bit()) 169 Subtarget.setPICStyle(PICStyles::RIPRel); 170 else 171 Subtarget.setPICStyle(PICStyles::Stub); 172 } else if (Subtarget.isTargetELF()) { 173 if (Subtarget.is64Bit()) 174 Subtarget.setPICStyle(PICStyles::RIPRel); 175 else 176 Subtarget.setPICStyle(PICStyles::GOT); 177 } 178} 179 180//===----------------------------------------------------------------------===// 181// Pass Pipeline Configuration 182//===----------------------------------------------------------------------===// 183 184bool X86TargetMachine::addInstSelector(PassManagerBase &PM, 185 CodeGenOpt::Level OptLevel) { 186 // Install an instruction selector. 187 PM.add(createX86ISelDag(*this, OptLevel)); 188 189 // If we're using Fast-ISel, clean up the mess. 190 if (EnableFastISel) 191 PM.add(createDeadMachineInstructionElimPass()); 192 193 // Install a pass to insert x87 FP_REG_KILL instructions, as needed. 194 PM.add(createX87FPRegKillInserterPass()); 195 196 return false; 197} 198 199bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM, 200 CodeGenOpt::Level OptLevel) { 201 // Calculate and set max stack object alignment early, so we can decide 202 // whether we will need stack realignment (and thus FP). 203 PM.add(createX86MaxStackAlignmentCalculatorPass()); 204 return false; // -print-machineinstr shouldn't print after this. 205} 206 207bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, 208 CodeGenOpt::Level OptLevel) { 209 PM.add(createX86FloatingPointStackifierPass()); 210 return true; // -print-machineinstr should print after this. 211} 212 213bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, 214 CodeGenOpt::Level OptLevel, 215 bool Verbose, 216 raw_ostream &Out) { 217 // FIXME: Move this somewhere else! 218 // On Darwin, override 64-bit static relocation to pic_ since the 219 // assembler doesn't support it. 220 if (DefRelocModel == Reloc::Static && 221 Subtarget.isTargetDarwin() && Subtarget.is64Bit()) 222 setRelocationModel(Reloc::PIC_); 223 224 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 225 if (AsmPrinterCtor) 226 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); 227 return false; 228} 229 230bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 231 CodeGenOpt::Level OptLevel, 232 bool DumpAsm, 233 MachineCodeEmitter &MCE) { 234 // FIXME: Move this to TargetJITInfo! 235 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 236 if (DefRelocModel == Reloc::Default && 237 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) 238 setRelocationModel(Reloc::Static); 239 240 // 64-bit JIT places everything in the same buffer except external functions. 241 // On Darwin, use small code model but hack the call instruction for 242 // externals. Elsewhere, do not assume globals are in the lower 4G. 243 if (Subtarget.is64Bit()) { 244 if (Subtarget.isTargetDarwin()) 245 setCodeModel(CodeModel::Small); 246 else 247 setCodeModel(CodeModel::Large); 248 } 249 250 PM.add(createX86CodeEmitterPass(*this, MCE)); 251 if (DumpAsm) { 252 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 253 if (AsmPrinterCtor) 254 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 255 } 256 257 return false; 258} 259 260bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, 261 CodeGenOpt::Level OptLevel, 262 bool DumpAsm, 263 JITCodeEmitter &JCE) { 264 // FIXME: Move this to TargetJITInfo! 265 // On Darwin, do not override 64-bit setting made in X86TargetMachine(). 266 if (DefRelocModel == Reloc::Default && 267 (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) 268 setRelocationModel(Reloc::Static); 269 270 // 64-bit JIT places everything in the same buffer except external functions. 271 // On Darwin, use small code model but hack the call instruction for 272 // externals. Elsewhere, do not assume globals are in the lower 4G. 273 if (Subtarget.is64Bit()) { 274 if (Subtarget.isTargetDarwin()) 275 setCodeModel(CodeModel::Small); 276 else 277 setCodeModel(CodeModel::Large); 278 } 279 280 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 281 if (DumpAsm) { 282 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 283 if (AsmPrinterCtor) 284 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 285 } 286 287 return false; 288} 289 290bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 291 CodeGenOpt::Level OptLevel, 292 bool DumpAsm, 293 MachineCodeEmitter &MCE) { 294 PM.add(createX86CodeEmitterPass(*this, MCE)); 295 if (DumpAsm) { 296 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 297 if (AsmPrinterCtor) 298 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 299 } 300 301 return false; 302} 303 304bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 305 CodeGenOpt::Level OptLevel, 306 bool DumpAsm, 307 JITCodeEmitter &JCE) { 308 PM.add(createX86JITCodeEmitterPass(*this, JCE)); 309 if (DumpAsm) { 310 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 311 if (AsmPrinterCtor) 312 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 313 } 314 315 return false; 316} 317 318/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are 319/// RIP-relative on this machine, taking into consideration the relocation 320/// model and subtarget. RIP-relative addresses cannot have a separate 321/// base or index register. 322bool X86TargetMachine::symbolicAddressesAreRIPRel() const { 323 return getRelocationModel() != Reloc::Static && 324 Subtarget.isPICStyleRIPRel(); 325} 326