1//===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the X86 implementation of TargetFrameLowering class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86FrameLowering.h" 15#include "X86InstrBuilder.h" 16#include "X86InstrInfo.h" 17#include "X86MachineFunctionInfo.h" 18#include "X86Subtarget.h" 19#include "X86TargetMachine.h" 20#include "llvm/ADT/SmallSet.h" 21#include "llvm/Analysis/EHPersonalities.h" 22#include "llvm/CodeGen/MachineFrameInfo.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/MachineInstrBuilder.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/MachineRegisterInfo.h" 27#include "llvm/CodeGen/WinEHFuncInfo.h" 28#include "llvm/IR/DataLayout.h" 29#include "llvm/IR/Function.h" 30#include "llvm/MC/MCAsmInfo.h" 31#include "llvm/MC/MCSymbol.h" 32#include "llvm/Target/TargetOptions.h" 33#include "llvm/Support/Debug.h" 34#include <cstdlib> 35 36using namespace llvm; 37 38X86FrameLowering::X86FrameLowering(const X86Subtarget &STI, 39 unsigned StackAlignOverride) 40 : TargetFrameLowering(StackGrowsDown, StackAlignOverride, 41 STI.is64Bit() ? -8 : -4), 42 STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) { 43 // Cache a bunch of frame-related predicates for this subtarget. 44 SlotSize = TRI->getSlotSize(); 45 Is64Bit = STI.is64Bit(); 46 IsLP64 = STI.isTarget64BitLP64(); 47 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit. 48 Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64(); 49 StackPtr = TRI->getStackRegister(); 50} 51 52bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 53 return !MF.getFrameInfo()->hasVarSizedObjects() && 54 !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences(); 55} 56 57/// canSimplifyCallFramePseudos - If there is a reserved call frame, the 58/// call frame pseudos can be simplified. Having a FP, as in the default 59/// implementation, is not sufficient here since we can't always use it. 60/// Use a more nuanced condition. 61bool 62X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const { 63 return hasReservedCallFrame(MF) || 64 (hasFP(MF) && !TRI->needsStackRealignment(MF)) || 65 TRI->hasBasePointer(MF); 66} 67 68// needsFrameIndexResolution - Do we need to perform FI resolution for 69// this function. Normally, this is required only when the function 70// has any stack objects. However, FI resolution actually has another job, 71// not apparent from the title - it resolves callframesetup/destroy 72// that were not simplified earlier. 73// So, this is required for x86 functions that have push sequences even 74// when there are no stack objects. 75bool 76X86FrameLowering::needsFrameIndexResolution(const MachineFunction &MF) const { 77 return MF.getFrameInfo()->hasStackObjects() || 78 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences(); 79} 80 81/// hasFP - Return true if the specified function should have a dedicated frame 82/// pointer register. This is true if the function has variable sized allocas 83/// or if frame pointer elimination is disabled. 84bool X86FrameLowering::hasFP(const MachineFunction &MF) const { 85 const MachineFrameInfo *MFI = MF.getFrameInfo(); 86 const MachineModuleInfo &MMI = MF.getMMI(); 87 88 return (MF.getTarget().Options.DisableFramePointerElim(MF) || 89 TRI->needsStackRealignment(MF) || 90 MFI->hasVarSizedObjects() || 91 MFI->isFrameAddressTaken() || MFI->hasOpaqueSPAdjustment() || 92 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() || 93 MMI.callsUnwindInit() || MMI.hasEHFunclets() || MMI.callsEHReturn() || 94 MFI->hasStackMap() || MFI->hasPatchPoint() || 95 MFI->hasCopyImplyingStackAdjustment()); 96} 97 98static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) { 99 if (IsLP64) { 100 if (isInt<8>(Imm)) 101 return X86::SUB64ri8; 102 return X86::SUB64ri32; 103 } else { 104 if (isInt<8>(Imm)) 105 return X86::SUB32ri8; 106 return X86::SUB32ri; 107 } 108} 109 110static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) { 111 if (IsLP64) { 112 if (isInt<8>(Imm)) 113 return X86::ADD64ri8; 114 return X86::ADD64ri32; 115 } else { 116 if (isInt<8>(Imm)) 117 return X86::ADD32ri8; 118 return X86::ADD32ri; 119 } 120} 121 122static unsigned getSUBrrOpcode(unsigned isLP64) { 123 return isLP64 ? X86::SUB64rr : X86::SUB32rr; 124} 125 126static unsigned getADDrrOpcode(unsigned isLP64) { 127 return isLP64 ? X86::ADD64rr : X86::ADD32rr; 128} 129 130static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) { 131 if (IsLP64) { 132 if (isInt<8>(Imm)) 133 return X86::AND64ri8; 134 return X86::AND64ri32; 135 } 136 if (isInt<8>(Imm)) 137 return X86::AND32ri8; 138 return X86::AND32ri; 139} 140 141static unsigned getLEArOpcode(unsigned IsLP64) { 142 return IsLP64 ? X86::LEA64r : X86::LEA32r; 143} 144 145/// findDeadCallerSavedReg - Return a caller-saved register that isn't live 146/// when it reaches the "return" instruction. We can then pop a stack object 147/// to this register without worry about clobbering it. 148static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, 149 MachineBasicBlock::iterator &MBBI, 150 const X86RegisterInfo *TRI, 151 bool Is64Bit) { 152 const MachineFunction *MF = MBB.getParent(); 153 const Function *F = MF->getFunction(); 154 if (!F || MF->getMMI().callsEHReturn()) 155 return 0; 156 157 const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF); 158 159 unsigned Opc = MBBI->getOpcode(); 160 switch (Opc) { 161 default: return 0; 162 case X86::RETL: 163 case X86::RETQ: 164 case X86::RETIL: 165 case X86::RETIQ: 166 case X86::TCRETURNdi: 167 case X86::TCRETURNri: 168 case X86::TCRETURNmi: 169 case X86::TCRETURNdi64: 170 case X86::TCRETURNri64: 171 case X86::TCRETURNmi64: 172 case X86::EH_RETURN: 173 case X86::EH_RETURN64: { 174 SmallSet<uint16_t, 8> Uses; 175 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) { 176 MachineOperand &MO = MBBI->getOperand(i); 177 if (!MO.isReg() || MO.isDef()) 178 continue; 179 unsigned Reg = MO.getReg(); 180 if (!Reg) 181 continue; 182 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 183 Uses.insert(*AI); 184 } 185 186 for (auto CS : AvailableRegs) 187 if (!Uses.count(CS) && CS != X86::RIP) 188 return CS; 189 } 190 } 191 192 return 0; 193} 194 195static bool isEAXLiveIn(MachineBasicBlock &MBB) { 196 for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) { 197 unsigned Reg = RegMask.PhysReg; 198 199 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX || 200 Reg == X86::AH || Reg == X86::AL) 201 return true; 202 } 203 204 return false; 205} 206 207/// Check if the flags need to be preserved before the terminators. 208/// This would be the case, if the eflags is live-in of the region 209/// composed by the terminators or live-out of that region, without 210/// being defined by a terminator. 211static bool 212flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB) { 213 for (const MachineInstr &MI : MBB.terminators()) { 214 bool BreakNext = false; 215 for (const MachineOperand &MO : MI.operands()) { 216 if (!MO.isReg()) 217 continue; 218 unsigned Reg = MO.getReg(); 219 if (Reg != X86::EFLAGS) 220 continue; 221 222 // This terminator needs an eflags that is not defined 223 // by a previous another terminator: 224 // EFLAGS is live-in of the region composed by the terminators. 225 if (!MO.isDef()) 226 return true; 227 // This terminator defines the eflags, i.e., we don't need to preserve it. 228 // However, we still need to check this specific terminator does not 229 // read a live-in value. 230 BreakNext = true; 231 } 232 // We found a definition of the eflags, no need to preserve them. 233 if (BreakNext) 234 return false; 235 } 236 237 // None of the terminators use or define the eflags. 238 // Check if they are live-out, that would imply we need to preserve them. 239 for (const MachineBasicBlock *Succ : MBB.successors()) 240 if (Succ->isLiveIn(X86::EFLAGS)) 241 return true; 242 243 return false; 244} 245 246/// emitSPUpdate - Emit a series of instructions to increment / decrement the 247/// stack pointer by a constant value. 248void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB, 249 MachineBasicBlock::iterator &MBBI, 250 int64_t NumBytes, bool InEpilogue) const { 251 bool isSub = NumBytes < 0; 252 uint64_t Offset = isSub ? -NumBytes : NumBytes; 253 254 uint64_t Chunk = (1LL << 31) - 1; 255 DebugLoc DL = MBB.findDebugLoc(MBBI); 256 257 while (Offset) { 258 if (Offset > Chunk) { 259 // Rather than emit a long series of instructions for large offsets, 260 // load the offset into a register and do one sub/add 261 unsigned Reg = 0; 262 263 if (isSub && !isEAXLiveIn(MBB)) 264 Reg = (unsigned)(Is64Bit ? X86::RAX : X86::EAX); 265 else 266 Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit); 267 268 if (Reg) { 269 unsigned Opc = Is64Bit ? X86::MOV64ri : X86::MOV32ri; 270 BuildMI(MBB, MBBI, DL, TII.get(Opc), Reg) 271 .addImm(Offset); 272 Opc = isSub 273 ? getSUBrrOpcode(Is64Bit) 274 : getADDrrOpcode(Is64Bit); 275 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) 276 .addReg(StackPtr) 277 .addReg(Reg); 278 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead. 279 Offset = 0; 280 continue; 281 } 282 } 283 284 uint64_t ThisVal = std::min(Offset, Chunk); 285 if (ThisVal == (Is64Bit ? 8 : 4)) { 286 // Use push / pop instead. 287 unsigned Reg = isSub 288 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX) 289 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit); 290 if (Reg) { 291 unsigned Opc = isSub 292 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r) 293 : (Is64Bit ? X86::POP64r : X86::POP32r); 294 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) 295 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); 296 if (isSub) 297 MI->setFlag(MachineInstr::FrameSetup); 298 else 299 MI->setFlag(MachineInstr::FrameDestroy); 300 Offset -= ThisVal; 301 continue; 302 } 303 } 304 305 MachineInstrBuilder MI = BuildStackAdjustment( 306 MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue); 307 if (isSub) 308 MI.setMIFlag(MachineInstr::FrameSetup); 309 else 310 MI.setMIFlag(MachineInstr::FrameDestroy); 311 312 Offset -= ThisVal; 313 } 314} 315 316MachineInstrBuilder X86FrameLowering::BuildStackAdjustment( 317 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc DL, 318 int64_t Offset, bool InEpilogue) const { 319 assert(Offset != 0 && "zero offset stack adjustment requested"); 320 321 // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue 322 // is tricky. 323 bool UseLEA; 324 if (!InEpilogue) { 325 // Check if inserting the prologue at the beginning 326 // of MBB would require to use LEA operations. 327 // We need to use LEA operations if EFLAGS is live in, because 328 // it means an instruction will read it before it gets defined. 329 UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS); 330 } else { 331 // If we can use LEA for SP but we shouldn't, check that none 332 // of the terminators uses the eflags. Otherwise we will insert 333 // a ADD that will redefine the eflags and break the condition. 334 // Alternatively, we could move the ADD, but this may not be possible 335 // and is an optimization anyway. 336 UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent()); 337 if (UseLEA && !STI.useLeaForSP()) 338 UseLEA = flagsNeedToBePreservedBeforeTheTerminators(MBB); 339 // If that assert breaks, that means we do not do the right thing 340 // in canUseAsEpilogue. 341 assert((UseLEA || !flagsNeedToBePreservedBeforeTheTerminators(MBB)) && 342 "We shouldn't have allowed this insertion point"); 343 } 344 345 MachineInstrBuilder MI; 346 if (UseLEA) { 347 MI = addRegOffset(BuildMI(MBB, MBBI, DL, 348 TII.get(getLEArOpcode(Uses64BitFramePtr)), 349 StackPtr), 350 StackPtr, false, Offset); 351 } else { 352 bool IsSub = Offset < 0; 353 uint64_t AbsOffset = IsSub ? -Offset : Offset; 354 unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset) 355 : getADDriOpcode(Uses64BitFramePtr, AbsOffset); 356 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) 357 .addReg(StackPtr) 358 .addImm(AbsOffset); 359 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead. 360 } 361 return MI; 362} 363 364int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB, 365 MachineBasicBlock::iterator &MBBI, 366 bool doMergeWithPrevious) const { 367 if ((doMergeWithPrevious && MBBI == MBB.begin()) || 368 (!doMergeWithPrevious && MBBI == MBB.end())) 369 return 0; 370 371 MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI; 372 MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr 373 : std::next(MBBI); 374 unsigned Opc = PI->getOpcode(); 375 int Offset = 0; 376 377 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 || 378 Opc == X86::ADD32ri || Opc == X86::ADD32ri8 || 379 Opc == X86::LEA32r || Opc == X86::LEA64_32r) && 380 PI->getOperand(0).getReg() == StackPtr){ 381 Offset += PI->getOperand(2).getImm(); 382 MBB.erase(PI); 383 if (!doMergeWithPrevious) MBBI = NI; 384 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 || 385 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) && 386 PI->getOperand(0).getReg() == StackPtr) { 387 Offset -= PI->getOperand(2).getImm(); 388 MBB.erase(PI); 389 if (!doMergeWithPrevious) MBBI = NI; 390 } 391 392 return Offset; 393} 394 395void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB, 396 MachineBasicBlock::iterator MBBI, DebugLoc DL, 397 MCCFIInstruction CFIInst) const { 398 MachineFunction &MF = *MBB.getParent(); 399 unsigned CFIIndex = MF.getMMI().addFrameInst(CFIInst); 400 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION)) 401 .addCFIIndex(CFIIndex); 402} 403 404void 405X86FrameLowering::emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, 406 MachineBasicBlock::iterator MBBI, 407 DebugLoc DL) const { 408 MachineFunction &MF = *MBB.getParent(); 409 MachineFrameInfo *MFI = MF.getFrameInfo(); 410 MachineModuleInfo &MMI = MF.getMMI(); 411 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 412 413 // Add callee saved registers to move list. 414 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 415 if (CSI.empty()) return; 416 417 // Calculate offsets. 418 for (std::vector<CalleeSavedInfo>::const_iterator 419 I = CSI.begin(), E = CSI.end(); I != E; ++I) { 420 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx()); 421 unsigned Reg = I->getReg(); 422 423 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); 424 BuildCFI(MBB, MBBI, DL, 425 MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset)); 426 } 427} 428 429MachineInstr *X86FrameLowering::emitStackProbe(MachineFunction &MF, 430 MachineBasicBlock &MBB, 431 MachineBasicBlock::iterator MBBI, 432 DebugLoc DL, 433 bool InProlog) const { 434 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>(); 435 if (STI.isTargetWindowsCoreCLR()) { 436 if (InProlog) { 437 return emitStackProbeInlineStub(MF, MBB, MBBI, DL, true); 438 } else { 439 return emitStackProbeInline(MF, MBB, MBBI, DL, false); 440 } 441 } else { 442 return emitStackProbeCall(MF, MBB, MBBI, DL, InProlog); 443 } 444} 445 446void X86FrameLowering::inlineStackProbe(MachineFunction &MF, 447 MachineBasicBlock &PrologMBB) const { 448 const StringRef ChkStkStubSymbol = "__chkstk_stub"; 449 MachineInstr *ChkStkStub = nullptr; 450 451 for (MachineInstr &MI : PrologMBB) { 452 if (MI.isCall() && MI.getOperand(0).isSymbol() && 453 ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) { 454 ChkStkStub = &MI; 455 break; 456 } 457 } 458 459 if (ChkStkStub != nullptr) { 460 MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator()); 461 assert(std::prev(MBBI).operator==(ChkStkStub) && 462 "MBBI expected after __chkstk_stub."); 463 DebugLoc DL = PrologMBB.findDebugLoc(MBBI); 464 emitStackProbeInline(MF, PrologMBB, MBBI, DL, true); 465 ChkStkStub->eraseFromParent(); 466 } 467} 468 469MachineInstr *X86FrameLowering::emitStackProbeInline( 470 MachineFunction &MF, MachineBasicBlock &MBB, 471 MachineBasicBlock::iterator MBBI, DebugLoc DL, bool InProlog) const { 472 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>(); 473 assert(STI.is64Bit() && "different expansion needed for 32 bit"); 474 assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR"); 475 const TargetInstrInfo &TII = *STI.getInstrInfo(); 476 const BasicBlock *LLVM_BB = MBB.getBasicBlock(); 477 478 // RAX contains the number of bytes of desired stack adjustment. 479 // The handling here assumes this value has already been updated so as to 480 // maintain stack alignment. 481 // 482 // We need to exit with RSP modified by this amount and execute suitable 483 // page touches to notify the OS that we're growing the stack responsibly. 484 // All stack probing must be done without modifying RSP. 485 // 486 // MBB: 487 // SizeReg = RAX; 488 // ZeroReg = 0 489 // CopyReg = RSP 490 // Flags, TestReg = CopyReg - SizeReg 491 // FinalReg = !Flags.Ovf ? TestReg : ZeroReg 492 // LimitReg = gs magic thread env access 493 // if FinalReg >= LimitReg goto ContinueMBB 494 // RoundBB: 495 // RoundReg = page address of FinalReg 496 // LoopMBB: 497 // LoopReg = PHI(LimitReg,ProbeReg) 498 // ProbeReg = LoopReg - PageSize 499 // [ProbeReg] = 0 500 // if (ProbeReg > RoundReg) goto LoopMBB 501 // ContinueMBB: 502 // RSP = RSP - RAX 503 // [rest of original MBB] 504 505 // Set up the new basic blocks 506 MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB); 507 MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB); 508 MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB); 509 510 MachineFunction::iterator MBBIter = std::next(MBB.getIterator()); 511 MF.insert(MBBIter, RoundMBB); 512 MF.insert(MBBIter, LoopMBB); 513 MF.insert(MBBIter, ContinueMBB); 514 515 // Split MBB and move the tail portion down to ContinueMBB. 516 MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI); 517 ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end()); 518 ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB); 519 520 // Some useful constants 521 const int64_t ThreadEnvironmentStackLimit = 0x10; 522 const int64_t PageSize = 0x1000; 523 const int64_t PageMask = ~(PageSize - 1); 524 525 // Registers we need. For the normal case we use virtual 526 // registers. For the prolog expansion we use RAX, RCX and RDX. 527 MachineRegisterInfo &MRI = MF.getRegInfo(); 528 const TargetRegisterClass *RegClass = &X86::GR64RegClass; 529 const unsigned SizeReg = InProlog ? (unsigned)X86::RAX 530 : MRI.createVirtualRegister(RegClass), 531 ZeroReg = InProlog ? (unsigned)X86::RCX 532 : MRI.createVirtualRegister(RegClass), 533 CopyReg = InProlog ? (unsigned)X86::RDX 534 : MRI.createVirtualRegister(RegClass), 535 TestReg = InProlog ? (unsigned)X86::RDX 536 : MRI.createVirtualRegister(RegClass), 537 FinalReg = InProlog ? (unsigned)X86::RDX 538 : MRI.createVirtualRegister(RegClass), 539 RoundedReg = InProlog ? (unsigned)X86::RDX 540 : MRI.createVirtualRegister(RegClass), 541 LimitReg = InProlog ? (unsigned)X86::RCX 542 : MRI.createVirtualRegister(RegClass), 543 JoinReg = InProlog ? (unsigned)X86::RCX 544 : MRI.createVirtualRegister(RegClass), 545 ProbeReg = InProlog ? (unsigned)X86::RCX 546 : MRI.createVirtualRegister(RegClass); 547 548 // SP-relative offsets where we can save RCX and RDX. 549 int64_t RCXShadowSlot = 0; 550 int64_t RDXShadowSlot = 0; 551 552 // If inlining in the prolog, save RCX and RDX. 553 // Future optimization: don't save or restore if not live in. 554 if (InProlog) { 555 // Compute the offsets. We need to account for things already 556 // pushed onto the stack at this point: return address, frame 557 // pointer (if used), and callee saves. 558 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 559 const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize(); 560 const bool HasFP = hasFP(MF); 561 RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0); 562 RDXShadowSlot = RCXShadowSlot + 8; 563 // Emit the saves. 564 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false, 565 RCXShadowSlot) 566 .addReg(X86::RCX); 567 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false, 568 RDXShadowSlot) 569 .addReg(X86::RDX); 570 } else { 571 // Not in the prolog. Copy RAX to a virtual reg. 572 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX); 573 } 574 575 // Add code to MBB to check for overflow and set the new target stack pointer 576 // to zero if so. 577 BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg) 578 .addReg(ZeroReg, RegState::Undef) 579 .addReg(ZeroReg, RegState::Undef); 580 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP); 581 BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg) 582 .addReg(CopyReg) 583 .addReg(SizeReg); 584 BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg) 585 .addReg(TestReg) 586 .addReg(ZeroReg); 587 588 // FinalReg now holds final stack pointer value, or zero if 589 // allocation would overflow. Compare against the current stack 590 // limit from the thread environment block. Note this limit is the 591 // lowest touched page on the stack, not the point at which the OS 592 // will cause an overflow exception, so this is just an optimization 593 // to avoid unnecessarily touching pages that are below the current 594 // SP but already commited to the stack by the OS. 595 BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg) 596 .addReg(0) 597 .addImm(1) 598 .addReg(0) 599 .addImm(ThreadEnvironmentStackLimit) 600 .addReg(X86::GS); 601 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg); 602 // Jump if the desired stack pointer is at or above the stack limit. 603 BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB); 604 605 // Add code to roundMBB to round the final stack pointer to a page boundary. 606 BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg) 607 .addReg(FinalReg) 608 .addImm(PageMask); 609 BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB); 610 611 // LimitReg now holds the current stack limit, RoundedReg page-rounded 612 // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page 613 // and probe until we reach RoundedReg. 614 if (!InProlog) { 615 BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg) 616 .addReg(LimitReg) 617 .addMBB(RoundMBB) 618 .addReg(ProbeReg) 619 .addMBB(LoopMBB); 620 } 621 622 addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg, 623 false, -PageSize); 624 625 // Probe by storing a byte onto the stack. 626 BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi)) 627 .addReg(ProbeReg) 628 .addImm(1) 629 .addReg(0) 630 .addImm(0) 631 .addReg(0) 632 .addImm(0); 633 BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr)) 634 .addReg(RoundedReg) 635 .addReg(ProbeReg); 636 BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB); 637 638 MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI(); 639 640 // If in prolog, restore RDX and RCX. 641 if (InProlog) { 642 addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm), 643 X86::RCX), 644 X86::RSP, false, RCXShadowSlot); 645 addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm), 646 X86::RDX), 647 X86::RSP, false, RDXShadowSlot); 648 } 649 650 // Now that the probing is done, add code to continueMBB to update 651 // the stack pointer for real. 652 BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP) 653 .addReg(X86::RSP) 654 .addReg(SizeReg); 655 656 // Add the control flow edges we need. 657 MBB.addSuccessor(ContinueMBB); 658 MBB.addSuccessor(RoundMBB); 659 RoundMBB->addSuccessor(LoopMBB); 660 LoopMBB->addSuccessor(ContinueMBB); 661 LoopMBB->addSuccessor(LoopMBB); 662 663 // Mark all the instructions added to the prolog as frame setup. 664 if (InProlog) { 665 for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) { 666 BeforeMBBI->setFlag(MachineInstr::FrameSetup); 667 } 668 for (MachineInstr &MI : *RoundMBB) { 669 MI.setFlag(MachineInstr::FrameSetup); 670 } 671 for (MachineInstr &MI : *LoopMBB) { 672 MI.setFlag(MachineInstr::FrameSetup); 673 } 674 for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin(); 675 CMBBI != ContinueMBBI; ++CMBBI) { 676 CMBBI->setFlag(MachineInstr::FrameSetup); 677 } 678 } 679 680 // Possible TODO: physreg liveness for InProlog case. 681 682 return ContinueMBBI; 683} 684 685MachineInstr *X86FrameLowering::emitStackProbeCall( 686 MachineFunction &MF, MachineBasicBlock &MBB, 687 MachineBasicBlock::iterator MBBI, DebugLoc DL, bool InProlog) const { 688 bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large; 689 690 unsigned CallOp; 691 if (Is64Bit) 692 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32; 693 else 694 CallOp = X86::CALLpcrel32; 695 696 const char *Symbol; 697 if (Is64Bit) { 698 if (STI.isTargetCygMing()) { 699 Symbol = "___chkstk_ms"; 700 } else { 701 Symbol = "__chkstk"; 702 } 703 } else if (STI.isTargetCygMing()) 704 Symbol = "_alloca"; 705 else 706 Symbol = "_chkstk"; 707 708 MachineInstrBuilder CI; 709 MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI); 710 711 // All current stack probes take AX and SP as input, clobber flags, and 712 // preserve all registers. x86_64 probes leave RSP unmodified. 713 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) { 714 // For the large code model, we have to call through a register. Use R11, 715 // as it is scratch in all supported calling conventions. 716 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11) 717 .addExternalSymbol(Symbol); 718 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11); 719 } else { 720 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol); 721 } 722 723 unsigned AX = Is64Bit ? X86::RAX : X86::EAX; 724 unsigned SP = Is64Bit ? X86::RSP : X86::ESP; 725 CI.addReg(AX, RegState::Implicit) 726 .addReg(SP, RegState::Implicit) 727 .addReg(AX, RegState::Define | RegState::Implicit) 728 .addReg(SP, RegState::Define | RegState::Implicit) 729 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); 730 731 if (Is64Bit) { 732 // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp 733 // themselves. It also does not clobber %rax so we can reuse it when 734 // adjusting %rsp. 735 BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP) 736 .addReg(X86::RSP) 737 .addReg(X86::RAX); 738 } 739 740 if (InProlog) { 741 // Apply the frame setup flag to all inserted instrs. 742 for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI) 743 ExpansionMBBI->setFlag(MachineInstr::FrameSetup); 744 } 745 746 return MBBI; 747} 748 749MachineInstr *X86FrameLowering::emitStackProbeInlineStub( 750 MachineFunction &MF, MachineBasicBlock &MBB, 751 MachineBasicBlock::iterator MBBI, DebugLoc DL, bool InProlog) const { 752 753 assert(InProlog && "ChkStkStub called outside prolog!"); 754 755 BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32)) 756 .addExternalSymbol("__chkstk_stub"); 757 758 return MBBI; 759} 760 761static unsigned calculateSetFPREG(uint64_t SPAdjust) { 762 // Win64 ABI has a less restrictive limitation of 240; 128 works equally well 763 // and might require smaller successive adjustments. 764 const uint64_t Win64MaxSEHOffset = 128; 765 uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset); 766 // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode. 767 return SEHFrameOffset & -16; 768} 769 770// If we're forcing a stack realignment we can't rely on just the frame 771// info, we need to know the ABI stack alignment as well in case we 772// have a call out. Otherwise just make sure we have some alignment - we'll 773// go with the minimum SlotSize. 774uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const { 775 const MachineFrameInfo *MFI = MF.getFrameInfo(); 776 uint64_t MaxAlign = MFI->getMaxAlignment(); // Desired stack alignment. 777 unsigned StackAlign = getStackAlignment(); 778 if (MF.getFunction()->hasFnAttribute("stackrealign")) { 779 if (MFI->hasCalls()) 780 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign; 781 else if (MaxAlign < SlotSize) 782 MaxAlign = SlotSize; 783 } 784 return MaxAlign; 785} 786 787void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB, 788 MachineBasicBlock::iterator MBBI, 789 DebugLoc DL, unsigned Reg, 790 uint64_t MaxAlign) const { 791 uint64_t Val = -MaxAlign; 792 unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val); 793 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg) 794 .addReg(Reg) 795 .addImm(Val) 796 .setMIFlag(MachineInstr::FrameSetup); 797 798 // The EFLAGS implicit def is dead. 799 MI->getOperand(3).setIsDead(); 800} 801 802/// emitPrologue - Push callee-saved registers onto the stack, which 803/// automatically adjust the stack pointer. Adjust the stack pointer to allocate 804/// space for local variables. Also emit labels used by the exception handler to 805/// generate the exception handling frames. 806 807/* 808 Here's a gist of what gets emitted: 809 810 ; Establish frame pointer, if needed 811 [if needs FP] 812 push %rbp 813 .cfi_def_cfa_offset 16 814 .cfi_offset %rbp, -16 815 .seh_pushreg %rpb 816 mov %rsp, %rbp 817 .cfi_def_cfa_register %rbp 818 819 ; Spill general-purpose registers 820 [for all callee-saved GPRs] 821 pushq %<reg> 822 [if not needs FP] 823 .cfi_def_cfa_offset (offset from RETADDR) 824 .seh_pushreg %<reg> 825 826 ; If the required stack alignment > default stack alignment 827 ; rsp needs to be re-aligned. This creates a "re-alignment gap" 828 ; of unknown size in the stack frame. 829 [if stack needs re-alignment] 830 and $MASK, %rsp 831 832 ; Allocate space for locals 833 [if target is Windows and allocated space > 4096 bytes] 834 ; Windows needs special care for allocations larger 835 ; than one page. 836 mov $NNN, %rax 837 call ___chkstk_ms/___chkstk 838 sub %rax, %rsp 839 [else] 840 sub $NNN, %rsp 841 842 [if needs FP] 843 .seh_stackalloc (size of XMM spill slots) 844 .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots 845 [else] 846 .seh_stackalloc NNN 847 848 ; Spill XMMs 849 ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved, 850 ; they may get spilled on any platform, if the current function 851 ; calls @llvm.eh.unwind.init 852 [if needs FP] 853 [for all callee-saved XMM registers] 854 movaps %<xmm reg>, -MMM(%rbp) 855 [for all callee-saved XMM registers] 856 .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset) 857 ; i.e. the offset relative to (%rbp - SEHFrameOffset) 858 [else] 859 [for all callee-saved XMM registers] 860 movaps %<xmm reg>, KKK(%rsp) 861 [for all callee-saved XMM registers] 862 .seh_savexmm %<xmm reg>, KKK 863 864 .seh_endprologue 865 866 [if needs base pointer] 867 mov %rsp, %rbx 868 [if needs to restore base pointer] 869 mov %rsp, -MMM(%rbp) 870 871 ; Emit CFI info 872 [if needs FP] 873 [for all callee-saved registers] 874 .cfi_offset %<reg>, (offset from %rbp) 875 [else] 876 .cfi_def_cfa_offset (offset from RETADDR) 877 [for all callee-saved registers] 878 .cfi_offset %<reg>, (offset from %rsp) 879 880 Notes: 881 - .seh directives are emitted only for Windows 64 ABI 882 - .cfi directives are emitted for all other ABIs 883 - for 32-bit code, substitute %e?? registers for %r?? 884*/ 885 886void X86FrameLowering::emitPrologue(MachineFunction &MF, 887 MachineBasicBlock &MBB) const { 888 assert(&STI == &MF.getSubtarget<X86Subtarget>() && 889 "MF used frame lowering for wrong subtarget"); 890 MachineBasicBlock::iterator MBBI = MBB.begin(); 891 MachineFrameInfo *MFI = MF.getFrameInfo(); 892 const Function *Fn = MF.getFunction(); 893 MachineModuleInfo &MMI = MF.getMMI(); 894 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 895 uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment. 896 uint64_t StackSize = MFI->getStackSize(); // Number of bytes to allocate. 897 bool IsFunclet = MBB.isEHFuncletEntry(); 898 EHPersonality Personality = EHPersonality::Unknown; 899 if (Fn->hasPersonalityFn()) 900 Personality = classifyEHPersonality(Fn->getPersonalityFn()); 901 bool FnHasClrFunclet = 902 MMI.hasEHFunclets() && Personality == EHPersonality::CoreCLR; 903 bool IsClrFunclet = IsFunclet && FnHasClrFunclet; 904 bool HasFP = hasFP(MF); 905 bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv()); 906 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI(); 907 bool NeedsWinCFI = IsWin64Prologue && Fn->needsUnwindTableEntry(); 908 bool NeedsDwarfCFI = 909 !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry()); 910 unsigned FramePtr = TRI->getFrameRegister(MF); 911 const unsigned MachineFramePtr = 912 STI.isTarget64BitILP32() 913 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; 914 unsigned BasePtr = TRI->getBaseRegister(); 915 916 // Debug location must be unknown since the first debug location is used 917 // to determine the end of the prologue. 918 DebugLoc DL; 919 920 // Add RETADDR move area to callee saved frame size. 921 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); 922 if (TailCallReturnAddrDelta && IsWin64Prologue) 923 report_fatal_error("Can't handle guaranteed tail call under win64 yet"); 924 925 if (TailCallReturnAddrDelta < 0) 926 X86FI->setCalleeSavedFrameSize( 927 X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta); 928 929 bool UseStackProbe = (STI.isOSWindows() && !STI.isTargetMachO()); 930 931 // The default stack probe size is 4096 if the function has no stackprobesize 932 // attribute. 933 unsigned StackProbeSize = 4096; 934 if (Fn->hasFnAttribute("stack-probe-size")) 935 Fn->getFnAttribute("stack-probe-size") 936 .getValueAsString() 937 .getAsInteger(0, StackProbeSize); 938 939 // If this is x86-64 and the Red Zone is not disabled, if we are a leaf 940 // function, and use up to 128 bytes of stack space, don't have a frame 941 // pointer, calls, or dynamic alloca then we do not need to adjust the 942 // stack pointer (we fit in the Red Zone). We also check that we don't 943 // push and pop from the stack. 944 if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) && 945 !TRI->needsStackRealignment(MF) && 946 !MFI->hasVarSizedObjects() && // No dynamic alloca. 947 !MFI->adjustsStack() && // No calls. 948 !IsWin64CC && // Win64 has no Red Zone 949 !MFI->hasCopyImplyingStackAdjustment() && // Don't push and pop. 950 !MF.shouldSplitStack()) { // Regular stack 951 uint64_t MinSize = X86FI->getCalleeSavedFrameSize(); 952 if (HasFP) MinSize += SlotSize; 953 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0); 954 MFI->setStackSize(StackSize); 955 } 956 957 // Insert stack pointer adjustment for later moving of return addr. Only 958 // applies to tail call optimized functions where the callee argument stack 959 // size is bigger than the callers. 960 if (TailCallReturnAddrDelta < 0) { 961 BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta, 962 /*InEpilogue=*/false) 963 .setMIFlag(MachineInstr::FrameSetup); 964 } 965 966 // Mapping for machine moves: 967 // 968 // DST: VirtualFP AND 969 // SRC: VirtualFP => DW_CFA_def_cfa_offset 970 // ELSE => DW_CFA_def_cfa 971 // 972 // SRC: VirtualFP AND 973 // DST: Register => DW_CFA_def_cfa_register 974 // 975 // ELSE 976 // OFFSET < 0 => DW_CFA_offset_extended_sf 977 // REG < 64 => DW_CFA_offset + Reg 978 // ELSE => DW_CFA_offset_extended 979 980 uint64_t NumBytes = 0; 981 int stackGrowth = -SlotSize; 982 983 // Find the funclet establisher parameter 984 unsigned Establisher = X86::NoRegister; 985 if (IsClrFunclet) 986 Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX; 987 else if (IsFunclet) 988 Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX; 989 990 if (IsWin64Prologue && IsFunclet && !IsClrFunclet) { 991 // Immediately spill establisher into the home slot. 992 // The runtime cares about this. 993 // MOV64mr %rdx, 16(%rsp) 994 unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr; 995 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16) 996 .addReg(Establisher) 997 .setMIFlag(MachineInstr::FrameSetup); 998 MBB.addLiveIn(Establisher); 999 } 1000 1001 if (HasFP) { 1002 // Calculate required stack adjustment. 1003 uint64_t FrameSize = StackSize - SlotSize; 1004 // If required, include space for extra hidden slot for stashing base pointer. 1005 if (X86FI->getRestoreBasePointer()) 1006 FrameSize += SlotSize; 1007 1008 NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize(); 1009 1010 // Callee-saved registers are pushed on stack before the stack is realigned. 1011 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue) 1012 NumBytes = RoundUpToAlignment(NumBytes, MaxAlign); 1013 1014 // Get the offset of the stack slot for the EBP register, which is 1015 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized. 1016 // Update the frame offset adjustment. 1017 if (!IsFunclet) 1018 MFI->setOffsetAdjustment(-NumBytes); 1019 else 1020 assert(MFI->getOffsetAdjustment() == -(int)NumBytes && 1021 "should calculate same local variable offset for funclets"); 1022 1023 // Save EBP/RBP into the appropriate stack slot. 1024 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) 1025 .addReg(MachineFramePtr, RegState::Kill) 1026 .setMIFlag(MachineInstr::FrameSetup); 1027 1028 if (NeedsDwarfCFI) { 1029 // Mark the place where EBP/RBP was saved. 1030 // Define the current CFA rule to use the provided offset. 1031 assert(StackSize); 1032 BuildCFI(MBB, MBBI, DL, 1033 MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth)); 1034 1035 // Change the rule for the FramePtr to be an "offset" rule. 1036 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true); 1037 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createOffset( 1038 nullptr, DwarfFramePtr, 2 * stackGrowth)); 1039 } 1040 1041 if (NeedsWinCFI) { 1042 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)) 1043 .addImm(FramePtr) 1044 .setMIFlag(MachineInstr::FrameSetup); 1045 } 1046 1047 if (!IsWin64Prologue && !IsFunclet) { 1048 // Update EBP with the new base value. 1049 BuildMI(MBB, MBBI, DL, 1050 TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), 1051 FramePtr) 1052 .addReg(StackPtr) 1053 .setMIFlag(MachineInstr::FrameSetup); 1054 1055 if (NeedsDwarfCFI) { 1056 // Mark effective beginning of when frame pointer becomes valid. 1057 // Define the current CFA to use the EBP/RBP register. 1058 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true); 1059 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaRegister( 1060 nullptr, DwarfFramePtr)); 1061 } 1062 } 1063 1064 // Mark the FramePtr as live-in in every block. Don't do this again for 1065 // funclet prologues. 1066 if (!IsFunclet) { 1067 for (MachineBasicBlock &EveryMBB : MF) 1068 EveryMBB.addLiveIn(MachineFramePtr); 1069 } 1070 } else { 1071 assert(!IsFunclet && "funclets without FPs not yet implemented"); 1072 NumBytes = StackSize - X86FI->getCalleeSavedFrameSize(); 1073 } 1074 1075 // For EH funclets, only allocate enough space for outgoing calls. Save the 1076 // NumBytes value that we would've used for the parent frame. 1077 unsigned ParentFrameNumBytes = NumBytes; 1078 if (IsFunclet) 1079 NumBytes = getWinEHFuncletFrameSize(MF); 1080 1081 // Skip the callee-saved push instructions. 1082 bool PushedRegs = false; 1083 int StackOffset = 2 * stackGrowth; 1084 1085 while (MBBI != MBB.end() && 1086 MBBI->getFlag(MachineInstr::FrameSetup) && 1087 (MBBI->getOpcode() == X86::PUSH32r || 1088 MBBI->getOpcode() == X86::PUSH64r)) { 1089 PushedRegs = true; 1090 unsigned Reg = MBBI->getOperand(0).getReg(); 1091 ++MBBI; 1092 1093 if (!HasFP && NeedsDwarfCFI) { 1094 // Mark callee-saved push instruction. 1095 // Define the current CFA rule to use the provided offset. 1096 assert(StackSize); 1097 BuildCFI(MBB, MBBI, DL, 1098 MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset)); 1099 StackOffset += stackGrowth; 1100 } 1101 1102 if (NeedsWinCFI) { 1103 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag( 1104 MachineInstr::FrameSetup); 1105 } 1106 } 1107 1108 // Realign stack after we pushed callee-saved registers (so that we'll be 1109 // able to calculate their offsets from the frame pointer). 1110 // Don't do this for Win64, it needs to realign the stack after the prologue. 1111 if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) { 1112 assert(HasFP && "There should be a frame pointer if stack is realigned."); 1113 BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign); 1114 } 1115 1116 // If there is an SUB32ri of ESP immediately before this instruction, merge 1117 // the two. This can be the case when tail call elimination is enabled and 1118 // the callee has more arguments then the caller. 1119 NumBytes -= mergeSPUpdates(MBB, MBBI, true); 1120 1121 // Adjust stack pointer: ESP -= numbytes. 1122 1123 // Windows and cygwin/mingw require a prologue helper routine when allocating 1124 // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw 1125 // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the 1126 // stack and adjust the stack pointer in one go. The 64-bit version of 1127 // __chkstk is only responsible for probing the stack. The 64-bit prologue is 1128 // responsible for adjusting the stack pointer. Touching the stack at 4K 1129 // increments is necessary to ensure that the guard pages used by the OS 1130 // virtual memory manager are allocated in correct sequence. 1131 uint64_t AlignedNumBytes = NumBytes; 1132 if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) 1133 AlignedNumBytes = RoundUpToAlignment(AlignedNumBytes, MaxAlign); 1134 if (AlignedNumBytes >= StackProbeSize && UseStackProbe) { 1135 // Check whether EAX is livein for this block. 1136 bool isEAXAlive = isEAXLiveIn(MBB); 1137 1138 if (isEAXAlive) { 1139 // Sanity check that EAX is not livein for this function. 1140 // It should not be, so throw an assert. 1141 assert(!Is64Bit && "EAX is livein in x64 case!"); 1142 1143 // Save EAX 1144 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r)) 1145 .addReg(X86::EAX, RegState::Kill) 1146 .setMIFlag(MachineInstr::FrameSetup); 1147 } 1148 1149 if (Is64Bit) { 1150 // Handle the 64-bit Windows ABI case where we need to call __chkstk. 1151 // Function prologue is responsible for adjusting the stack pointer. 1152 if (isUInt<32>(NumBytes)) { 1153 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) 1154 .addImm(NumBytes) 1155 .setMIFlag(MachineInstr::FrameSetup); 1156 } else if (isInt<32>(NumBytes)) { 1157 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX) 1158 .addImm(NumBytes) 1159 .setMIFlag(MachineInstr::FrameSetup); 1160 } else { 1161 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX) 1162 .addImm(NumBytes) 1163 .setMIFlag(MachineInstr::FrameSetup); 1164 } 1165 } else { 1166 // Allocate NumBytes-4 bytes on stack in case of isEAXAlive. 1167 // We'll also use 4 already allocated bytes for EAX. 1168 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX) 1169 .addImm(isEAXAlive ? NumBytes - 4 : NumBytes) 1170 .setMIFlag(MachineInstr::FrameSetup); 1171 } 1172 1173 // Call __chkstk, __chkstk_ms, or __alloca. 1174 emitStackProbe(MF, MBB, MBBI, DL, true); 1175 1176 if (isEAXAlive) { 1177 // Restore EAX 1178 MachineInstr *MI = 1179 addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX), 1180 StackPtr, false, NumBytes - 4); 1181 MI->setFlag(MachineInstr::FrameSetup); 1182 MBB.insert(MBBI, MI); 1183 } 1184 } else if (NumBytes) { 1185 emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false); 1186 } 1187 1188 if (NeedsWinCFI && NumBytes) 1189 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc)) 1190 .addImm(NumBytes) 1191 .setMIFlag(MachineInstr::FrameSetup); 1192 1193 int SEHFrameOffset = 0; 1194 unsigned SPOrEstablisher; 1195 if (IsFunclet) { 1196 if (IsClrFunclet) { 1197 // The establisher parameter passed to a CLR funclet is actually a pointer 1198 // to the (mostly empty) frame of its nearest enclosing funclet; we have 1199 // to find the root function establisher frame by loading the PSPSym from 1200 // the intermediate frame. 1201 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF); 1202 MachinePointerInfo NoInfo; 1203 MBB.addLiveIn(Establisher); 1204 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher), 1205 Establisher, false, PSPSlotOffset) 1206 .addMemOperand(MF.getMachineMemOperand( 1207 NoInfo, MachineMemOperand::MOLoad, SlotSize, SlotSize)); 1208 ; 1209 // Save the root establisher back into the current funclet's (mostly 1210 // empty) frame, in case a sub-funclet or the GC needs it. 1211 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, 1212 false, PSPSlotOffset) 1213 .addReg(Establisher) 1214 .addMemOperand( 1215 MF.getMachineMemOperand(NoInfo, MachineMemOperand::MOStore | 1216 MachineMemOperand::MOVolatile, 1217 SlotSize, SlotSize)); 1218 } 1219 SPOrEstablisher = Establisher; 1220 } else { 1221 SPOrEstablisher = StackPtr; 1222 } 1223 1224 if (IsWin64Prologue && HasFP) { 1225 // Set RBP to a small fixed offset from RSP. In the funclet case, we base 1226 // this calculation on the incoming establisher, which holds the value of 1227 // RSP from the parent frame at the end of the prologue. 1228 SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes); 1229 if (SEHFrameOffset) 1230 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), 1231 SPOrEstablisher, false, SEHFrameOffset); 1232 else 1233 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr) 1234 .addReg(SPOrEstablisher); 1235 1236 // If this is not a funclet, emit the CFI describing our frame pointer. 1237 if (NeedsWinCFI && !IsFunclet) { 1238 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame)) 1239 .addImm(FramePtr) 1240 .addImm(SEHFrameOffset) 1241 .setMIFlag(MachineInstr::FrameSetup); 1242 if (isAsynchronousEHPersonality(Personality)) 1243 MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset; 1244 } 1245 } else if (IsFunclet && STI.is32Bit()) { 1246 // Reset EBP / ESI to something good for funclets. 1247 MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL); 1248 // If we're a catch funclet, we can be returned to via catchret. Save ESP 1249 // into the registration node so that the runtime will restore it for us. 1250 if (!MBB.isCleanupFuncletEntry()) { 1251 assert(Personality == EHPersonality::MSVC_CXX); 1252 unsigned FrameReg; 1253 int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex; 1254 int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg); 1255 // ESP is the first field, so no extra displacement is needed. 1256 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg, 1257 false, EHRegOffset) 1258 .addReg(X86::ESP); 1259 } 1260 } 1261 1262 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) { 1263 const MachineInstr *FrameInstr = &*MBBI; 1264 ++MBBI; 1265 1266 if (NeedsWinCFI) { 1267 int FI; 1268 if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) { 1269 if (X86::FR64RegClass.contains(Reg)) { 1270 unsigned IgnoredFrameReg; 1271 int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg); 1272 Offset += SEHFrameOffset; 1273 1274 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM)) 1275 .addImm(Reg) 1276 .addImm(Offset) 1277 .setMIFlag(MachineInstr::FrameSetup); 1278 } 1279 } 1280 } 1281 } 1282 1283 if (NeedsWinCFI) 1284 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue)) 1285 .setMIFlag(MachineInstr::FrameSetup); 1286 1287 if (FnHasClrFunclet && !IsFunclet) { 1288 // Save the so-called Initial-SP (i.e. the value of the stack pointer 1289 // immediately after the prolog) into the PSPSlot so that funclets 1290 // and the GC can recover it. 1291 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF); 1292 auto PSPInfo = MachinePointerInfo::getFixedStack( 1293 MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx); 1294 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false, 1295 PSPSlotOffset) 1296 .addReg(StackPtr) 1297 .addMemOperand(MF.getMachineMemOperand( 1298 PSPInfo, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile, 1299 SlotSize, SlotSize)); 1300 } 1301 1302 // Realign stack after we spilled callee-saved registers (so that we'll be 1303 // able to calculate their offsets from the frame pointer). 1304 // Win64 requires aligning the stack after the prologue. 1305 if (IsWin64Prologue && TRI->needsStackRealignment(MF)) { 1306 assert(HasFP && "There should be a frame pointer if stack is realigned."); 1307 BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign); 1308 } 1309 1310 // We already dealt with stack realignment and funclets above. 1311 if (IsFunclet && STI.is32Bit()) 1312 return; 1313 1314 // If we need a base pointer, set it up here. It's whatever the value 1315 // of the stack pointer is at this point. Any variable size objects 1316 // will be allocated after this, so we can still use the base pointer 1317 // to reference locals. 1318 if (TRI->hasBasePointer(MF)) { 1319 // Update the base pointer with the current stack pointer. 1320 unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr; 1321 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr) 1322 .addReg(SPOrEstablisher) 1323 .setMIFlag(MachineInstr::FrameSetup); 1324 if (X86FI->getRestoreBasePointer()) { 1325 // Stash value of base pointer. Saving RSP instead of EBP shortens 1326 // dependence chain. Used by SjLj EH. 1327 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr; 1328 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), 1329 FramePtr, true, X86FI->getRestoreBasePointerOffset()) 1330 .addReg(SPOrEstablisher) 1331 .setMIFlag(MachineInstr::FrameSetup); 1332 } 1333 1334 if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) { 1335 // Stash the value of the frame pointer relative to the base pointer for 1336 // Win32 EH. This supports Win32 EH, which does the inverse of the above: 1337 // it recovers the frame pointer from the base pointer rather than the 1338 // other way around. 1339 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr; 1340 unsigned UsedReg; 1341 int Offset = 1342 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg); 1343 assert(UsedReg == BasePtr); 1344 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset) 1345 .addReg(FramePtr) 1346 .setMIFlag(MachineInstr::FrameSetup); 1347 } 1348 } 1349 1350 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) { 1351 // Mark end of stack pointer adjustment. 1352 if (!HasFP && NumBytes) { 1353 // Define the current CFA rule to use the provided offset. 1354 assert(StackSize); 1355 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaOffset( 1356 nullptr, -StackSize + stackGrowth)); 1357 } 1358 1359 // Emit DWARF info specifying the offsets of the callee-saved registers. 1360 if (PushedRegs) 1361 emitCalleeSavedFrameMoves(MBB, MBBI, DL); 1362 } 1363} 1364 1365bool X86FrameLowering::canUseLEAForSPInEpilogue( 1366 const MachineFunction &MF) const { 1367 // We can't use LEA instructions for adjusting the stack pointer if this is a 1368 // leaf function in the Win64 ABI. Only ADD instructions may be used to 1369 // deallocate the stack. 1370 // This means that we can use LEA for SP in two situations: 1371 // 1. We *aren't* using the Win64 ABI which means we are free to use LEA. 1372 // 2. We *have* a frame pointer which means we are permitted to use LEA. 1373 return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF); 1374} 1375 1376static bool isFuncletReturnInstr(MachineInstr *MI) { 1377 switch (MI->getOpcode()) { 1378 case X86::CATCHRET: 1379 case X86::CLEANUPRET: 1380 return true; 1381 default: 1382 return false; 1383 } 1384 llvm_unreachable("impossible"); 1385} 1386 1387// CLR funclets use a special "Previous Stack Pointer Symbol" slot on the 1388// stack. It holds a pointer to the bottom of the root function frame. The 1389// establisher frame pointer passed to a nested funclet may point to the 1390// (mostly empty) frame of its parent funclet, but it will need to find 1391// the frame of the root function to access locals. To facilitate this, 1392// every funclet copies the pointer to the bottom of the root function 1393// frame into a PSPSym slot in its own (mostly empty) stack frame. Using the 1394// same offset for the PSPSym in the root function frame that's used in the 1395// funclets' frames allows each funclet to dynamically accept any ancestor 1396// frame as its establisher argument (the runtime doesn't guarantee the 1397// immediate parent for some reason lost to history), and also allows the GC, 1398// which uses the PSPSym for some bookkeeping, to find it in any funclet's 1399// frame with only a single offset reported for the entire method. 1400unsigned 1401X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const { 1402 const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo(); 1403 // getFrameIndexReferenceFromSP has an out ref parameter for the stack 1404 // pointer register; pass a dummy that we ignore 1405 unsigned SPReg; 1406 int Offset = getFrameIndexReferenceFromSP(MF, Info.PSPSymFrameIdx, SPReg); 1407 assert(Offset >= 0); 1408 return static_cast<unsigned>(Offset); 1409} 1410 1411unsigned 1412X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const { 1413 // This is the size of the pushed CSRs. 1414 unsigned CSSize = 1415 MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize(); 1416 // This is the amount of stack a funclet needs to allocate. 1417 unsigned UsedSize; 1418 EHPersonality Personality = 1419 classifyEHPersonality(MF.getFunction()->getPersonalityFn()); 1420 if (Personality == EHPersonality::CoreCLR) { 1421 // CLR funclets need to hold enough space to include the PSPSym, at the 1422 // same offset from the stack pointer (immediately after the prolog) as it 1423 // resides at in the main function. 1424 UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize; 1425 } else { 1426 // Other funclets just need enough stack for outgoing call arguments. 1427 UsedSize = MF.getFrameInfo()->getMaxCallFrameSize(); 1428 } 1429 // RBP is not included in the callee saved register block. After pushing RBP, 1430 // everything is 16 byte aligned. Everything we allocate before an outgoing 1431 // call must also be 16 byte aligned. 1432 unsigned FrameSizeMinusRBP = 1433 RoundUpToAlignment(CSSize + UsedSize, getStackAlignment()); 1434 // Subtract out the size of the callee saved registers. This is how much stack 1435 // each funclet will allocate. 1436 return FrameSizeMinusRBP - CSSize; 1437} 1438 1439void X86FrameLowering::emitEpilogue(MachineFunction &MF, 1440 MachineBasicBlock &MBB) const { 1441 const MachineFrameInfo *MFI = MF.getFrameInfo(); 1442 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 1443 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator(); 1444 DebugLoc DL; 1445 if (MBBI != MBB.end()) 1446 DL = MBBI->getDebugLoc(); 1447 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit. 1448 const bool Is64BitILP32 = STI.isTarget64BitILP32(); 1449 unsigned FramePtr = TRI->getFrameRegister(MF); 1450 unsigned MachineFramePtr = 1451 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; 1452 1453 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI(); 1454 bool NeedsWinCFI = 1455 IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry(); 1456 bool IsFunclet = isFuncletReturnInstr(MBBI); 1457 MachineBasicBlock *TargetMBB = nullptr; 1458 1459 // Get the number of bytes to allocate from the FrameInfo. 1460 uint64_t StackSize = MFI->getStackSize(); 1461 uint64_t MaxAlign = calculateMaxStackAlign(MF); 1462 unsigned CSSize = X86FI->getCalleeSavedFrameSize(); 1463 uint64_t NumBytes = 0; 1464 1465 if (MBBI->getOpcode() == X86::CATCHRET) { 1466 // SEH shouldn't use catchret. 1467 assert(!isAsynchronousEHPersonality( 1468 classifyEHPersonality(MF.getFunction()->getPersonalityFn())) && 1469 "SEH should not use CATCHRET"); 1470 1471 NumBytes = getWinEHFuncletFrameSize(MF); 1472 assert(hasFP(MF) && "EH funclets without FP not yet implemented"); 1473 TargetMBB = MBBI->getOperand(0).getMBB(); 1474 1475 // Pop EBP. 1476 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r), 1477 MachineFramePtr) 1478 .setMIFlag(MachineInstr::FrameDestroy); 1479 } else if (MBBI->getOpcode() == X86::CLEANUPRET) { 1480 NumBytes = getWinEHFuncletFrameSize(MF); 1481 assert(hasFP(MF) && "EH funclets without FP not yet implemented"); 1482 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r), 1483 MachineFramePtr) 1484 .setMIFlag(MachineInstr::FrameDestroy); 1485 } else if (hasFP(MF)) { 1486 // Calculate required stack adjustment. 1487 uint64_t FrameSize = StackSize - SlotSize; 1488 NumBytes = FrameSize - CSSize; 1489 1490 // Callee-saved registers were pushed on stack before the stack was 1491 // realigned. 1492 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue) 1493 NumBytes = RoundUpToAlignment(FrameSize, MaxAlign); 1494 1495 // Pop EBP. 1496 BuildMI(MBB, MBBI, DL, 1497 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr) 1498 .setMIFlag(MachineInstr::FrameDestroy); 1499 } else { 1500 NumBytes = StackSize - CSSize; 1501 } 1502 uint64_t SEHStackAllocAmt = NumBytes; 1503 1504 // Skip the callee-saved pop instructions. 1505 while (MBBI != MBB.begin()) { 1506 MachineBasicBlock::iterator PI = std::prev(MBBI); 1507 unsigned Opc = PI->getOpcode(); 1508 1509 if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) && 1510 (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)) && 1511 Opc != X86::DBG_VALUE && !PI->isTerminator()) 1512 break; 1513 1514 --MBBI; 1515 } 1516 MachineBasicBlock::iterator FirstCSPop = MBBI; 1517 1518 if (TargetMBB) { 1519 // Fill EAX/RAX with the address of the target block. 1520 unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX; 1521 if (STI.is64Bit()) { 1522 // LEA64r TargetMBB(%rip), %rax 1523 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg) 1524 .addReg(X86::RIP) 1525 .addImm(0) 1526 .addReg(0) 1527 .addMBB(TargetMBB) 1528 .addReg(0); 1529 } else { 1530 // MOV32ri $TargetMBB, %eax 1531 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg) 1532 .addMBB(TargetMBB); 1533 } 1534 // Record that we've taken the address of TargetMBB and no longer just 1535 // reference it in a terminator. 1536 TargetMBB->setHasAddressTaken(); 1537 } 1538 1539 if (MBBI != MBB.end()) 1540 DL = MBBI->getDebugLoc(); 1541 1542 // If there is an ADD32ri or SUB32ri of ESP immediately before this 1543 // instruction, merge the two instructions. 1544 if (NumBytes || MFI->hasVarSizedObjects()) 1545 NumBytes += mergeSPUpdates(MBB, MBBI, true); 1546 1547 // If dynamic alloca is used, then reset esp to point to the last callee-saved 1548 // slot before popping them off! Same applies for the case, when stack was 1549 // realigned. Don't do this if this was a funclet epilogue, since the funclets 1550 // will not do realignment or dynamic stack allocation. 1551 if ((TRI->needsStackRealignment(MF) || MFI->hasVarSizedObjects()) && 1552 !IsFunclet) { 1553 if (TRI->needsStackRealignment(MF)) 1554 MBBI = FirstCSPop; 1555 unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt); 1556 uint64_t LEAAmount = 1557 IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize; 1558 1559 // There are only two legal forms of epilogue: 1560 // - add SEHAllocationSize, %rsp 1561 // - lea SEHAllocationSize(%FramePtr), %rsp 1562 // 1563 // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence. 1564 // However, we may use this sequence if we have a frame pointer because the 1565 // effects of the prologue can safely be undone. 1566 if (LEAAmount != 0) { 1567 unsigned Opc = getLEArOpcode(Uses64BitFramePtr); 1568 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), 1569 FramePtr, false, LEAAmount); 1570 --MBBI; 1571 } else { 1572 unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr); 1573 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr) 1574 .addReg(FramePtr); 1575 --MBBI; 1576 } 1577 } else if (NumBytes) { 1578 // Adjust stack pointer back: ESP += numbytes. 1579 emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true); 1580 --MBBI; 1581 } 1582 1583 // Windows unwinder will not invoke function's exception handler if IP is 1584 // either in prologue or in epilogue. This behavior causes a problem when a 1585 // call immediately precedes an epilogue, because the return address points 1586 // into the epilogue. To cope with that, we insert an epilogue marker here, 1587 // then replace it with a 'nop' if it ends up immediately after a CALL in the 1588 // final emitted code. 1589 if (NeedsWinCFI) 1590 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue)); 1591 1592 // Add the return addr area delta back since we are not tail calling. 1593 int Offset = -1 * X86FI->getTCReturnAddrDelta(); 1594 assert(Offset >= 0 && "TCDelta should never be positive"); 1595 if (Offset) { 1596 MBBI = MBB.getFirstTerminator(); 1597 1598 // Check for possible merge with preceding ADD instruction. 1599 Offset += mergeSPUpdates(MBB, MBBI, true); 1600 emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true); 1601 } 1602} 1603 1604// NOTE: this only has a subset of the full frame index logic. In 1605// particular, the FI < 0 and AfterFPPop logic is handled in 1606// X86RegisterInfo::eliminateFrameIndex, but not here. Possibly 1607// (probably?) it should be moved into here. 1608int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI, 1609 unsigned &FrameReg) const { 1610 const MachineFrameInfo *MFI = MF.getFrameInfo(); 1611 1612 // We can't calculate offset from frame pointer if the stack is realigned, 1613 // so enforce usage of stack/base pointer. The base pointer is used when we 1614 // have dynamic allocas in addition to dynamic realignment. 1615 if (TRI->hasBasePointer(MF)) 1616 FrameReg = TRI->getBaseRegister(); 1617 else if (TRI->needsStackRealignment(MF)) 1618 FrameReg = TRI->getStackRegister(); 1619 else 1620 FrameReg = TRI->getFrameRegister(MF); 1621 1622 // Offset will hold the offset from the stack pointer at function entry to the 1623 // object. 1624 // We need to factor in additional offsets applied during the prologue to the 1625 // frame, base, and stack pointer depending on which is used. 1626 int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea(); 1627 const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 1628 unsigned CSSize = X86FI->getCalleeSavedFrameSize(); 1629 uint64_t StackSize = MFI->getStackSize(); 1630 bool HasFP = hasFP(MF); 1631 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI(); 1632 int64_t FPDelta = 0; 1633 1634 if (IsWin64Prologue) { 1635 assert(!MFI->hasCalls() || (StackSize % 16) == 8); 1636 1637 // Calculate required stack adjustment. 1638 uint64_t FrameSize = StackSize - SlotSize; 1639 // If required, include space for extra hidden slot for stashing base pointer. 1640 if (X86FI->getRestoreBasePointer()) 1641 FrameSize += SlotSize; 1642 uint64_t NumBytes = FrameSize - CSSize; 1643 1644 uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes); 1645 if (FI && FI == X86FI->getFAIndex()) 1646 return -SEHFrameOffset; 1647 1648 // FPDelta is the offset from the "traditional" FP location of the old base 1649 // pointer followed by return address and the location required by the 1650 // restricted Win64 prologue. 1651 // Add FPDelta to all offsets below that go through the frame pointer. 1652 FPDelta = FrameSize - SEHFrameOffset; 1653 assert((!MFI->hasCalls() || (FPDelta % 16) == 0) && 1654 "FPDelta isn't aligned per the Win64 ABI!"); 1655 } 1656 1657 1658 if (TRI->hasBasePointer(MF)) { 1659 assert(HasFP && "VLAs and dynamic stack realign, but no FP?!"); 1660 if (FI < 0) { 1661 // Skip the saved EBP. 1662 return Offset + SlotSize + FPDelta; 1663 } else { 1664 assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0); 1665 return Offset + StackSize; 1666 } 1667 } else if (TRI->needsStackRealignment(MF)) { 1668 if (FI < 0) { 1669 // Skip the saved EBP. 1670 return Offset + SlotSize + FPDelta; 1671 } else { 1672 assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0); 1673 return Offset + StackSize; 1674 } 1675 // FIXME: Support tail calls 1676 } else { 1677 if (!HasFP) 1678 return Offset + StackSize; 1679 1680 // Skip the saved EBP. 1681 Offset += SlotSize; 1682 1683 // Skip the RETADDR move area 1684 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); 1685 if (TailCallReturnAddrDelta < 0) 1686 Offset -= TailCallReturnAddrDelta; 1687 } 1688 1689 return Offset + FPDelta; 1690} 1691 1692// Simplified from getFrameIndexReference keeping only StackPointer cases 1693int X86FrameLowering::getFrameIndexReferenceFromSP(const MachineFunction &MF, 1694 int FI, 1695 unsigned &FrameReg) const { 1696 const MachineFrameInfo *MFI = MF.getFrameInfo(); 1697 // Does not include any dynamic realign. 1698 const uint64_t StackSize = MFI->getStackSize(); 1699 { 1700#ifndef NDEBUG 1701 // LLVM arranges the stack as follows: 1702 // ... 1703 // ARG2 1704 // ARG1 1705 // RETADDR 1706 // PUSH RBP <-- RBP points here 1707 // PUSH CSRs 1708 // ~~~~~~~ <-- possible stack realignment (non-win64) 1709 // ... 1710 // STACK OBJECTS 1711 // ... <-- RSP after prologue points here 1712 // ~~~~~~~ <-- possible stack realignment (win64) 1713 // 1714 // if (hasVarSizedObjects()): 1715 // ... <-- "base pointer" (ESI/RBX) points here 1716 // DYNAMIC ALLOCAS 1717 // ... <-- RSP points here 1718 // 1719 // Case 1: In the simple case of no stack realignment and no dynamic 1720 // allocas, both "fixed" stack objects (arguments and CSRs) are addressable 1721 // with fixed offsets from RSP. 1722 // 1723 // Case 2: In the case of stack realignment with no dynamic allocas, fixed 1724 // stack objects are addressed with RBP and regular stack objects with RSP. 1725 // 1726 // Case 3: In the case of dynamic allocas and stack realignment, RSP is used 1727 // to address stack arguments for outgoing calls and nothing else. The "base 1728 // pointer" points to local variables, and RBP points to fixed objects. 1729 // 1730 // In cases 2 and 3, we can only answer for non-fixed stack objects, and the 1731 // answer we give is relative to the SP after the prologue, and not the 1732 // SP in the middle of the function. 1733 1734 assert((!MFI->isFixedObjectIndex(FI) || !TRI->needsStackRealignment(MF) || 1735 STI.isTargetWin64()) && 1736 "offset from fixed object to SP is not static"); 1737 1738 // We don't handle tail calls, and shouldn't be seeing them either. 1739 int TailCallReturnAddrDelta = 1740 MF.getInfo<X86MachineFunctionInfo>()->getTCReturnAddrDelta(); 1741 assert(!(TailCallReturnAddrDelta < 0) && "we don't handle this case!"); 1742#endif 1743 } 1744 1745 // Fill in FrameReg output argument. 1746 FrameReg = TRI->getStackRegister(); 1747 1748 // This is how the math works out: 1749 // 1750 // %rsp grows (i.e. gets lower) left to right. Each box below is 1751 // one word (eight bytes). Obj0 is the stack slot we're trying to 1752 // get to. 1753 // 1754 // ---------------------------------- 1755 // | BP | Obj0 | Obj1 | ... | ObjN | 1756 // ---------------------------------- 1757 // ^ ^ ^ ^ 1758 // A B C E 1759 // 1760 // A is the incoming stack pointer. 1761 // (B - A) is the local area offset (-8 for x86-64) [1] 1762 // (C - A) is the Offset returned by MFI->getObjectOffset for Obj0 [2] 1763 // 1764 // |(E - B)| is the StackSize (absolute value, positive). For a 1765 // stack that grown down, this works out to be (B - E). [3] 1766 // 1767 // E is also the value of %rsp after stack has been set up, and we 1768 // want (C - E) -- the value we can add to %rsp to get to Obj0. Now 1769 // (C - E) == (C - A) - (B - A) + (B - E) 1770 // { Using [1], [2] and [3] above } 1771 // == getObjectOffset - LocalAreaOffset + StackSize 1772 // 1773 1774 // Get the Offset from the StackPointer 1775 int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea(); 1776 1777 return Offset + StackSize; 1778} 1779 1780bool X86FrameLowering::assignCalleeSavedSpillSlots( 1781 MachineFunction &MF, const TargetRegisterInfo *TRI, 1782 std::vector<CalleeSavedInfo> &CSI) const { 1783 MachineFrameInfo *MFI = MF.getFrameInfo(); 1784 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 1785 1786 unsigned CalleeSavedFrameSize = 0; 1787 int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta(); 1788 1789 if (hasFP(MF)) { 1790 // emitPrologue always spills frame register the first thing. 1791 SpillSlotOffset -= SlotSize; 1792 MFI->CreateFixedSpillStackObject(SlotSize, SpillSlotOffset); 1793 1794 // Since emitPrologue and emitEpilogue will handle spilling and restoring of 1795 // the frame register, we can delete it from CSI list and not have to worry 1796 // about avoiding it later. 1797 unsigned FPReg = TRI->getFrameRegister(MF); 1798 for (unsigned i = 0; i < CSI.size(); ++i) { 1799 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) { 1800 CSI.erase(CSI.begin() + i); 1801 break; 1802 } 1803 } 1804 } 1805 1806 // Assign slots for GPRs. It increases frame size. 1807 for (unsigned i = CSI.size(); i != 0; --i) { 1808 unsigned Reg = CSI[i - 1].getReg(); 1809 1810 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg)) 1811 continue; 1812 1813 SpillSlotOffset -= SlotSize; 1814 CalleeSavedFrameSize += SlotSize; 1815 1816 int SlotIndex = MFI->CreateFixedSpillStackObject(SlotSize, SpillSlotOffset); 1817 CSI[i - 1].setFrameIdx(SlotIndex); 1818 } 1819 1820 X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize); 1821 1822 // Assign slots for XMMs. 1823 for (unsigned i = CSI.size(); i != 0; --i) { 1824 unsigned Reg = CSI[i - 1].getReg(); 1825 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg)) 1826 continue; 1827 1828 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 1829 // ensure alignment 1830 SpillSlotOffset -= std::abs(SpillSlotOffset) % RC->getAlignment(); 1831 // spill into slot 1832 SpillSlotOffset -= RC->getSize(); 1833 int SlotIndex = 1834 MFI->CreateFixedSpillStackObject(RC->getSize(), SpillSlotOffset); 1835 CSI[i - 1].setFrameIdx(SlotIndex); 1836 MFI->ensureMaxAlignment(RC->getAlignment()); 1837 } 1838 1839 return true; 1840} 1841 1842bool X86FrameLowering::spillCalleeSavedRegisters( 1843 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 1844 const std::vector<CalleeSavedInfo> &CSI, 1845 const TargetRegisterInfo *TRI) const { 1846 DebugLoc DL = MBB.findDebugLoc(MI); 1847 1848 // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI 1849 // for us, and there are no XMM CSRs on Win32. 1850 if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows()) 1851 return true; 1852 1853 // Push GPRs. It increases frame size. 1854 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r; 1855 for (unsigned i = CSI.size(); i != 0; --i) { 1856 unsigned Reg = CSI[i - 1].getReg(); 1857 1858 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg)) 1859 continue; 1860 // Add the callee-saved register as live-in. It's killed at the spill. 1861 MBB.addLiveIn(Reg); 1862 1863 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill) 1864 .setMIFlag(MachineInstr::FrameSetup); 1865 } 1866 1867 // Make XMM regs spilled. X86 does not have ability of push/pop XMM. 1868 // It can be done by spilling XMMs to stack frame. 1869 for (unsigned i = CSI.size(); i != 0; --i) { 1870 unsigned Reg = CSI[i-1].getReg(); 1871 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg)) 1872 continue; 1873 // Add the callee-saved register as live-in. It's killed at the spill. 1874 MBB.addLiveIn(Reg); 1875 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 1876 1877 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC, 1878 TRI); 1879 --MI; 1880 MI->setFlag(MachineInstr::FrameSetup); 1881 ++MI; 1882 } 1883 1884 return true; 1885} 1886 1887bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 1888 MachineBasicBlock::iterator MI, 1889 const std::vector<CalleeSavedInfo> &CSI, 1890 const TargetRegisterInfo *TRI) const { 1891 if (CSI.empty()) 1892 return false; 1893 1894 if (isFuncletReturnInstr(MI) && STI.isOSWindows()) { 1895 // Don't restore CSRs in 32-bit EH funclets. Matches 1896 // spillCalleeSavedRegisters. 1897 if (STI.is32Bit()) 1898 return true; 1899 // Don't restore CSRs before an SEH catchret. SEH except blocks do not form 1900 // funclets. emitEpilogue transforms these to normal jumps. 1901 if (MI->getOpcode() == X86::CATCHRET) { 1902 const Function *Func = MBB.getParent()->getFunction(); 1903 bool IsSEH = isAsynchronousEHPersonality( 1904 classifyEHPersonality(Func->getPersonalityFn())); 1905 if (IsSEH) 1906 return true; 1907 } 1908 } 1909 1910 DebugLoc DL = MBB.findDebugLoc(MI); 1911 1912 // Reload XMMs from stack frame. 1913 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 1914 unsigned Reg = CSI[i].getReg(); 1915 if (X86::GR64RegClass.contains(Reg) || 1916 X86::GR32RegClass.contains(Reg)) 1917 continue; 1918 1919 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 1920 TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI); 1921 } 1922 1923 // POP GPRs. 1924 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r; 1925 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 1926 unsigned Reg = CSI[i].getReg(); 1927 if (!X86::GR64RegClass.contains(Reg) && 1928 !X86::GR32RegClass.contains(Reg)) 1929 continue; 1930 1931 BuildMI(MBB, MI, DL, TII.get(Opc), Reg) 1932 .setMIFlag(MachineInstr::FrameDestroy); 1933 } 1934 return true; 1935} 1936 1937void X86FrameLowering::determineCalleeSaves(MachineFunction &MF, 1938 BitVector &SavedRegs, 1939 RegScavenger *RS) const { 1940 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); 1941 1942 MachineFrameInfo *MFI = MF.getFrameInfo(); 1943 1944 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 1945 int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta(); 1946 1947 if (TailCallReturnAddrDelta < 0) { 1948 // create RETURNADDR area 1949 // arg 1950 // arg 1951 // RETADDR 1952 // { ... 1953 // RETADDR area 1954 // ... 1955 // } 1956 // [EBP] 1957 MFI->CreateFixedObject(-TailCallReturnAddrDelta, 1958 TailCallReturnAddrDelta - SlotSize, true); 1959 } 1960 1961 // Spill the BasePtr if it's used. 1962 if (TRI->hasBasePointer(MF)) { 1963 SavedRegs.set(TRI->getBaseRegister()); 1964 1965 // Allocate a spill slot for EBP if we have a base pointer and EH funclets. 1966 if (MF.getMMI().hasEHFunclets()) { 1967 int FI = MFI->CreateSpillStackObject(SlotSize, SlotSize); 1968 X86FI->setHasSEHFramePtrSave(true); 1969 X86FI->setSEHFramePtrSaveIndex(FI); 1970 } 1971 } 1972} 1973 1974static bool 1975HasNestArgument(const MachineFunction *MF) { 1976 const Function *F = MF->getFunction(); 1977 for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end(); 1978 I != E; I++) { 1979 if (I->hasNestAttr()) 1980 return true; 1981 } 1982 return false; 1983} 1984 1985/// GetScratchRegister - Get a temp register for performing work in the 1986/// segmented stack and the Erlang/HiPE stack prologue. Depending on platform 1987/// and the properties of the function either one or two registers will be 1988/// needed. Set primary to true for the first register, false for the second. 1989static unsigned 1990GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) { 1991 CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv(); 1992 1993 // Erlang stuff. 1994 if (CallingConvention == CallingConv::HiPE) { 1995 if (Is64Bit) 1996 return Primary ? X86::R14 : X86::R13; 1997 else 1998 return Primary ? X86::EBX : X86::EDI; 1999 } 2000 2001 if (Is64Bit) { 2002 if (IsLP64) 2003 return Primary ? X86::R11 : X86::R12; 2004 else 2005 return Primary ? X86::R11D : X86::R12D; 2006 } 2007 2008 bool IsNested = HasNestArgument(&MF); 2009 2010 if (CallingConvention == CallingConv::X86_FastCall || 2011 CallingConvention == CallingConv::Fast) { 2012 if (IsNested) 2013 report_fatal_error("Segmented stacks does not support fastcall with " 2014 "nested function."); 2015 return Primary ? X86::EAX : X86::ECX; 2016 } 2017 if (IsNested) 2018 return Primary ? X86::EDX : X86::EAX; 2019 return Primary ? X86::ECX : X86::EAX; 2020} 2021 2022// The stack limit in the TCB is set to this many bytes above the actual stack 2023// limit. 2024static const uint64_t kSplitStackAvailable = 256; 2025 2026void X86FrameLowering::adjustForSegmentedStacks( 2027 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const { 2028 MachineFrameInfo *MFI = MF.getFrameInfo(); 2029 uint64_t StackSize; 2030 unsigned TlsReg, TlsOffset; 2031 DebugLoc DL; 2032 2033 // To support shrink-wrapping we would need to insert the new blocks 2034 // at the right place and update the branches to PrologueMBB. 2035 assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet"); 2036 2037 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); 2038 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && 2039 "Scratch register is live-in"); 2040 2041 if (MF.getFunction()->isVarArg()) 2042 report_fatal_error("Segmented stacks do not support vararg functions."); 2043 if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() && 2044 !STI.isTargetWin64() && !STI.isTargetFreeBSD() && 2045 !STI.isTargetDragonFly()) 2046 report_fatal_error("Segmented stacks not supported on this platform."); 2047 2048 // Eventually StackSize will be calculated by a link-time pass; which will 2049 // also decide whether checking code needs to be injected into this particular 2050 // prologue. 2051 StackSize = MFI->getStackSize(); 2052 2053 // Do not generate a prologue for functions with a stack of size zero 2054 if (StackSize == 0) 2055 return; 2056 2057 MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock(); 2058 MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock(); 2059 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 2060 bool IsNested = false; 2061 2062 // We need to know if the function has a nest argument only in 64 bit mode. 2063 if (Is64Bit) 2064 IsNested = HasNestArgument(&MF); 2065 2066 // The MOV R10, RAX needs to be in a different block, since the RET we emit in 2067 // allocMBB needs to be last (terminating) instruction. 2068 2069 for (const auto &LI : PrologueMBB.liveins()) { 2070 allocMBB->addLiveIn(LI); 2071 checkMBB->addLiveIn(LI); 2072 } 2073 2074 if (IsNested) 2075 allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D); 2076 2077 MF.push_front(allocMBB); 2078 MF.push_front(checkMBB); 2079 2080 // When the frame size is less than 256 we just compare the stack 2081 // boundary directly to the value of the stack pointer, per gcc. 2082 bool CompareStackPointer = StackSize < kSplitStackAvailable; 2083 2084 // Read the limit off the current stacklet off the stack_guard location. 2085 if (Is64Bit) { 2086 if (STI.isTargetLinux()) { 2087 TlsReg = X86::FS; 2088 TlsOffset = IsLP64 ? 0x70 : 0x40; 2089 } else if (STI.isTargetDarwin()) { 2090 TlsReg = X86::GS; 2091 TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90. 2092 } else if (STI.isTargetWin64()) { 2093 TlsReg = X86::GS; 2094 TlsOffset = 0x28; // pvArbitrary, reserved for application use 2095 } else if (STI.isTargetFreeBSD()) { 2096 TlsReg = X86::FS; 2097 TlsOffset = 0x18; 2098 } else if (STI.isTargetDragonFly()) { 2099 TlsReg = X86::FS; 2100 TlsOffset = 0x20; // use tls_tcb.tcb_segstack 2101 } else { 2102 report_fatal_error("Segmented stacks not supported on this platform."); 2103 } 2104 2105 if (CompareStackPointer) 2106 ScratchReg = IsLP64 ? X86::RSP : X86::ESP; 2107 else 2108 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP) 2109 .addImm(1).addReg(0).addImm(-StackSize).addReg(0); 2110 2111 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg) 2112 .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg); 2113 } else { 2114 if (STI.isTargetLinux()) { 2115 TlsReg = X86::GS; 2116 TlsOffset = 0x30; 2117 } else if (STI.isTargetDarwin()) { 2118 TlsReg = X86::GS; 2119 TlsOffset = 0x48 + 90*4; 2120 } else if (STI.isTargetWin32()) { 2121 TlsReg = X86::FS; 2122 TlsOffset = 0x14; // pvArbitrary, reserved for application use 2123 } else if (STI.isTargetDragonFly()) { 2124 TlsReg = X86::FS; 2125 TlsOffset = 0x10; // use tls_tcb.tcb_segstack 2126 } else if (STI.isTargetFreeBSD()) { 2127 report_fatal_error("Segmented stacks not supported on FreeBSD i386."); 2128 } else { 2129 report_fatal_error("Segmented stacks not supported on this platform."); 2130 } 2131 2132 if (CompareStackPointer) 2133 ScratchReg = X86::ESP; 2134 else 2135 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) 2136 .addImm(1).addReg(0).addImm(-StackSize).addReg(0); 2137 2138 if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() || 2139 STI.isTargetDragonFly()) { 2140 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) 2141 .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg); 2142 } else if (STI.isTargetDarwin()) { 2143 2144 // TlsOffset doesn't fit into a mod r/m byte so we need an extra register. 2145 unsigned ScratchReg2; 2146 bool SaveScratch2; 2147 if (CompareStackPointer) { 2148 // The primary scratch register is available for holding the TLS offset. 2149 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true); 2150 SaveScratch2 = false; 2151 } else { 2152 // Need to use a second register to hold the TLS offset 2153 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false); 2154 2155 // Unfortunately, with fastcc the second scratch register may hold an 2156 // argument. 2157 SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2); 2158 } 2159 2160 // If Scratch2 is live-in then it needs to be saved. 2161 assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) && 2162 "Scratch register is live-in and not saved"); 2163 2164 if (SaveScratch2) 2165 BuildMI(checkMBB, DL, TII.get(X86::PUSH32r)) 2166 .addReg(ScratchReg2, RegState::Kill); 2167 2168 BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2) 2169 .addImm(TlsOffset); 2170 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)) 2171 .addReg(ScratchReg) 2172 .addReg(ScratchReg2).addImm(1).addReg(0) 2173 .addImm(0) 2174 .addReg(TlsReg); 2175 2176 if (SaveScratch2) 2177 BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2); 2178 } 2179 } 2180 2181 // This jump is taken if SP >= (Stacklet Limit + Stack Space required). 2182 // It jumps to normal execution of the function body. 2183 BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB); 2184 2185 // On 32 bit we first push the arguments size and then the frame size. On 64 2186 // bit, we pass the stack frame size in r10 and the argument size in r11. 2187 if (Is64Bit) { 2188 // Functions with nested arguments use R10, so it needs to be saved across 2189 // the call to _morestack 2190 2191 const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX; 2192 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; 2193 const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D; 2194 const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr; 2195 const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri; 2196 2197 if (IsNested) 2198 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); 2199 2200 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) 2201 .addImm(StackSize); 2202 BuildMI(allocMBB, DL, TII.get(MOVri), Reg11) 2203 .addImm(X86FI->getArgumentStackSize()); 2204 } else { 2205 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32)) 2206 .addImm(X86FI->getArgumentStackSize()); 2207 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32)) 2208 .addImm(StackSize); 2209 } 2210 2211 // __morestack is in libgcc 2212 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) { 2213 // Under the large code model, we cannot assume that __morestack lives 2214 // within 2^31 bytes of the call site, so we cannot use pc-relative 2215 // addressing. We cannot perform the call via a temporary register, 2216 // as the rax register may be used to store the static chain, and all 2217 // other suitable registers may be either callee-save or used for 2218 // parameter passing. We cannot use the stack at this point either 2219 // because __morestack manipulates the stack directly. 2220 // 2221 // To avoid these issues, perform an indirect call via a read-only memory 2222 // location containing the address. 2223 // 2224 // This solution is not perfect, as it assumes that the .rodata section 2225 // is laid out within 2^31 bytes of each function body, but this seems 2226 // to be sufficient for JIT. 2227 BuildMI(allocMBB, DL, TII.get(X86::CALL64m)) 2228 .addReg(X86::RIP) 2229 .addImm(0) 2230 .addReg(0) 2231 .addExternalSymbol("__morestack_addr") 2232 .addReg(0); 2233 MF.getMMI().setUsesMorestackAddr(true); 2234 } else { 2235 if (Is64Bit) 2236 BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32)) 2237 .addExternalSymbol("__morestack"); 2238 else 2239 BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32)) 2240 .addExternalSymbol("__morestack"); 2241 } 2242 2243 if (IsNested) 2244 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10)); 2245 else 2246 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET)); 2247 2248 allocMBB->addSuccessor(&PrologueMBB); 2249 2250 checkMBB->addSuccessor(allocMBB); 2251 checkMBB->addSuccessor(&PrologueMBB); 2252 2253#ifdef XDEBUG 2254 MF.verify(); 2255#endif 2256} 2257 2258/// Erlang programs may need a special prologue to handle the stack size they 2259/// might need at runtime. That is because Erlang/OTP does not implement a C 2260/// stack but uses a custom implementation of hybrid stack/heap architecture. 2261/// (for more information see Eric Stenman's Ph.D. thesis: 2262/// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf) 2263/// 2264/// CheckStack: 2265/// temp0 = sp - MaxStack 2266/// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart 2267/// OldStart: 2268/// ... 2269/// IncStack: 2270/// call inc_stack # doubles the stack space 2271/// temp0 = sp - MaxStack 2272/// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart 2273void X86FrameLowering::adjustForHiPEPrologue( 2274 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const { 2275 MachineFrameInfo *MFI = MF.getFrameInfo(); 2276 DebugLoc DL; 2277 2278 // To support shrink-wrapping we would need to insert the new blocks 2279 // at the right place and update the branches to PrologueMBB. 2280 assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet"); 2281 2282 // HiPE-specific values 2283 const unsigned HipeLeafWords = 24; 2284 const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5; 2285 const unsigned Guaranteed = HipeLeafWords * SlotSize; 2286 unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ? 2287 MF.getFunction()->arg_size() - CCRegisteredArgs : 0; 2288 unsigned MaxStack = MFI->getStackSize() + CallerStkArity*SlotSize + SlotSize; 2289 2290 assert(STI.isTargetLinux() && 2291 "HiPE prologue is only supported on Linux operating systems."); 2292 2293 // Compute the largest caller's frame that is needed to fit the callees' 2294 // frames. This 'MaxStack' is computed from: 2295 // 2296 // a) the fixed frame size, which is the space needed for all spilled temps, 2297 // b) outgoing on-stack parameter areas, and 2298 // c) the minimum stack space this function needs to make available for the 2299 // functions it calls (a tunable ABI property). 2300 if (MFI->hasCalls()) { 2301 unsigned MoreStackForCalls = 0; 2302 2303 for (MachineFunction::iterator MBBI = MF.begin(), MBBE = MF.end(); 2304 MBBI != MBBE; ++MBBI) 2305 for (MachineBasicBlock::iterator MI = MBBI->begin(), ME = MBBI->end(); 2306 MI != ME; ++MI) { 2307 if (!MI->isCall()) 2308 continue; 2309 2310 // Get callee operand. 2311 const MachineOperand &MO = MI->getOperand(0); 2312 2313 // Only take account of global function calls (no closures etc.). 2314 if (!MO.isGlobal()) 2315 continue; 2316 2317 const Function *F = dyn_cast<Function>(MO.getGlobal()); 2318 if (!F) 2319 continue; 2320 2321 // Do not update 'MaxStack' for primitive and built-in functions 2322 // (encoded with names either starting with "erlang."/"bif_" or not 2323 // having a ".", such as a simple <Module>.<Function>.<Arity>, or an 2324 // "_", such as the BIF "suspend_0") as they are executed on another 2325 // stack. 2326 if (F->getName().find("erlang.") != StringRef::npos || 2327 F->getName().find("bif_") != StringRef::npos || 2328 F->getName().find_first_of("._") == StringRef::npos) 2329 continue; 2330 2331 unsigned CalleeStkArity = 2332 F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0; 2333 if (HipeLeafWords - 1 > CalleeStkArity) 2334 MoreStackForCalls = std::max(MoreStackForCalls, 2335 (HipeLeafWords - 1 - CalleeStkArity) * SlotSize); 2336 } 2337 MaxStack += MoreStackForCalls; 2338 } 2339 2340 // If the stack frame needed is larger than the guaranteed then runtime checks 2341 // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue. 2342 if (MaxStack > Guaranteed) { 2343 MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock(); 2344 MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock(); 2345 2346 for (const auto &LI : PrologueMBB.liveins()) { 2347 stackCheckMBB->addLiveIn(LI); 2348 incStackMBB->addLiveIn(LI); 2349 } 2350 2351 MF.push_front(incStackMBB); 2352 MF.push_front(stackCheckMBB); 2353 2354 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; 2355 unsigned LEAop, CMPop, CALLop; 2356 if (Is64Bit) { 2357 SPReg = X86::RSP; 2358 PReg = X86::RBP; 2359 LEAop = X86::LEA64r; 2360 CMPop = X86::CMP64rm; 2361 CALLop = X86::CALL64pcrel32; 2362 SPLimitOffset = 0x90; 2363 } else { 2364 SPReg = X86::ESP; 2365 PReg = X86::EBP; 2366 LEAop = X86::LEA32r; 2367 CMPop = X86::CMP32rm; 2368 CALLop = X86::CALLpcrel32; 2369 SPLimitOffset = 0x4c; 2370 } 2371 2372 ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); 2373 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && 2374 "HiPE prologue scratch register is live-in"); 2375 2376 // Create new MBB for StackCheck: 2377 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg), 2378 SPReg, false, -MaxStack); 2379 // SPLimitOffset is in a fixed heap location (pointed by BP). 2380 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop)) 2381 .addReg(ScratchReg), PReg, false, SPLimitOffset); 2382 BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB); 2383 2384 // Create new MBB for IncStack: 2385 BuildMI(incStackMBB, DL, TII.get(CALLop)). 2386 addExternalSymbol("inc_stack_0"); 2387 addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg), 2388 SPReg, false, -MaxStack); 2389 addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop)) 2390 .addReg(ScratchReg), PReg, false, SPLimitOffset); 2391 BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB); 2392 2393 stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100}); 2394 stackCheckMBB->addSuccessor(incStackMBB, {1, 100}); 2395 incStackMBB->addSuccessor(&PrologueMBB, {99, 100}); 2396 incStackMBB->addSuccessor(incStackMBB, {1, 100}); 2397 } 2398#ifdef XDEBUG 2399 MF.verify(); 2400#endif 2401} 2402 2403bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB, 2404 MachineBasicBlock::iterator MBBI, DebugLoc DL, int Offset) const { 2405 2406 if (Offset <= 0) 2407 return false; 2408 2409 if (Offset % SlotSize) 2410 return false; 2411 2412 int NumPops = Offset / SlotSize; 2413 // This is only worth it if we have at most 2 pops. 2414 if (NumPops != 1 && NumPops != 2) 2415 return false; 2416 2417 // Handle only the trivial case where the adjustment directly follows 2418 // a call. This is the most common one, anyway. 2419 if (MBBI == MBB.begin()) 2420 return false; 2421 MachineBasicBlock::iterator Prev = std::prev(MBBI); 2422 if (!Prev->isCall() || !Prev->getOperand(1).isRegMask()) 2423 return false; 2424 2425 unsigned Regs[2]; 2426 unsigned FoundRegs = 0; 2427 2428 auto RegMask = Prev->getOperand(1); 2429 2430 auto &RegClass = 2431 Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass; 2432 // Try to find up to NumPops free registers. 2433 for (auto Candidate : RegClass) { 2434 2435 // Poor man's liveness: 2436 // Since we're immediately after a call, any register that is clobbered 2437 // by the call and not defined by it can be considered dead. 2438 if (!RegMask.clobbersPhysReg(Candidate)) 2439 continue; 2440 2441 bool IsDef = false; 2442 for (const MachineOperand &MO : Prev->implicit_operands()) { 2443 if (MO.isReg() && MO.isDef() && MO.getReg() == Candidate) { 2444 IsDef = true; 2445 break; 2446 } 2447 } 2448 2449 if (IsDef) 2450 continue; 2451 2452 Regs[FoundRegs++] = Candidate; 2453 if (FoundRegs == (unsigned)NumPops) 2454 break; 2455 } 2456 2457 if (FoundRegs == 0) 2458 return false; 2459 2460 // If we found only one free register, but need two, reuse the same one twice. 2461 while (FoundRegs < (unsigned)NumPops) 2462 Regs[FoundRegs++] = Regs[0]; 2463 2464 for (int i = 0; i < NumPops; ++i) 2465 BuildMI(MBB, MBBI, DL, 2466 TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]); 2467 2468 return true; 2469} 2470 2471void X86FrameLowering:: 2472eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 2473 MachineBasicBlock::iterator I) const { 2474 bool reserveCallFrame = hasReservedCallFrame(MF); 2475 unsigned Opcode = I->getOpcode(); 2476 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode(); 2477 DebugLoc DL = I->getDebugLoc(); 2478 uint64_t Amount = !reserveCallFrame ? I->getOperand(0).getImm() : 0; 2479 uint64_t InternalAmt = (isDestroy || Amount) ? I->getOperand(1).getImm() : 0; 2480 I = MBB.erase(I); 2481 2482 if (!reserveCallFrame) { 2483 // If the stack pointer can be changed after prologue, turn the 2484 // adjcallstackup instruction into a 'sub ESP, <amt>' and the 2485 // adjcallstackdown instruction into 'add ESP, <amt>' 2486 2487 // We need to keep the stack aligned properly. To do this, we round the 2488 // amount of space needed for the outgoing arguments up to the next 2489 // alignment boundary. 2490 unsigned StackAlign = getStackAlignment(); 2491 Amount = RoundUpToAlignment(Amount, StackAlign); 2492 2493 MachineModuleInfo &MMI = MF.getMMI(); 2494 const Function *Fn = MF.getFunction(); 2495 bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI(); 2496 bool DwarfCFI = !WindowsCFI && 2497 (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry()); 2498 2499 // If we have any exception handlers in this function, and we adjust 2500 // the SP before calls, we may need to indicate this to the unwinder 2501 // using GNU_ARGS_SIZE. Note that this may be necessary even when 2502 // Amount == 0, because the preceding function may have set a non-0 2503 // GNU_ARGS_SIZE. 2504 // TODO: We don't need to reset this between subsequent functions, 2505 // if it didn't change. 2506 bool HasDwarfEHHandlers = !WindowsCFI && 2507 !MF.getMMI().getLandingPads().empty(); 2508 2509 if (HasDwarfEHHandlers && !isDestroy && 2510 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences()) 2511 BuildCFI(MBB, I, DL, 2512 MCCFIInstruction::createGnuArgsSize(nullptr, Amount)); 2513 2514 if (Amount == 0) 2515 return; 2516 2517 // Factor out the amount that gets handled inside the sequence 2518 // (Pushes of argument for frame setup, callee pops for frame destroy) 2519 Amount -= InternalAmt; 2520 2521 // TODO: This is needed only if we require precise CFA. 2522 // If this is a callee-pop calling convention, emit a CFA adjust for 2523 // the amount the callee popped. 2524 if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF)) 2525 BuildCFI(MBB, I, DL, 2526 MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt)); 2527 2528 if (Amount) { 2529 // Add Amount to SP to destroy a frame, and subtract to setup. 2530 int Offset = isDestroy ? Amount : -Amount; 2531 2532 if (!(Fn->optForMinSize() && 2533 adjustStackWithPops(MBB, I, DL, Offset))) 2534 BuildStackAdjustment(MBB, I, DL, Offset, /*InEpilogue=*/false); 2535 } 2536 2537 if (DwarfCFI && !hasFP(MF)) { 2538 // If we don't have FP, but need to generate unwind information, 2539 // we need to set the correct CFA offset after the stack adjustment. 2540 // How much we adjust the CFA offset depends on whether we're emitting 2541 // CFI only for EH purposes or for debugging. EH only requires the CFA 2542 // offset to be correct at each call site, while for debugging we want 2543 // it to be more precise. 2544 int CFAOffset = Amount; 2545 // TODO: When not using precise CFA, we also need to adjust for the 2546 // InternalAmt here. 2547 2548 if (CFAOffset) { 2549 CFAOffset = isDestroy ? -CFAOffset : CFAOffset; 2550 BuildCFI(MBB, I, DL, 2551 MCCFIInstruction::createAdjustCfaOffset(nullptr, CFAOffset)); 2552 } 2553 } 2554 2555 return; 2556 } 2557 2558 if (isDestroy && InternalAmt) { 2559 // If we are performing frame pointer elimination and if the callee pops 2560 // something off the stack pointer, add it back. We do this until we have 2561 // more advanced stack pointer tracking ability. 2562 // We are not tracking the stack pointer adjustment by the callee, so make 2563 // sure we restore the stack pointer immediately after the call, there may 2564 // be spill code inserted between the CALL and ADJCALLSTACKUP instructions. 2565 MachineBasicBlock::iterator B = MBB.begin(); 2566 while (I != B && !std::prev(I)->isCall()) 2567 --I; 2568 BuildStackAdjustment(MBB, I, DL, -InternalAmt, /*InEpilogue=*/false); 2569 } 2570} 2571 2572bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const { 2573 assert(MBB.getParent() && "Block is not attached to a function!"); 2574 2575 // Win64 has strict requirements in terms of epilogue and we are 2576 // not taking a chance at messing with them. 2577 // I.e., unless this block is already an exit block, we can't use 2578 // it as an epilogue. 2579 if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock()) 2580 return false; 2581 2582 if (canUseLEAForSPInEpilogue(*MBB.getParent())) 2583 return true; 2584 2585 // If we cannot use LEA to adjust SP, we may need to use ADD, which 2586 // clobbers the EFLAGS. Check that we do not need to preserve it, 2587 // otherwise, conservatively assume this is not 2588 // safe to insert the epilogue here. 2589 return !flagsNeedToBePreservedBeforeTheTerminators(MBB); 2590} 2591 2592bool X86FrameLowering::enableShrinkWrapping(const MachineFunction &MF) const { 2593 // If we may need to emit frameless compact unwind information, give 2594 // up as this is currently broken: PR25614. 2595 return (MF.getFunction()->hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) && 2596 // The lowering of segmented stack and HiPE only support entry blocks 2597 // as prologue blocks: PR26107. 2598 // This limitation may be lifted if we fix: 2599 // - adjustForSegmentedStacks 2600 // - adjustForHiPEPrologue 2601 MF.getFunction()->getCallingConv() != CallingConv::HiPE && 2602 !MF.shouldSplitStack(); 2603} 2604 2605MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers( 2606 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, 2607 DebugLoc DL, bool RestoreSP) const { 2608 assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env"); 2609 assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32"); 2610 assert(STI.is32Bit() && !Uses64BitFramePtr && 2611 "restoring EBP/ESI on non-32-bit target"); 2612 2613 MachineFunction &MF = *MBB.getParent(); 2614 unsigned FramePtr = TRI->getFrameRegister(MF); 2615 unsigned BasePtr = TRI->getBaseRegister(); 2616 WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo(); 2617 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>(); 2618 MachineFrameInfo *MFI = MF.getFrameInfo(); 2619 2620 // FIXME: Don't set FrameSetup flag in catchret case. 2621 2622 int FI = FuncInfo.EHRegNodeFrameIndex; 2623 int EHRegSize = MFI->getObjectSize(FI); 2624 2625 if (RestoreSP) { 2626 // MOV32rm -EHRegSize(%ebp), %esp 2627 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP), 2628 X86::EBP, true, -EHRegSize) 2629 .setMIFlag(MachineInstr::FrameSetup); 2630 } 2631 2632 unsigned UsedReg; 2633 int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg); 2634 int EndOffset = -EHRegOffset - EHRegSize; 2635 FuncInfo.EHRegNodeEndOffset = EndOffset; 2636 2637 if (UsedReg == FramePtr) { 2638 // ADD $offset, %ebp 2639 unsigned ADDri = getADDriOpcode(false, EndOffset); 2640 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr) 2641 .addReg(FramePtr) 2642 .addImm(EndOffset) 2643 .setMIFlag(MachineInstr::FrameSetup) 2644 ->getOperand(3) 2645 .setIsDead(); 2646 assert(EndOffset >= 0 && 2647 "end of registration object above normal EBP position!"); 2648 } else if (UsedReg == BasePtr) { 2649 // LEA offset(%ebp), %esi 2650 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr), 2651 FramePtr, false, EndOffset) 2652 .setMIFlag(MachineInstr::FrameSetup); 2653 // MOV32rm SavedEBPOffset(%esi), %ebp 2654 assert(X86FI->getHasSEHFramePtrSave()); 2655 int Offset = 2656 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg); 2657 assert(UsedReg == BasePtr); 2658 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr), 2659 UsedReg, true, Offset) 2660 .setMIFlag(MachineInstr::FrameSetup); 2661 } else { 2662 llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr"); 2663 } 2664 return MBBI; 2665} 2666 2667unsigned X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const { 2668 // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue. 2669 unsigned Offset = 16; 2670 // RBP is immediately pushed. 2671 Offset += SlotSize; 2672 // All callee-saved registers are then pushed. 2673 Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize(); 2674 // Every funclet allocates enough stack space for the largest outgoing call. 2675 Offset += getWinEHFuncletFrameSize(MF); 2676 return Offset; 2677} 2678 2679void X86FrameLowering::processFunctionBeforeFrameFinalized( 2680 MachineFunction &MF, RegScavenger *RS) const { 2681 // If this function isn't doing Win64-style C++ EH, we don't need to do 2682 // anything. 2683 const Function *Fn = MF.getFunction(); 2684 if (!STI.is64Bit() || !MF.getMMI().hasEHFunclets() || 2685 classifyEHPersonality(Fn->getPersonalityFn()) != EHPersonality::MSVC_CXX) 2686 return; 2687 2688 // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset 2689 // relative to RSP after the prologue. Find the offset of the last fixed 2690 // object, so that we can allocate a slot immediately following it. If there 2691 // were no fixed objects, use offset -SlotSize, which is immediately after the 2692 // return address. Fixed objects have negative frame indices. 2693 MachineFrameInfo *MFI = MF.getFrameInfo(); 2694 int64_t MinFixedObjOffset = -SlotSize; 2695 for (int I = MFI->getObjectIndexBegin(); I < 0; ++I) 2696 MinFixedObjOffset = std::min(MinFixedObjOffset, MFI->getObjectOffset(I)); 2697 2698 int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize; 2699 int UnwindHelpFI = 2700 MFI->CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false); 2701 MF.getWinEHFuncInfo()->UnwindHelpFrameIdx = UnwindHelpFI; 2702 2703 // Store -2 into UnwindHelp on function entry. We have to scan forwards past 2704 // other frame setup instructions. 2705 MachineBasicBlock &MBB = MF.front(); 2706 auto MBBI = MBB.begin(); 2707 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) 2708 ++MBBI; 2709 2710 DebugLoc DL = MBB.findDebugLoc(MBBI); 2711 addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)), 2712 UnwindHelpFI) 2713 .addImm(-2); 2714} 2715