1//===- MicroMipsDSPInstrInfo.td - Micromips DSP instructions -*- tablegen *-=// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes MicroMips DSP instructions. 11// 12//===----------------------------------------------------------------------===// 13 14// Instruction encoding. 15class ADDQ_PH_MM_ENC : POOL32A_3R_FMT<"addq.ph", 0b00000001101>; 16class ADDQ_S_PH_MM_ENC : POOL32A_3R_FMT<"addq_s.ph", 0b10000001101>; 17class ADDQ_S_W_MM_ENC : POOL32A_3RB0_FMT<"addq_s.w", 0b1100000101>; 18class ADDQH_PH_MMR2_ENC : POOL32A_3R_FMT<"addqh.ph", 0b00001001101>; 19class ADDQH_R_PH_MMR2_ENC : POOL32A_3R_FMT<"addqh_r.ph", 0b10001001101>; 20class ADDQH_W_MMR2_ENC: POOL32A_3R_FMT<"addqh.w", 0b00010001101>; 21class ADDQH_R_W_MMR2_ENC : POOL32A_3R_FMT<"addqh_r.w", 0b10010001101>; 22class ADDU_PH_MMR2_ENC : POOL32A_3R_FMT<"addu.ph", 0b00100001101>; 23class ADDU_S_PH_MMR2_ENC : POOL32A_3R_FMT<"addu_s.ph", 0b10100001101>; 24class ADDU_QB_MM_ENC : POOL32A_3R_FMT<"addu.qb", 0b00011001101>; 25class ADDU_S_QB_MM_ENC : POOL32A_3R_FMT<"addu_s.qb", 0b10011001101>; 26class ADDUH_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh.qb", 0b00101001101>; 27class ADDUH_R_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh_r.qb", 0b10101001101>; 28class ADDSC_MM_ENC : POOL32A_3RB0_FMT<"addsc", 0b1110000101>; 29class ADDWC_MM_ENC : POOL32A_3RB0_FMT<"addwc", 0b1111000101>; 30class DPA_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpa.w.ph", 0b00000010>; 31class DPAQ_S_W_PH_MM_ENC : POOL32A_2RAC_FMT<"dpaq_s.w.ph", 0b00001010>; 32class DPAQ_SA_L_W_MM_ENC : POOL32A_2RAC_FMT<"dpaq_sa.l.w", 0b01001010>; 33class DPAQX_S_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpaqx_s.w.ph", 0b10001010>; 34class DPAQX_SA_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpaqx_sa.w.ph", 0b11001010>; 35class DPAU_H_QBL_MM_ENC : POOL32A_2RAC_FMT<"dpau.h.qbl", 0b10000010>; 36class DPAU_H_QBR_MM_ENC : POOL32A_2RAC_FMT<"dpau.h.qbr", 0b11000010>; 37class DPAX_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpax.w.ph", 0b01000010>; 38class ABSQ_S_PH_MM_ENC : POOL32A_2R_FMT<"absq_s.ph", 0b0001000100>; 39class ABSQ_S_W_MM_ENC : POOL32A_2R_FMT<"absq_s.w", 0b0010000100>; 40class ABSQ_S_QB_MMR2_ENC : POOL32A_2R_FMT<"absq_s.qb", 0b0000000100>; 41class INSV_MM_ENC : POOL32A_2R_FMT<"insv", 0b0100000100>; 42class MADD_DSP_MM_ENC : POOL32A_2RAC_FMT<"madd", 0b00101010>; 43class MADDU_DSP_MM_ENC : POOL32A_2RAC_FMT<"maddu", 0b01101010>; 44class MSUB_DSP_MM_ENC : POOL32A_2RAC_FMT<"msub", 0b10101010>; 45class MSUBU_DSP_MM_ENC : POOL32A_2RAC_FMT<"msubu", 0b11101010>; 46class MULT_DSP_MM_ENC : POOL32A_2RAC_FMT<"mult", 0b00110010>; 47class MULTU_DSP_MM_ENC : POOL32A_2RAC_FMT<"multu", 0b01110010>; 48class SHLL_PH_MM_ENC : POOL32A_2RSA4_FMT<"shll.ph", 0b001110110101>; 49class SHLL_S_PH_MM_ENC : POOL32A_2RSA4_FMT<"shll_s.ph", 0b101110110101>; 50class SHLL_QB_MM_ENC : POOL32A_2RSA3_FMT<"shll.qb", 0b0100001>; 51class SHLLV_PH_MM_ENC : POOL32A_3R_FMT<"shllv.ph", 0b00000001110>; 52class SHLLV_S_PH_MM_ENC : POOL32A_3R_FMT<"shllv_s.ph", 0b10000001110>; 53class SHLLV_QB_MM_ENC : POOL32A_3RB0_FMT<"shllv.qb", 0b1110010101>; 54class SHLLV_S_W_MM_ENC : POOL32A_3RB0_FMT<"shllv_s.w", 0b1111010101>; 55class SHLL_S_W_MM_ENC : POOL32A_2RSA5B0_FMT<"shll_s.w", 0b1111110101>; 56class SHRA_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra.qb", 0b0000111>; 57class SHRA_R_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra_r.qb", 0b1000111>; 58class SHRA_PH_MM_ENC : POOL32A_2RSA4B0_FMT<"shra.ph", 0b01100110101>; 59class SHRA_R_PH_MM_ENC : POOL32A_2RSA4B0_FMT<"shra_r.ph", 0b11100110101>; 60class SHRAV_PH_MM_ENC : POOL32A_3R_FMT<"shrav.ph", 0b00110001101>; 61class SHRAV_R_PH_MM_ENC : POOL32A_3R_FMT<"shrav_r.ph", 0b10110001101>; 62class SHRAV_QB_MMR2_ENC : POOL32A_3R_FMT<"shrav.qb", 0b00111001101>; 63class SHRAV_R_QB_MMR2_ENC : POOL32A_3R_FMT<"shrav_r.qb", 0b10111001101>; 64class SHRAV_R_W_MM_ENC : POOL32A_3RB0_FMT<"shrav_r.w", 0b1011010101>; 65class SHRA_R_W_MM_ENC : POOL32A_2RSA5B0_FMT<"shra_r.w", 0b1011110101>; 66class SHRL_PH_MMR2_ENC : POOL32A_2RSA4OP6_FMT<"shrl.ph", 0b001111>; 67class SHRL_QB_MM_ENC : POOL32A_2RSA3_FMT<"shrl.qb", 0b1100001>; 68class SHRLV_PH_MMR2_ENC : POOL32A_3RB0_FMT<"shrlv.ph", 0b1100010101>; 69class SHRLV_QB_MM_ENC : POOL32A_3RB0_FMT<"shrlv.qb", 0b1101010101>; 70class PRECEQ_W_PHL_MM_ENC : POOL32A_2R_FMT<"preceq.w.phl", 0b0101000100>; 71class PRECEQ_W_PHR_MM_ENC : POOL32A_2R_FMT<"preceq.w.phr", 0b0110000100>; 72class PRECEQU_PH_QBL_MM_ENC : POOL32A_2R_FMT<"precequ.ph.qbl", 0b0111000100>; 73class PRECEQU_PH_QBLA_MM_ENC : POOL32A_2R_FMT<"precequ.ph.qbla", 0b0111001100>; 74class PRECEQU_PH_QBR_MM_ENC : POOL32A_2R_FMT<"precequ.ph.qbr", 0b1001000100>; 75class PRECEQU_PH_QBRA_MM_ENC : POOL32A_2R_FMT<"precequ.ph.qbra", 0b1001001100>; 76class PRECEU_PH_QBL_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbl", 0b1011000100>; 77class PRECEU_PH_QBLA_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbla", 0b1011001100>; 78class PRECEU_PH_QBR_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbr", 0b1101000100>; 79class PRECEU_PH_QBRA_MM_ENC : POOL32A_2R_FMT<"preceu.ph.qbra", 0b1101001100>; 80class SUBQ_PH_MM_ENC : POOL32A_3R_FMT<"subq.ph", 0b01000001101>; 81class SUBQ_S_PH_MM_ENC : POOL32A_3R_FMT<"subq_s.ph", 0b11000001101>; 82class SUBQ_S_W_MM_ENC : POOL32A_3RB0_FMT<"subq_s.w", 0b1101000101>; 83class SUBQH_PH_MMR2_ENC : POOL32A_3R_FMT<"subqh.ph", 0b01001001101>; 84class SUBQH_R_PH_MMR2_ENC : POOL32A_3R_FMT<"subqh_r.ph", 0b11001001101>; 85class SUBQH_W_MMR2_ENC : POOL32A_3R_FMT<"subqh.w", 0b01010001101>; 86class SUBQH_R_W_MMR2_ENC : POOL32A_3R_FMT<"subqh_r.w", 0b11010001101>; 87class SUBU_PH_MMR2_ENC : POOL32A_3R_FMT<"subu.ph", 0b01100001101>; 88class SUBU_S_PH_MMR2_ENC : POOL32A_3R_FMT<"subu_s.ph", 0b11100001101>; 89class SUBU_QB_MM_ENC : POOL32A_3R_FMT<"subu.qb", 0b01011001101>; 90class SUBU_S_QB_MM_ENC : POOL32A_3R_FMT<"subu_s.qb", 0b11011001101>; 91class SUBUH_QB_MMR2_ENC : POOL32A_3R_FMT<"subuh.qb", 0b01101001101>; 92class SUBUH_R_QB_MMR2_ENC : POOL32A_3R_FMT<"subuh_r.qb", 0b11101001101>; 93class EXTP_MM_ENC : POOL32A_1RIMM5AC_FMT<"extp", 0b10011001>; 94class EXTPDP_MM_ENC : POOL32A_1RIMM5AC_FMT<"extpdp", 0b11011001>; 95class EXTPDPV_MM_ENC : POOL32A_2RAC_FMT<"extpdpv", 0b11100010>; 96class EXTPV_MM_ENC : POOL32A_2RAC_FMT<"extpv", 0b10100010>; 97class EXTR_W_MM_ENC : POOL32A_1RIMM5AC_FMT<"extr.w", 0b00111001>; 98class EXTR_R_W_MM_ENC : POOL32A_1RIMM5AC_FMT<"extr_r.w", 0b01111001>; 99class EXTR_RS_W_MM_ENC : POOL32A_1RIMM5AC_FMT<"extr_rs.w", 0b10111001>; 100class EXTR_S_H_MM_ENC : POOL32A_1RIMM5AC_FMT<"extr_s.h", 0b11111001>; 101class EXTRV_W_MM_ENC : POOL32A_2RAC_FMT<"extrv.w", 0b00111010>; 102class EXTRV_R_W_MM_ENC : POOL32A_2RAC_FMT<"extrv_r.w", 0b01111010>; 103class EXTRV_RS_W_MM_ENC : POOL32A_2RAC_FMT<"extrv_rs.w", 0b10111010>; 104class EXTRV_S_H_MM_ENC : POOL32A_2RAC_FMT<"extrv_s.h", 0b11111010>; 105class DPS_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dps.w.ph", 0b00010010>; 106class DPSQ_S_W_PH_MM_ENC : POOL32A_2RAC_FMT<"dpsq_s.w.ph", 0b00011010>; 107class DPSQ_SA_L_W_MM_ENC : POOL32A_2RAC_FMT<"dpsq_sa.l.w", 0b01011010>; 108class DPSQX_S_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpsqx_s.w.ph", 0b10011010>; 109class DPSQX_SA_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpsqx_sa.w.ph", 0b11011010>; 110class DPSU_H_QBL_MM_ENC : POOL32A_2RAC_FMT<"dpsu.h.qbl", 0b10010010>; 111class DPSU_H_QBR_MM_ENC : POOL32A_2RAC_FMT<"dpsu.h.qbr", 0b11010010>; 112class DPSX_W_PH_MMR2_ENC : POOL32A_2RAC_FMT<"dpsx.w.ph", 0b01010010>; 113class MUL_PH_MMR2_ENC : POOL32A_3R_FMT<"mul.ph", 0b00000101101>; 114class MUL_S_PH_MMR2_ENC : POOL32A_3R_FMT<"mul_s.ph", 0b10000101101>; 115class MULEQ_S_W_PHL_MM_ENC : POOL32A_3RB0_FMT<"muleq_s.w.phl", 0b0000100101>; 116class MULEQ_S_W_PHR_MM_ENC : POOL32A_3RB0_FMT<"muleq_s.w.phr", 0b0001100101>; 117class MULEU_S_PH_QBL_MM_ENC : POOL32A_3RB0_FMT<"muleu_s.ph.qbl", 0b0010010101>; 118class MULEU_S_PH_QBR_MM_ENC : POOL32A_3RB0_FMT<"muleu_s.ph.qbr", 0b0011010101>; 119class MULQ_RS_PH_MM_ENC : POOL32A_3RB0_FMT<"mulq_rs.ph", 0b0100010101>; 120class MULQ_RS_W_MMR2_ENC : POOL32A_3RB0_FMT<"mulq_rs.w", 0b0110010101>; 121class MULQ_S_PH_MMR2_ENC : POOL32A_3RB0_FMT<"mulq_s.ph", 0b0101010101>; 122class MULQ_S_W_MMR2_ENC : POOL32A_3RB0_FMT<"mulq_s.w", 0b0111010101>; 123class PRECR_QB_PH_MMR2_ENC : POOL32A_3RB0_FMT<"precr.qb.ph", 0b0001101101>; 124class PRECR_SRA_PH_W_MMR2_ENC 125 : POOL32A_2RSA5_FMT<"precr_sra.ph.w", 0b01111001101>; 126class PRECR_SRA_R_PH_W_MMR2_ENC 127 : POOL32A_2RSA5_FMT<"precr_sra_r.ph.w", 0b11111001101>; 128class PRECRQ_PH_W_MM_ENC : POOL32A_3RB0_FMT<"precrq.ph.w", 0b0011101101>; 129class PRECRQ_QB_PH_MM_ENC : POOL32A_3RB0_FMT<"precrq.qb.ph", 0b0010101101>; 130class PRECRQU_S_QB_PH_MM_ENC 131 : POOL32A_3RB0_FMT<"precrqu_s.qb.ph", 0b0101101101>; 132class PRECRQ_RS_PH_W_MM_ENC : POOL32A_3RB0_FMT<"precrq_rs.ph.w", 0b0100101101>; 133class LBUX_MM_ENC : POOL32A_1RMEMB0_FMT<"lbux", 0b1000100101>; 134class LHX_MM_ENC : POOL32A_1RMEMB0_FMT<"lhx", 0b0101100101>; 135class LWX_MM_ENC : POOL32A_1RMEMB0_FMT<"lwx", 0b0110100101>; 136class MAQ_S_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_s.w.phl", 0b01101001>; 137class MAQ_SA_W_PHL_MM_ENC : POOL32A_2RAC_FMT<"maq_sa.w.phl", 0b11101001>; 138class MAQ_S_W_PHR_MM_ENC : POOL32A_2RAC_FMT<"maq_s.w.phr", 0b00101001>; 139class MAQ_SA_W_PHR_MM_ENC : POOL32A_2RAC_FMT<"maq_sa.w.phr", 0b10101001>; 140class MFHI_MM_ENC : POOL32A_1RAC_FMT<"mfhi", 0b00000001>; 141class MFLO_MM_ENC : POOL32A_1RAC_FMT<"mflo", 0b01000001>; 142class MTHI_MM_ENC : POOL32A_1RAC_FMT<"mthi", 0b10000001>; 143class MTLO_MM_ENC : POOL32A_1RAC_FMT<"mthi", 0b11000001>; 144class PREPEND_MMR2_ENC : POOL32A_2RSA5B0_FMT<"prepend", 0b1001010101>; 145class RADDU_W_QB_MM_ENC : POOL32A_2R_FMT<"raddu.w.qb", 0b1111000100>; 146class RDDSP_MM_ENC : POOL32A_1RMASK7_FMT<"rddsp", 0b00011001>; 147class REPL_PH_MM_ENC : POOL32A_1RIMM10_FMT<"repl.ph", 0b0000111101>; 148class REPL_QB_MM_ENC : POOL32A_1RIMM8_FMT<"repl.qb", 0b010111>; 149class REPLV_PH_MM_ENC : POOL32A_2R_FMT<"replv.ph", 0b0000001100>; 150class REPLV_QB_MM_ENC : POOL32A_2R_FMT<"replv.qb", 0b0001001100>; 151class MTHLIP_MM_ENC : POOL32A_1RAC_FMT<"mthlip", 0b00001001>; 152class PACKRL_PH_MM_ENC : POOL32A_3RB0_FMT<"packrl.ph", 0b0110101101>; 153class PICK_PH_MM_ENC : POOL32A_3RB0_FMT<"pick.ph", 0b1000101101>; 154class PICK_QB_MM_ENC : POOL32A_3RB0_FMT<"pick.qb", 0b0111101101>; 155class SHILO_MM_ENC : POOL32A_4B0SHIFT6AC4B0_FMT<"shilo", 0b0000011101>; 156class SHILOV_MM_ENC : POOL32A_5B01RAC_FMT<"shilov", 0b01001001>; 157class WRDSP_MM_ENC : POOL32A_1RMASK7_FMT<"wrdsp", 0b01011001>; 158 159// Instruction desc. 160class ABSQ_S_PH_MM_R2_DESC_BASE<string opstr, SDPatternOperator OpNode, 161 InstrItinClass itin, RegisterOperand ROD, 162 RegisterOperand ROS = ROD> { 163 dag OutOperandList = (outs ROD:$rt); 164 dag InOperandList = (ins ROS:$rs); 165 string AsmString = !strconcat(opstr, "\t$rt, $rs"); 166 list<dag> Pattern = [(set ROD:$rt, (OpNode ROS:$rs))]; 167 InstrItinClass Itinerary = itin; 168} 169class ABSQ_S_PH_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 170 "absq_s.ph", int_mips_absq_s_ph, NoItinerary, DSPROpnd>, Defs<[DSPOutFlag20]>; 171class ABSQ_S_W_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 172 "absq_s.w", int_mips_absq_s_w, NoItinerary, GPR32Opnd>, Defs<[DSPOutFlag20]>; 173class ABSQ_S_QB_MMR2_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 174 "absq_s.qb", int_mips_absq_s_qb, NoItinerary, DSPROpnd>, Defs<[DSPOutFlag20]>; 175class PRECEQ_W_PHL_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 176 "preceq.w.phl", int_mips_preceq_w_phl, NoItinerary, GPR32Opnd, DSPROpnd>; 177class PRECEQ_W_PHR_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 178 "preceq.w.phr", int_mips_preceq_w_phr, NoItinerary, GPR32Opnd, DSPROpnd>; 179class PRECEQU_PH_QBL_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 180 "precequ.ph.qbl", int_mips_precequ_ph_qbl, NoItinerary, DSPROpnd>; 181class PRECEQU_PH_QBLA_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 182 "precequ.ph.qbla", int_mips_precequ_ph_qbla, NoItinerary, DSPROpnd>; 183class PRECEQU_PH_QBR_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 184 "precequ.ph.qbr", int_mips_precequ_ph_qbr, NoItinerary, DSPROpnd>; 185class PRECEQU_PH_QBRA_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 186 "precequ.ph.qbra", int_mips_precequ_ph_qbra, NoItinerary, DSPROpnd>; 187class PRECEU_PH_QBL_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 188 "preceu.ph.qbl", int_mips_preceu_ph_qbl, NoItinerary, DSPROpnd>; 189class PRECEU_PH_QBLA_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 190 "preceu.ph.qbla", int_mips_preceu_ph_qbla, NoItinerary, DSPROpnd>; 191class PRECEU_PH_QBR_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 192 "preceu.ph.qbr", int_mips_preceu_ph_qbr, NoItinerary, DSPROpnd>; 193class PRECEU_PH_QBRA_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE< 194 "preceu.ph.qbra", int_mips_preceu_ph_qbra, NoItinerary, DSPROpnd>; 195 196class SHLL_R2_MM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 197 SDPatternOperator ImmPat, InstrItinClass itin, 198 RegisterOperand RO, Operand ImmOpnd> { 199 dag OutOperandList = (outs RO:$rt); 200 dag InOperandList = (ins RO:$rs, ImmOpnd:$sa); 201 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $sa"); 202 list<dag> Pattern = [(set RO:$rt, (OpNode RO:$rs, ImmPat:$sa))]; 203 InstrItinClass Itinerary = itin; 204 bit hasSideEffects = 1; 205} 206class SHLL_PH_MM_DESC : SHLL_R2_MM_DESC_BASE< 207 "shll.ph", null_frag, immZExt4, NoItinerary, DSPROpnd, uimm4>, 208 Defs<[DSPOutFlag22]>; 209class SHLL_S_PH_MM_DESC : SHLL_R2_MM_DESC_BASE< 210 "shll_s.ph", int_mips_shll_s_ph, immZExt4, NoItinerary, DSPROpnd, uimm4>, 211 Defs<[DSPOutFlag22]>; 212class SHLL_QB_MM_DESC : SHLL_R2_MM_DESC_BASE< 213 "shll.qb", null_frag, immZExt3, NoItinerary, DSPROpnd, uimm3>, 214 Defs<[DSPOutFlag22]>; 215class SHLL_S_W_MM_DESC : SHLL_R2_MM_DESC_BASE< 216 "shll_s.w", int_mips_shll_s_w, immZExt5, NoItinerary, GPR32Opnd, uimm5>, 217 Defs<[DSPOutFlag22]>; 218class SHRA_QB_MMR2_DESC : SHLL_R2_MM_DESC_BASE< 219 "shra.qb", null_frag, immZExt3, NoItinerary, DSPROpnd, uimm3>; 220class SHRA_R_QB_MMR2_DESC : SHLL_R2_MM_DESC_BASE< 221 "shra_r.qb", int_mips_shra_r_qb, immZExt3, NoItinerary, DSPROpnd, uimm3>; 222class SHRA_PH_MM_DESC : SHLL_R2_MM_DESC_BASE< 223 "shra.ph", null_frag, immZExt4, NoItinerary, DSPROpnd, uimm4>; 224class SHRA_R_PH_MM_DESC : SHLL_R2_MM_DESC_BASE< 225 "shra_r.ph", int_mips_shra_r_ph, immZExt4, NoItinerary, DSPROpnd, uimm4>; 226class SHRA_R_W_MM_DESC : SHLL_R2_MM_DESC_BASE< 227 "shra_r.w", int_mips_shra_r_w, immZExt5, NoItinerary, GPR32Opnd, uimm5>; 228class SHRL_QB_MM_DESC : SHLL_R2_MM_DESC_BASE< 229 "shrl.qb", null_frag, immZExt3, NoItinerary, DSPROpnd, uimm3>; 230class SHRL_PH_MMR2_DESC : SHLL_R2_MM_DESC_BASE< 231 "shrl.ph", null_frag, immZExt4, NoItinerary, DSPROpnd, uimm4>; 232 233class SHLLV_R3_MM_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 234 InstrItinClass itin, RegisterOperand RO> { 235 dag OutOperandList = (outs RO:$rd); 236 dag InOperandList = (ins RO:$rt, GPR32Opnd:$rs); 237 string AsmString = !strconcat(instr_asm, "\t$rd, $rt, $rs"); 238 list<dag> Pattern = [(set RO:$rd, (OpNode RO:$rt, GPR32Opnd:$rs))]; 239 InstrItinClass Itinerary = itin; 240} 241class SHLLV_PH_MM_DESC : SHLLV_R3_MM_DESC_BASE< 242 "shllv.ph", int_mips_shll_ph, NoItinerary, DSPROpnd>, Defs<[DSPOutFlag22]>; 243class SHLLV_S_PH_MM_DESC : SHLLV_R3_MM_DESC_BASE< 244 "shllv_s.ph", int_mips_shll_s_ph, NoItinerary, DSPROpnd>, 245 Defs<[DSPOutFlag22]>; 246class SHLLV_QB_MM_DESC : SHLLV_R3_MM_DESC_BASE< 247 "shllv.qb", int_mips_shll_qb, NoItinerary, DSPROpnd>, Defs<[DSPOutFlag22]>; 248class SHLLV_S_W_MM_DESC : SHLLV_R3_MM_DESC_BASE< 249 "shllv_s.w", int_mips_shll_s_w, NoItinerary, GPR32Opnd>, Defs<[DSPOutFlag22]>; 250class SHRAV_PH_MM_DESC : SHLLV_R3_MM_DESC_BASE< 251 "shrav.ph", int_mips_shra_ph, NoItinerary, DSPROpnd>; 252class SHRAV_R_PH_MM_DESC : SHLLV_R3_MM_DESC_BASE< 253 "shrav_r.ph", int_mips_shra_r_ph, NoItinerary, DSPROpnd>; 254class SHRAV_QB_MMR2_DESC : SHLLV_R3_MM_DESC_BASE< 255 "shrav.qb", int_mips_shra_qb, NoItinerary, DSPROpnd>; 256class SHRAV_R_QB_MMR2_DESC : SHLLV_R3_MM_DESC_BASE< 257 "shrav_r.qb", int_mips_shra_r_qb, NoItinerary, DSPROpnd>; 258class SHRAV_R_W_MM_DESC : SHLLV_R3_MM_DESC_BASE< 259 "shrav_r.w", int_mips_shra_r_w, NoItinerary, GPR32Opnd>; 260class SHRLV_PH_MMR2_DESC : SHLLV_R3_MM_DESC_BASE< 261 "shrlv.ph", int_mips_shrl_ph, NoItinerary, DSPROpnd>; 262class SHRLV_QB_MM_DESC : SHLLV_R3_MM_DESC_BASE< 263 "shrlv.qb", int_mips_shrl_qb, NoItinerary, DSPROpnd>; 264 265class EXT_MM_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 266 InstrItinClass itin> { 267 dag OutOperandList = (outs GPR32Opnd:$rt); 268 dag InOperandList = (ins ACC64DSPOpnd:$ac, GPR32Opnd:$rs); 269 string AsmString = !strconcat(instr_asm, "\t$rt, $ac, $rs"); 270 InstrItinClass Itinerary = itin; 271} 272class EXT_MM_1R_DESC_BASE<string instr_asm, SDPatternOperator OpNode, 273 InstrItinClass itin> { 274 dag OutOperandList = (outs GPR32Opnd:$rt); 275 dag InOperandList = (ins ACC64DSPOpnd:$ac, uimm5:$imm); 276 string AsmString = !strconcat(instr_asm, "\t$rt, $ac, $imm"); 277 InstrItinClass Itinerary = itin; 278} 279 280class EXTP_MM_DESC 281 : EXT_MM_1R_DESC_BASE<"extp", MipsEXTP, NoItinerary>, 282 Uses<[DSPPos]>, Defs<[DSPEFI]>; 283class EXTPDP_MM_DESC 284 : EXT_MM_1R_DESC_BASE<"extpdp", MipsEXTPDP, NoItinerary>, 285 Uses<[DSPPos]>, Defs<[DSPPos, DSPEFI]>; 286class EXTPDPV_MM_DESC 287 : EXT_MM_2R_DESC_BASE<"extpdpv", MipsEXTPDP, NoItinerary>, 288 Uses<[DSPPos]>, Defs<[DSPPos, DSPEFI]>; 289class EXTPV_MM_DESC 290 : EXT_MM_2R_DESC_BASE<"extpv", MipsEXTP, NoItinerary>, 291 Uses<[DSPPos]>, Defs<[DSPEFI]>; 292class EXTR_W_MM_DESC 293 : EXT_MM_1R_DESC_BASE<"extr.w", MipsEXTR_W, NoItinerary>, 294 Defs<[DSPOutFlag23]>; 295class EXTR_R_W_MM_DESC 296 : EXT_MM_1R_DESC_BASE<"extr_r.w", MipsEXTR_R_W, NoItinerary>, 297 Defs<[DSPOutFlag23]>; 298class EXTR_RS_W_MM_DESC 299 : EXT_MM_1R_DESC_BASE<"extr_rs.w", MipsEXTR_RS_W, NoItinerary>, 300 Defs<[DSPOutFlag23]>; 301class EXTR_S_H_MM_DESC 302 : EXT_MM_1R_DESC_BASE<"extr_s.h", MipsEXTR_S_H, NoItinerary>, 303 Defs<[DSPOutFlag23]>; 304class EXTRV_W_MM_DESC 305 : EXT_MM_2R_DESC_BASE<"extrv.w", MipsEXTR_W, NoItinerary>, 306 Defs<[DSPOutFlag23]>; 307class EXTRV_R_W_MM_DESC 308 : EXT_MM_2R_DESC_BASE<"extrv_r.w", MipsEXTR_R_W, NoItinerary>, 309 Defs<[DSPOutFlag23]>; 310class EXTRV_RS_W_MM_DESC 311 : EXT_MM_2R_DESC_BASE<"extrv_rs.w", MipsEXTR_RS_W, NoItinerary>, 312 Defs<[DSPOutFlag23]>; 313class EXTRV_S_H_MM_DESC 314 : EXT_MM_2R_DESC_BASE<"extrv_s.h", MipsEXTR_S_H, NoItinerary>, 315 Defs<[DSPOutFlag23]>; 316 317class MFHI_MM_DESC_BASE<string instr_asm, RegisterOperand RO, SDNode OpNode, 318 InstrItinClass itin> { 319 dag OutOperandList = (outs GPR32Opnd:$rs); 320 dag InOperandList = (ins RO:$ac); 321 string AsmString = !strconcat(instr_asm, "\t$rs, $ac"); 322 list<dag> Pattern = [(set GPR32Opnd:$rs, (OpNode RO:$ac))]; 323 InstrItinClass Itinerary = itin; 324} 325 326class MFHI_MM_DESC : MFHI_MM_DESC_BASE<"mfhi", ACC64DSPOpnd, MipsMFHI, 327 NoItinerary>; 328class MFLO_MM_DESC : MFHI_MM_DESC_BASE<"mflo", ACC64DSPOpnd, MipsMFLO, 329 NoItinerary>; 330 331class RADDU_W_QB_MM_DESC { 332 dag OutOperandList = (outs GPR32Opnd:$rt); 333 dag InOperandList = (ins DSPROpnd:$rs); 334 string AsmString = !strconcat("raddu.w.qb", "\t$rt, $rs"); 335 list<dag> Pattern = [(set GPR32Opnd:$rt, (int_mips_raddu_w_qb DSPROpnd:$rs))]; 336 InstrItinClass Itinerary = NoItinerary; 337 string BaseOpcode = "raddu.w.qb"; 338} 339 340class RDDSP_MM_DESC { 341 dag OutOperandList = (outs GPR32Opnd:$rt); 342 dag InOperandList = (ins uimm16:$mask); 343 string AsmString = !strconcat("rddsp", "\t$rt, $mask"); 344 list<dag> Pattern = [(set GPR32Opnd:$rt, (int_mips_rddsp immZExt10:$mask))]; 345 InstrItinClass Itinerary = NoItinerary; 346} 347 348class REPL_QB_MM_DESC { 349 dag OutOperandList = (outs DSPROpnd:$rt); 350 dag InOperandList = (ins uimm16:$imm); 351 string AsmString = !strconcat("repl.qb", "\t$rt, $imm"); 352 list<dag> Pattern = [(set DSPROpnd:$rt, (int_mips_repl_qb immZExt8:$imm))]; 353 InstrItinClass Itinerary = NoItinerary; 354} 355 356class REPLV_PH_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE<"replv.ph", int_mips_repl_ph, 357 NoItinerary, DSPROpnd, 358 GPR32Opnd>; 359class REPLV_QB_MM_DESC : ABSQ_S_PH_MM_R2_DESC_BASE<"replv.qb", int_mips_repl_qb, 360 NoItinerary, DSPROpnd, 361 GPR32Opnd>; 362 363class WRDSP_MM_DESC { 364 dag OutOperandList = (outs); 365 dag InOperandList = (ins GPR32Opnd:$rt, uimm7:$mask); 366 string AsmString = !strconcat("wrdsp", "\t$rt, $mask"); 367 list<dag> Pattern = [(int_mips_wrdsp GPR32Opnd:$rt, immZExt7:$mask)]; 368 InstrItinClass Itinerary = NoItinerary; 369} 370 371// Instruction defs. 372// microMIPS DSP Rev 1 373def ADDQ_PH_MM : DspMMRel, ADDQ_PH_MM_ENC, ADDQ_PH_DESC; 374def ADDQ_S_PH_MM : DspMMRel, ADDQ_S_PH_MM_ENC, ADDQ_S_PH_DESC; 375def ADDQ_S_W_MM : DspMMRel, ADDQ_S_W_MM_ENC, ADDQ_S_W_DESC; 376def ADDU_QB_MM : DspMMRel, ADDU_QB_MM_ENC, ADDU_QB_DESC; 377def ADDU_S_QB_MM : DspMMRel, ADDU_S_QB_MM_ENC, ADDU_S_QB_DESC; 378def ADDSC_MM : DspMMRel, ADDSC_MM_ENC, ADDSC_DESC; 379def ADDWC_MM : DspMMRel, ADDWC_MM_ENC, ADDWC_DESC; 380def DPAQ_S_W_PH_MM : DspMMRel, DPAQ_S_W_PH_MM_ENC, DPAQ_S_W_PH_DESC; 381def DPAQ_SA_L_W_MM : DspMMRel, DPAQ_SA_L_W_MM_ENC, DPAQ_SA_L_W_DESC; 382def DPAU_H_QBL_MM : DspMMRel, DPAU_H_QBL_MM_ENC, DPAU_H_QBL_DESC; 383def DPAU_H_QBR_MM : DspMMRel, DPAU_H_QBR_MM_ENC, DPAU_H_QBR_DESC; 384def ABSQ_S_PH_MM : DspMMRel, ABSQ_S_PH_MM_ENC, ABSQ_S_PH_MM_DESC; 385def ABSQ_S_W_MM : DspMMRel, ABSQ_S_W_MM_ENC, ABSQ_S_W_MM_DESC; 386def INSV_MM : DspMMRel, INSV_MM_ENC, INSV_DESC; 387def MADD_DSP_MM : DspMMRel, MADD_DSP_MM_ENC, MADD_DSP_DESC; 388def MADDU_DSP_MM : DspMMRel, MADDU_DSP_MM_ENC, MADDU_DSP_DESC; 389def MSUB_DSP_MM : DspMMRel, MSUB_DSP_MM_ENC, MSUB_DSP_DESC; 390def MSUBU_DSP_MM : DspMMRel, MSUBU_DSP_MM_ENC, MSUBU_DSP_DESC; 391def MULT_DSP_MM : DspMMRel, MULT_DSP_MM_ENC, MULT_DSP_DESC; 392def MULTU_DSP_MM : DspMMRel, MULTU_DSP_MM_ENC, MULTU_DSP_DESC; 393def SHLL_PH_MM : DspMMRel, SHLL_PH_MM_ENC, SHLL_PH_MM_DESC; 394def SHLL_S_PH_MM : DspMMRel, SHLL_S_PH_MM_ENC, SHLL_S_PH_MM_DESC; 395def SHLL_QB_MM : DspMMRel, SHLL_QB_MM_ENC, SHLL_QB_MM_DESC; 396def SHLLV_PH_MM : DspMMRel, SHLLV_PH_MM_ENC, SHLLV_PH_MM_DESC; 397def SHLLV_S_PH_MM : DspMMRel, SHLLV_S_PH_MM_ENC, SHLLV_S_PH_MM_DESC; 398def SHLLV_QB_MM : DspMMRel, SHLLV_QB_MM_ENC, SHLLV_QB_MM_DESC; 399def SHLLV_S_W_MM : DspMMRel, SHLLV_S_W_MM_ENC, SHLLV_S_W_MM_DESC; 400def SHLL_S_W_MM : DspMMRel, SHLL_S_W_MM_ENC, SHLL_S_W_MM_DESC; 401def SHRA_PH_MM : DspMMRel, SHRA_PH_MM_ENC, SHRA_PH_MM_DESC; 402def SHRA_R_PH_MM : DspMMRel, SHRA_R_PH_MM_ENC, SHRA_R_PH_MM_DESC; 403def SHRAV_PH_MM : DspMMRel, SHRAV_PH_MM_ENC, SHRAV_PH_MM_DESC; 404def SHRAV_R_PH_MM : DspMMRel, SHRAV_R_PH_MM_ENC, SHRAV_R_PH_MM_DESC; 405def SHRAV_R_W_MM : DspMMRel, SHRAV_R_W_MM_ENC, SHRAV_R_W_MM_DESC; 406def SHRA_R_W_MM : DspMMRel, SHRA_R_W_MM_ENC, SHRA_R_W_MM_DESC; 407def SHRL_QB_MM : DspMMRel, SHRL_QB_MM_ENC, SHRL_QB_MM_DESC; 408def SHRLV_QB_MM : DspMMRel, SHRLV_QB_MM_ENC, SHRLV_QB_MM_DESC; 409def PRECEQ_W_PHL_MM : DspMMRel, PRECEQ_W_PHL_MM_ENC, PRECEQ_W_PHL_MM_DESC; 410def PRECEQ_W_PHR_MM : DspMMRel, PRECEQ_W_PHR_MM_ENC, PRECEQ_W_PHR_MM_DESC; 411def PRECEQU_PH_QBL_MM : DspMMRel, PRECEQU_PH_QBL_MM_ENC, PRECEQU_PH_QBL_MM_DESC; 412def PRECEQU_PH_QBLA_MM : DspMMRel, PRECEQU_PH_QBLA_MM_ENC, 413 PRECEQU_PH_QBLA_MM_DESC; 414def PRECEQU_PH_QBR_MM : DspMMRel, PRECEQU_PH_QBR_MM_ENC, PRECEQU_PH_QBR_MM_DESC; 415def PRECEQU_PH_QBRA_MM : DspMMRel, PRECEQU_PH_QBRA_MM_ENC, 416 PRECEQU_PH_QBRA_MM_DESC; 417def PRECEU_PH_QBL_MM : DspMMRel, PRECEU_PH_QBL_MM_ENC, PRECEU_PH_QBL_MM_DESC; 418def PRECEU_PH_QBLA_MM : DspMMRel, PRECEU_PH_QBLA_MM_ENC, PRECEU_PH_QBLA_MM_DESC; 419def PRECEU_PH_QBR_MM : DspMMRel, PRECEU_PH_QBR_MM_ENC, PRECEU_PH_QBR_MM_DESC; 420def PRECEU_PH_QBRA_MM : DspMMRel, PRECEU_PH_QBRA_MM_ENC, PRECEU_PH_QBRA_MM_DESC; 421def SUBQ_PH_MM : DspMMRel, SUBQ_PH_MM_ENC, SUBQ_PH_DESC; 422def SUBQ_S_PH_MM : DspMMRel, SUBQ_S_PH_MM_ENC, SUBQ_S_PH_DESC; 423def SUBQ_S_W_MM : DspMMRel, SUBQ_S_W_MM_ENC, SUBQ_S_W_DESC; 424def SUBU_QB_MM : DspMMRel, SUBU_QB_MM_ENC, SUBU_QB_DESC; 425def SUBU_S_QB_MM : DspMMRel, SUBU_S_QB_MM_ENC, SUBU_S_QB_DESC; 426def EXTP_MM : DspMMRel, EXTP_MM_ENC, EXTP_MM_DESC; 427def EXTPDP_MM : DspMMRel, EXTPDP_MM_ENC, EXTPDP_MM_DESC; 428def EXTPDPV_MM : DspMMRel, EXTPDPV_MM_ENC, EXTPDPV_MM_DESC; 429def EXTPV_MM : DspMMRel, EXTPV_MM_ENC, EXTPV_MM_DESC; 430def EXTR_W_MM : DspMMRel, EXTR_W_MM_ENC, EXTR_W_MM_DESC; 431def EXTR_R_W_MM : DspMMRel, EXTR_R_W_MM_ENC, EXTR_R_W_MM_DESC; 432def EXTR_RS_W_MM : DspMMRel, EXTR_RS_W_MM_ENC, EXTR_RS_W_MM_DESC; 433def EXTR_S_H_MM : DspMMRel, EXTR_S_H_MM_ENC, EXTR_S_H_MM_DESC; 434def EXTRV_W_MM : DspMMRel, EXTRV_W_MM_ENC, EXTRV_W_MM_DESC; 435def EXTRV_R_W_MM : DspMMRel, EXTRV_R_W_MM_ENC, EXTRV_R_W_MM_DESC; 436def EXTRV_RS_W_MM : DspMMRel, EXTRV_RS_W_MM_ENC, EXTRV_RS_W_MM_DESC; 437def EXTRV_S_H_MM : DspMMRel, EXTRV_S_H_MM_ENC, EXTRV_S_H_MM_DESC; 438def DPSQ_S_W_PH_MM : DspMMRel, DPSQ_S_W_PH_MM_ENC, DPSQ_S_W_PH_DESC; 439def DPSQ_SA_L_W_MM : DspMMRel, DPSQ_SA_L_W_MM_ENC, DPSQ_SA_L_W_DESC; 440def DPSU_H_QBL_MM : DspMMRel, DPSU_H_QBL_MM_ENC, DPSU_H_QBL_DESC; 441def DPSU_H_QBR_MM : DspMMRel, DPSU_H_QBR_MM_ENC, DPSU_H_QBR_DESC; 442def MULEQ_S_W_PHL_MM : DspMMRel, MULEQ_S_W_PHL_MM_ENC, MULEQ_S_W_PHL_DESC; 443def MULEQ_S_W_PHR_MM : DspMMRel, MULEQ_S_W_PHR_MM_ENC, MULEQ_S_W_PHR_DESC; 444def MULEU_S_PH_QBL_MM : DspMMRel, MULEU_S_PH_QBL_MM_ENC, MULEU_S_PH_QBL_DESC; 445def MULEU_S_PH_QBR_MM : DspMMRel, MULEU_S_PH_QBR_MM_ENC, MULEU_S_PH_QBR_DESC; 446def MULQ_RS_PH_MM : DspMMRel, MULQ_RS_PH_MM_ENC, MULQ_RS_PH_DESC; 447def PRECRQ_PH_W_MM : DspMMRel, PRECRQ_PH_W_MM_ENC, PRECRQ_PH_W_DESC; 448def PRECRQ_QB_PH_MM : DspMMRel, PRECRQ_QB_PH_MM_ENC, PRECRQ_QB_PH_DESC; 449def PRECRQU_S_QB_PH_MM : DspMMRel, PRECRQU_S_QB_PH_MM_ENC, PRECRQU_S_QB_PH_DESC; 450def PRECRQ_RS_PH_W_MM : DspMMRel, PRECRQ_RS_PH_W_MM_ENC, PRECRQ_RS_PH_W_DESC; 451def LBUX_MM : DspMMRel, LBUX_MM_ENC, LBUX_DESC; 452def LHX_MM : DspMMRel, LHX_MM_ENC, LHX_DESC; 453def LWX_MM : DspMMRel, LWX_MM_ENC, LWX_DESC; 454def MAQ_S_W_PHL_MM : DspMMRel, MAQ_S_W_PHL_MM_ENC, MAQ_S_W_PHL_DESC; 455def MAQ_SA_W_PHL_MM : DspMMRel, MAQ_SA_W_PHL_MM_ENC, MAQ_SA_W_PHL_DESC; 456def MAQ_S_W_PHR_MM : DspMMRel, MAQ_S_W_PHR_MM_ENC, MAQ_S_W_PHR_DESC; 457def MAQ_SA_W_PHR_MM : DspMMRel, MAQ_SA_W_PHR_MM_ENC, MAQ_SA_W_PHR_DESC; 458def MFHI_DSP_MM : DspMMRel, MFHI_MM_ENC, MFHI_MM_DESC; 459def MFLO_DSP_MM : DspMMRel, MFLO_MM_ENC, MFLO_MM_DESC; 460def MTHI_DSP_MM : DspMMRel, MTHI_MM_ENC, MTHI_DESC; 461def MTLO_DSP_MM : DspMMRel, MTLO_MM_ENC, MTLO_DESC; 462def RADDU_W_QB_MM : DspMMRel, RADDU_W_QB_MM_ENC, RADDU_W_QB_MM_DESC; 463def RDDSP_MM : DspMMRel, RDDSP_MM_ENC, RDDSP_MM_DESC; 464def REPL_PH_MM : DspMMRel, REPL_PH_MM_ENC, REPL_PH_DESC; 465def REPL_QB_MM : DspMMRel, REPL_QB_MM_ENC, REPL_QB_MM_DESC; 466def REPLV_PH_MM : DspMMRel, REPLV_PH_MM_ENC, REPLV_PH_MM_DESC; 467def REPLV_QB_MM : DspMMRel, REPLV_QB_MM_ENC, REPLV_QB_MM_DESC; 468def MTHLIP_MM : DspMMRel, MTHLIP_MM_ENC, MTHLIP_DESC; 469def PACKRL_PH_MM : DspMMRel, PACKRL_PH_MM_ENC, PACKRL_PH_DESC; 470def PICK_PH_MM : DspMMRel, PICK_PH_MM_ENC, PICK_PH_DESC; 471def PICK_QB_MM : DspMMRel, PICK_QB_MM_ENC, PICK_QB_DESC; 472def SHILO_MM : DspMMRel, SHILO_MM_ENC, SHILO_DESC; 473def SHILOV_MM : DspMMRel, SHILOV_MM_ENC, SHILOV_DESC; 474def WRDSP_MM : DspMMRel, WRDSP_MM_ENC, WRDSP_MM_DESC; 475// microMIPS DSP Rev 2 476def ABSQ_S_QB_MMR2 : DspMMRel, ABSQ_S_QB_MMR2_ENC, ABSQ_S_QB_MMR2_DESC, 477 ISA_DSPR2; 478def ADDQH_PH_MMR2 : DspMMRel, ADDQH_PH_MMR2_ENC, ADDQH_PH_DESC, ISA_DSPR2; 479def ADDQH_R_PH_MMR2 : DspMMRel, ADDQH_R_PH_MMR2_ENC, ADDQH_R_PH_DESC, ISA_DSPR2; 480def ADDQH_W_MMR2 : DspMMRel, ADDQH_W_MMR2_ENC, ADDQH_W_DESC, ISA_DSPR2; 481def ADDQH_R_W_MMR2 : DspMMRel, ADDQH_R_W_MMR2_ENC, ADDQH_R_W_DESC, ISA_DSPR2; 482def ADDU_PH_MMR2 : DspMMRel, ADDU_PH_MMR2_ENC, ADDU_PH_DESC, ISA_DSPR2; 483def ADDU_S_PH_MMR2 : DspMMRel, ADDU_S_PH_MMR2_ENC, ADDU_S_PH_DESC, ISA_DSPR2; 484def ADDUH_QB_MMR2 : DspMMRel, ADDUH_QB_MMR2_ENC, ADDUH_QB_DESC, ISA_DSPR2; 485def ADDUH_R_QB_MMR2 : DspMMRel, ADDUH_R_QB_MMR2_ENC, ADDUH_R_QB_DESC, ISA_DSPR2; 486def DPA_W_PH_MMR2 : DspMMRel, DPA_W_PH_MMR2_ENC, DPA_W_PH_DESC, ISA_DSPR2; 487def DPAQX_S_W_PH_MMR2 : DspMMRel, DPAQX_S_W_PH_MMR2_ENC, DPAQX_S_W_PH_DESC, 488 ISA_DSPR2; 489def DPAQX_SA_W_PH_MMR2 : DspMMRel, DPAQX_SA_W_PH_MMR2_ENC, DPAQX_SA_W_PH_DESC, 490 ISA_DSPR2; 491def DPAX_W_PH_MMR2 : DspMMRel, DPAX_W_PH_MMR2_ENC, DPAX_W_PH_DESC, ISA_DSPR2; 492def SHRA_QB_MMR2 : DspMMRel, SHRA_QB_MMR2_ENC, SHRA_QB_MMR2_DESC, ISA_DSPR2; 493def SHRA_R_QB_MMR2 : DspMMRel, SHRA_R_QB_MMR2_ENC, SHRA_R_QB_MMR2_DESC, 494 ISA_DSPR2; 495def SHRAV_QB_MMR2 : DspMMRel, SHRAV_QB_MMR2_ENC, SHRAV_QB_MMR2_DESC, ISA_DSPR2; 496def SHRAV_R_QB_MMR2 : DspMMRel, SHRAV_R_QB_MMR2_ENC, SHRAV_R_QB_MMR2_DESC, 497 ISA_DSPR2; 498def SHRL_PH_MMR2 : DspMMRel, SHRL_PH_MMR2_ENC, SHRL_PH_MMR2_DESC, ISA_DSPR2; 499def SHRLV_PH_MMR2 : DspMMRel, SHRLV_PH_MMR2_ENC, SHRLV_PH_MMR2_DESC, ISA_DSPR2; 500def SUBQH_PH_MMR2 : DspMMRel, SUBQH_PH_MMR2_ENC, SUBQH_PH_DESC, ISA_DSPR2; 501def SUBQH_R_PH_MMR2 : DspMMRel, SUBQH_R_PH_MMR2_ENC, SUBQH_R_PH_DESC, ISA_DSPR2; 502def SUBQH_W_MMR2 : DspMMRel, SUBQH_W_MMR2_ENC, SUBQH_W_DESC, ISA_DSPR2; 503def SUBQH_R_W_MMR2 : DspMMRel, SUBQH_R_W_MMR2_ENC, SUBQH_R_W_DESC, ISA_DSPR2; 504def SUBU_PH_MMR2 : DspMMRel, SUBU_PH_MMR2_ENC, SUBU_PH_DESC, ISA_DSPR2; 505def SUBU_S_PH_MMR2 : DspMMRel, SUBU_S_PH_MMR2_ENC, SUBU_S_PH_DESC, ISA_DSPR2; 506def SUBUH_QB_MMR2 : DspMMRel, SUBUH_QB_MMR2_ENC, SUBUH_QB_DESC, ISA_DSPR2; 507def SUBUH_R_QB_MMR2 : DspMMRel, SUBUH_R_QB_MMR2_ENC, SUBUH_R_QB_DESC, ISA_DSPR2; 508def DPS_W_PH_MMR2 : DspMMRel, DPS_W_PH_MMR2_ENC, DPS_W_PH_DESC, ISA_DSPR2; 509def DPSQX_S_W_PH_MMR2 : DspMMRel, DPSQX_S_W_PH_MMR2_ENC, DPSQX_S_W_PH_DESC, 510 ISA_DSPR2; 511def DPSQX_SA_W_PH_MMR2 : DspMMRel, DPSQX_SA_W_PH_MMR2_ENC, DPSQX_SA_W_PH_DESC, 512 ISA_DSPR2; 513def DPSX_W_PH_MMR2 : DspMMRel, DPSX_W_PH_MMR2_ENC, DPSX_W_PH_DESC, ISA_DSPR2; 514def MUL_PH_MMR2 : DspMMRel, MUL_PH_MMR2_ENC, MUL_PH_DESC, ISA_DSPR2; 515def MUL_S_PH_MMR2 : DspMMRel, MUL_S_PH_MMR2_ENC, MUL_S_PH_DESC, ISA_DSPR2; 516def MULQ_RS_W_MMR2 : DspMMRel, MULQ_RS_W_MMR2_ENC, MULQ_RS_W_DESC, ISA_DSPR2; 517def MULQ_S_PH_MMR2 : DspMMRel, MULQ_S_PH_MMR2_ENC, MULQ_S_PH_DESC, ISA_DSPR2; 518def MULQ_S_W_MMR2 : DspMMRel, MULQ_S_W_MMR2_ENC, MULQ_S_W_DESC, ISA_DSPR2; 519def PRECR_QB_PH_MMR2 : DspMMRel, PRECR_QB_PH_MMR2_ENC, PRECR_QB_PH_DESC, 520 ISA_DSPR2; 521def PRECR_SRA_PH_W_MMR2 : DspMMRel, PRECR_SRA_PH_W_MMR2_ENC, 522 PRECR_SRA_PH_W_DESC, ISA_DSPR2; 523def PRECR_SRA_R_PH_W_MMR2 : DspMMRel, PRECR_SRA_R_PH_W_MMR2_ENC, 524 PRECR_SRA_R_PH_W_DESC, ISA_DSPR2; 525def PREPEND_MMR2 : DspMMRel, PREPEND_MMR2_ENC, PREPEND_DESC, ISA_DSPR2; 526 527// Instruction alias. 528def : MMDSPInstAlias<"wrdsp $rt", (WRDSP_MM GPR32Opnd:$rt, 0x1F), 1>; 529