1292915Sdim//=- MicroMips64r6InstrInfo.td - Instruction Information -*- tablegen -*- -=// 2292915Sdim// 3292915Sdim// The LLVM Compiler Infrastructure 4292915Sdim// 5292915Sdim// This file is distributed under the University of Illinois Open Source 6292915Sdim// License. See LICENSE.TXT for details. 7292915Sdim// 8292915Sdim//===----------------------------------------------------------------------===// 9292915Sdim// 10292915Sdim// This file describes MicroMips64r6 instructions. 11292915Sdim// 12292915Sdim//===----------------------------------------------------------------------===// 13292915Sdim 14292915Sdim//===----------------------------------------------------------------------===// 15292915Sdim// 16292915Sdim// Instruction Encodings 17292915Sdim// 18292915Sdim//===----------------------------------------------------------------------===// 19292915Sdim 20292915Sdimclass DAUI_MMR6_ENC : DAUI_FM_MMR6; 21292915Sdimclass DAHI_MMR6_ENC : POOL32I_ADD_IMM_FM_MMR6<0b10001>; 22292915Sdimclass DATI_MMR6_ENC : POOL32I_ADD_IMM_FM_MMR6<0b10000>; 23292915Sdimclass DEXT_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b101100>; 24292915Sdimclass DEXTM_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b100100>; 25292915Sdimclass DEXTU_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b010100>; 26292915Sdimclass DALIGN_MMR6_ENC : POOL32S_DALIGN_FM_MMR6; 27292915Sdimclass DDIV_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"ddiv", 0b100011000>; 28292915Sdimclass DMOD_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmod", 0b101011000>; 29292915Sdimclass DDIVU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"ddivu", 0b110011000>; 30292915Sdimclass DMODU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmodu", 0b111011000>; 31292915Sdim 32292915Sdim//===----------------------------------------------------------------------===// 33292915Sdim// 34292915Sdim// Instruction Descriptions 35292915Sdim// 36292915Sdim//===----------------------------------------------------------------------===// 37292915Sdim 38292915Sdimclass DAUI_MMR6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> 39292915Sdim : MMR6Arch<instr_asm>, MipsR6Inst { 40292915Sdim dag OutOperandList = (outs GPROpnd:$rt); 41292915Sdim dag InOperandList = (ins GPROpnd:$rs, simm16:$imm); 42292915Sdim string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $imm"); 43292915Sdim list<dag> Pattern = []; 44292915Sdim} 45292915Sdimclass DAUI_MMR6_DESC : DAUI_MMR6_DESC_BASE<"daui", GPR64Opnd>; 46292915Sdim 47292915Sdimclass DAHI_DATI_DESC_BASE<string instr_asm, RegisterOperand GPROpnd> 48292915Sdim : MMR6Arch<instr_asm>, MipsR6Inst { 49292915Sdim dag OutOperandList = (outs GPROpnd:$rs); 50292915Sdim dag InOperandList = (ins GPROpnd:$rt, simm16:$imm); 51292915Sdim string AsmString = !strconcat(instr_asm, "\t$rt, $imm"); 52292915Sdim string Constraints = "$rs = $rt"; 53292915Sdim} 54292915Sdimclass DAHI_MMR6_DESC : DAHI_DATI_DESC_BASE<"dahi", GPR64Opnd>; 55292915Sdimclass DATI_MMR6_DESC : DAHI_DATI_DESC_BASE<"dati", GPR64Opnd>; 56292915Sdim 57292915Sdimclass EXTBITS_DESC_BASE<string instr_asm, RegisterOperand RO, Operand PosOpnd, 58292915Sdim Operand SizeOpnd, SDPatternOperator Op = null_frag> 59292915Sdim : MMR6Arch<instr_asm>, MipsR6Inst { 60292915Sdim dag OutOperandList = (outs RO:$rt); 61292915Sdim dag InOperandList = (ins RO:$rs, PosOpnd:$pos, SizeOpnd:$size); 62292915Sdim string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $pos, $size"); 63292915Sdim list<dag> Pattern = [(set RO:$rt, (Op RO:$rs, imm:$pos, imm:$size))]; 64292915Sdim InstrItinClass Itinerary = II_EXT; 65292915Sdim Format Form = FrmR; 66292915Sdim string BaseOpcode = instr_asm; 67292915Sdim} 68292915Sdim// TODO: Add 'pos + size' constraint check to dext* instructions 69292915Sdim// DEXT: 0 < pos + size <= 63 70292915Sdim// DEXTM, DEXTU: 32 < pos + size <= 64 71292915Sdimclass DEXT_MMR6_DESC : EXTBITS_DESC_BASE<"dext", GPR64Opnd, uimm5, 72292915Sdim uimm5_plus1, MipsExt>; 73292915Sdimclass DEXTM_MMR6_DESC : EXTBITS_DESC_BASE<"dextm", GPR64Opnd, uimm5, 74292915Sdim uimm5_plus33, MipsExt>; 75292915Sdimclass DEXTU_MMR6_DESC : EXTBITS_DESC_BASE<"dextu", GPR64Opnd, uimm5_plus32, 76292915Sdim uimm5_plus1, MipsExt>; 77292915Sdim 78292915Sdimclass DALIGN_DESC_BASE<string instr_asm, RegisterOperand GPROpnd, 79292915Sdim Operand ImmOpnd> : MMR6Arch<instr_asm>, MipsR6Inst { 80292915Sdim dag OutOperandList = (outs GPROpnd:$rd); 81292915Sdim dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp); 82292915Sdim string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $bp"); 83292915Sdim list<dag> Pattern = []; 84292915Sdim} 85292915Sdim 86292915Sdimclass DALIGN_MMR6_DESC : DALIGN_DESC_BASE<"dalign", GPR64Opnd, uimm3>; 87292915Sdim 88292915Sdimclass DDIV_MM64R6_DESC : ArithLogicR<"ddiv", GPR32Opnd>; 89292915Sdimclass DMOD_MM64R6_DESC : ArithLogicR<"dmod", GPR32Opnd>; 90292915Sdimclass DDIVU_MM64R6_DESC : ArithLogicR<"ddivu", GPR32Opnd>; 91292915Sdimclass DMODU_MM64R6_DESC : ArithLogicR<"dmodu", GPR32Opnd>; 92292915Sdim 93292915Sdim//===----------------------------------------------------------------------===// 94292915Sdim// 95292915Sdim// Instruction Definitions 96292915Sdim// 97292915Sdim//===----------------------------------------------------------------------===// 98292915Sdim 99292915Sdimlet DecoderNamespace = "MicroMipsR6" in { 100292915Sdim def DAUI_MM64R6 : StdMMR6Rel, DAUI_MMR6_DESC, DAUI_MMR6_ENC, ISA_MICROMIPS64R6; 101292915Sdim def DAHI_MM64R6 : StdMMR6Rel, DAHI_MMR6_DESC, DAHI_MMR6_ENC, ISA_MICROMIPS64R6; 102292915Sdim def DATI_MM64R6 : StdMMR6Rel, DATI_MMR6_DESC, DATI_MMR6_ENC, ISA_MICROMIPS64R6; 103292915Sdim def DEXT_MM64R6 : StdMMR6Rel, DEXT_MMR6_DESC, DEXT_MMR6_ENC, 104292915Sdim ISA_MICROMIPS64R6; 105292915Sdim def DEXTM_MM64R6 : StdMMR6Rel, DEXTM_MMR6_DESC, DEXTM_MMR6_ENC, 106292915Sdim ISA_MICROMIPS64R6; 107292915Sdim def DEXTU_MM64R6 : StdMMR6Rel, DEXTU_MMR6_DESC, DEXTU_MMR6_ENC, 108292915Sdim ISA_MICROMIPS64R6; 109292915Sdim def DALIGN_MM64R6 : StdMMR6Rel, DALIGN_MMR6_DESC, DALIGN_MMR6_ENC, 110292915Sdim ISA_MICROMIPS64R6; 111292915Sdim def DDIV_MM64R6 : R6MMR6Rel, DDIV_MM64R6_DESC, DDIV_MM64R6_ENC, 112292915Sdim ISA_MICROMIPS64R6; 113292915Sdim def DMOD_MM64R6 : R6MMR6Rel, DMOD_MM64R6_DESC, DMOD_MM64R6_ENC, 114292915Sdim ISA_MICROMIPS64R6; 115292915Sdim def DDIVU_MM64R6 : R6MMR6Rel, DDIVU_MM64R6_DESC, DDIVU_MM64R6_ENC, 116292915Sdim ISA_MICROMIPS64R6; 117292915Sdim def DMODU_MM64R6 : R6MMR6Rel, DMODU_MM64R6_DESC, DMODU_MM64R6_ENC, 118292915Sdim ISA_MICROMIPS64R6; 119292915Sdim} 120