1//===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10/// \file 11/// \brief Provides AMDGPU specific target descriptions. 12// 13//===----------------------------------------------------------------------===// 14// 15 16#ifndef LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H 17#define LLVM_LIB_TARGET_R600_MCTARGETDESC_AMDGPUMCTARGETDESC_H 18 19#include "llvm/Support/DataTypes.h" 20#include "llvm/ADT/StringRef.h" 21 22namespace llvm { 23class MCAsmBackend; 24class MCCodeEmitter; 25class MCContext; 26class MCInstrInfo; 27class MCObjectWriter; 28class MCRegisterInfo; 29class MCSubtargetInfo; 30class Target; 31class Triple; 32class raw_pwrite_stream; 33class raw_ostream; 34 35extern Target TheAMDGPUTarget; 36extern Target TheGCNTarget; 37 38MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, 39 const MCRegisterInfo &MRI, 40 MCContext &Ctx); 41 42MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, 43 const MCRegisterInfo &MRI, 44 MCContext &Ctx); 45 46MCAsmBackend *createAMDGPUAsmBackend(const Target &T, const MCRegisterInfo &MRI, 47 const Triple &TT, StringRef CPU); 48 49MCObjectWriter *createAMDGPUELFObjectWriter(bool Is64Bit, 50 raw_pwrite_stream &OS); 51} // End llvm namespace 52 53#define GET_REGINFO_ENUM 54#include "AMDGPUGenRegisterInfo.inc" 55 56#define GET_INSTRINFO_ENUM 57#include "AMDGPUGenInstrInfo.inc" 58 59#define GET_SUBTARGETINFO_ENUM 60#include "AMDGPUGenSubtargetInfo.inc" 61 62#endif 63