1//===--------------------- AMDGPUFrameLowering.h ----------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief Interface to describe a layout of a stack frame on an AMDGPU target.
12//
13//===----------------------------------------------------------------------===//
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUFRAMELOWERING_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUFRAMELOWERING_H
16
17#include "llvm/Target/TargetFrameLowering.h"
18
19namespace llvm {
20
21/// \brief Information about the stack frame layout on the AMDGPU targets.
22///
23/// It holds the direction of the stack growth, the known stack alignment on
24/// entry to each function, and the offset to the locals area.
25/// See TargetFrameInfo for more comments.
26class AMDGPUFrameLowering : public TargetFrameLowering {
27public:
28  AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
29                      unsigned TransAl = 1);
30  virtual ~AMDGPUFrameLowering();
31
32  /// \returns The number of 32-bit sub-registers that are used when storing
33  /// values to the stack.
34  unsigned getStackWidth(const MachineFunction &MF) const;
35  int getFrameIndexReference(const MachineFunction &MF, int FI,
36                             unsigned &FrameReg) const override;
37  const SpillSlot *
38    getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
39  void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
40  void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
41  bool hasFP(const MachineFunction &MF) const override;
42};
43} // namespace llvm
44#endif
45