TargetParser.cpp revision 283625
1283625Sdim//===-- TargetParser - Parser for target features ---------------*- C++ -*-===// 2283625Sdim// 3283625Sdim// The LLVM Compiler Infrastructure 4283625Sdim// 5283625Sdim// This file is distributed under the University of Illinois Open Source 6283625Sdim// License. See LICENSE.TXT for details. 7283625Sdim// 8283625Sdim//===----------------------------------------------------------------------===// 9283625Sdim// 10283625Sdim// This file implements a target parser to recognise hardware features such as 11283625Sdim// FPU/CPU/ARCH names as well as specific support such as HDIV, etc. 12283625Sdim// 13283625Sdim//===----------------------------------------------------------------------===// 14283625Sdim 15283625Sdim#include "llvm/Support/ARMBuildAttributes.h" 16283625Sdim#include "llvm/Support/TargetParser.h" 17283625Sdim#include "llvm/ADT/StringExtras.h" 18283625Sdim#include "llvm/ADT/StringSwitch.h" 19283625Sdim#include <cctype> 20283625Sdim 21283625Sdimusing namespace llvm; 22283625Sdim 23283625Sdimnamespace { 24283625Sdim 25283625Sdim// List of canonical FPU names (use getFPUSynonym) 26283625Sdim// FIXME: TableGen this. 27283625Sdimstruct { 28283625Sdim const char * Name; 29283625Sdim ARM::FPUKind ID; 30283625Sdim} FPUNames[] = { 31283625Sdim { "invalid", ARM::FK_INVALID }, 32283625Sdim { "vfp", ARM::FK_VFP }, 33283625Sdim { "vfpv2", ARM::FK_VFPV2 }, 34283625Sdim { "vfpv3", ARM::FK_VFPV3 }, 35283625Sdim { "vfpv3-d16", ARM::FK_VFPV3_D16 }, 36283625Sdim { "vfpv4", ARM::FK_VFPV4 }, 37283625Sdim { "vfpv4-d16", ARM::FK_VFPV4_D16 }, 38283625Sdim { "fpv5-d16", ARM::FK_FPV5_D16 }, 39283625Sdim { "fp-armv8", ARM::FK_FP_ARMV8 }, 40283625Sdim { "neon", ARM::FK_NEON }, 41283625Sdim { "neon-vfpv4", ARM::FK_NEON_VFPV4 }, 42283625Sdim { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8 }, 43283625Sdim { "crypto-neon-fp-armv8", ARM::FK_CRYPTO_NEON_FP_ARMV8 }, 44283625Sdim { "softvfp", ARM::FK_SOFTVFP } 45283625Sdim}; 46283625Sdim// List of canonical arch names (use getArchSynonym) 47283625Sdim// FIXME: TableGen this. 48283625Sdimstruct { 49283625Sdim const char *Name; 50283625Sdim ARM::ArchKind ID; 51283625Sdim const char *DefaultCPU; 52283625Sdim ARMBuildAttrs::CPUArch DefaultArch; 53283625Sdim} ARCHNames[] = { 54283625Sdim { "invalid", ARM::AK_INVALID, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 }, 55283625Sdim { "armv2", ARM::AK_ARMV2, "2", ARMBuildAttrs::CPUArch::v4 }, 56283625Sdim { "armv2a", ARM::AK_ARMV2A, "2A", ARMBuildAttrs::CPUArch::v4 }, 57283625Sdim { "armv3", ARM::AK_ARMV3, "3", ARMBuildAttrs::CPUArch::v4 }, 58283625Sdim { "armv3m", ARM::AK_ARMV3M, "3M", ARMBuildAttrs::CPUArch::v4 }, 59283625Sdim { "armv4", ARM::AK_ARMV4, "4", ARMBuildAttrs::CPUArch::v4 }, 60283625Sdim { "armv4t", ARM::AK_ARMV4T, "4T", ARMBuildAttrs::CPUArch::v4T }, 61283625Sdim { "armv5", ARM::AK_ARMV5, "5", ARMBuildAttrs::CPUArch::v5T }, 62283625Sdim { "armv5t", ARM::AK_ARMV5T, "5T", ARMBuildAttrs::CPUArch::v5T }, 63283625Sdim { "armv5te", ARM::AK_ARMV5TE, "5TE", ARMBuildAttrs::CPUArch::v5TE }, 64283625Sdim { "armv6", ARM::AK_ARMV6, "6", ARMBuildAttrs::CPUArch::v6 }, 65283625Sdim { "armv6j", ARM::AK_ARMV6J, "6J", ARMBuildAttrs::CPUArch::v6 }, 66283625Sdim { "armv6k", ARM::AK_ARMV6K, "6K", ARMBuildAttrs::CPUArch::v6K }, 67283625Sdim { "armv6t2", ARM::AK_ARMV6T2, "6T2", ARMBuildAttrs::CPUArch::v6T2 }, 68283625Sdim { "armv6z", ARM::AK_ARMV6Z, "6Z", ARMBuildAttrs::CPUArch::v6KZ }, 69283625Sdim { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", ARMBuildAttrs::CPUArch::v6KZ }, 70283625Sdim { "armv6-m", ARM::AK_ARMV6M, "6-M", ARMBuildAttrs::CPUArch::v6_M }, 71283625Sdim { "armv7", ARM::AK_ARMV7, "7", ARMBuildAttrs::CPUArch::v7 }, 72283625Sdim { "armv7-a", ARM::AK_ARMV7A, "7-A", ARMBuildAttrs::CPUArch::v7 }, 73283625Sdim { "armv7-r", ARM::AK_ARMV7R, "7-R", ARMBuildAttrs::CPUArch::v7 }, 74283625Sdim { "armv7-m", ARM::AK_ARMV7M, "7-M", ARMBuildAttrs::CPUArch::v7 }, 75283625Sdim { "armv8-a", ARM::AK_ARMV8A, "8-A", ARMBuildAttrs::CPUArch::v8 }, 76283625Sdim { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", ARMBuildAttrs::CPUArch::v8 }, 77283625Sdim // Non-standard Arch names. 78283625Sdim { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", ARMBuildAttrs::CPUArch::v5TE }, 79283625Sdim { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", ARMBuildAttrs::CPUArch::v5TE }, 80283625Sdim { "xscale", ARM::AK_XSCALE, "xscale", ARMBuildAttrs::CPUArch::v5TE }, 81283625Sdim { "armv5e", ARM::AK_ARMV5E, "5E", ARMBuildAttrs::CPUArch::v5TE }, 82283625Sdim { "armv5tej", ARM::AK_ARMV5TEJ, "5TE", ARMBuildAttrs::CPUArch::v5TE }, 83283625Sdim { "armv6sm", ARM::AK_ARMV6SM, "6-M", ARMBuildAttrs::CPUArch::v6_M }, 84283625Sdim { "armv6hl", ARM::AK_ARMV6HL, "6-M", ARMBuildAttrs::CPUArch::v6_M }, 85283625Sdim { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", ARMBuildAttrs::CPUArch::v7E_M }, 86283625Sdim { "armv7l", ARM::AK_ARMV7L, "7-L", ARMBuildAttrs::CPUArch::v7 }, 87283625Sdim { "armv7hl", ARM::AK_ARMV7HL, "7H-L", ARMBuildAttrs::CPUArch::v7 }, 88283625Sdim { "armv7s", ARM::AK_ARMV7S, "7-S", ARMBuildAttrs::CPUArch::v7 } 89283625Sdim}; 90283625Sdim// List of canonical ARCH names (use getARCHSynonym) 91283625Sdim// FIXME: TableGen this. 92283625Sdimstruct { 93283625Sdim const char *Name; 94283625Sdim ARM::ArchExtKind ID; 95283625Sdim} ARCHExtNames[] = { 96283625Sdim { "invalid", ARM::AEK_INVALID }, 97283625Sdim { "crc", ARM::AEK_CRC }, 98283625Sdim { "crypto", ARM::AEK_CRYPTO }, 99283625Sdim { "fp", ARM::AEK_FP }, 100283625Sdim { "idiv", ARM::AEK_HWDIV }, 101283625Sdim { "mp", ARM::AEK_MP }, 102283625Sdim { "sec", ARM::AEK_SEC }, 103283625Sdim { "virt", ARM::AEK_VIRT } 104283625Sdim}; 105283625Sdim// List of CPU names and their arches. 106283625Sdim// The same CPU can have multiple arches and can be default on multiple arches. 107283625Sdim// When finding the Arch for a CPU, first-found prevails. Sort them accordingly. 108283625Sdim// FIXME: TableGen this. 109283625Sdimstruct { 110283625Sdim const char *Name; 111283625Sdim ARM::ArchKind ArchID; 112283625Sdim bool Default; 113283625Sdim} CPUNames[] = { 114283625Sdim { "arm2", ARM::AK_ARMV2, true }, 115283625Sdim { "arm6", ARM::AK_ARMV3, true }, 116283625Sdim { "arm7m", ARM::AK_ARMV3M, true }, 117283625Sdim { "strongarm", ARM::AK_ARMV4, true }, 118283625Sdim { "arm7tdmi", ARM::AK_ARMV4T, true }, 119283625Sdim { "arm7tdmi-s", ARM::AK_ARMV4T, false }, 120283625Sdim { "arm710t", ARM::AK_ARMV4T, false }, 121283625Sdim { "arm720t", ARM::AK_ARMV4T, false }, 122283625Sdim { "arm9", ARM::AK_ARMV4T, false }, 123283625Sdim { "arm9tdmi", ARM::AK_ARMV4T, false }, 124283625Sdim { "arm920", ARM::AK_ARMV4T, false }, 125283625Sdim { "arm920t", ARM::AK_ARMV4T, false }, 126283625Sdim { "arm922t", ARM::AK_ARMV4T, false }, 127283625Sdim { "arm9312", ARM::AK_ARMV4T, false }, 128283625Sdim { "arm940t", ARM::AK_ARMV4T, false }, 129283625Sdim { "ep9312", ARM::AK_ARMV4T, false }, 130283625Sdim { "arm10tdmi", ARM::AK_ARMV5, true }, 131283625Sdim { "arm10tdmi", ARM::AK_ARMV5T, true }, 132283625Sdim { "arm1020t", ARM::AK_ARMV5T, false }, 133283625Sdim { "xscale", ARM::AK_XSCALE, true }, 134283625Sdim { "xscale", ARM::AK_ARMV5TE, false }, 135283625Sdim { "arm9e", ARM::AK_ARMV5TE, false }, 136283625Sdim { "arm926ej-s", ARM::AK_ARMV5TE, false }, 137283625Sdim { "arm946ej-s", ARM::AK_ARMV5TE, false }, 138283625Sdim { "arm966e-s", ARM::AK_ARMV5TE, false }, 139283625Sdim { "arm968e-s", ARM::AK_ARMV5TE, false }, 140283625Sdim { "arm1020e", ARM::AK_ARMV5TE, false }, 141283625Sdim { "arm1022e", ARM::AK_ARMV5TE, true }, 142283625Sdim { "iwmmxt", ARM::AK_ARMV5TE, false }, 143283625Sdim { "iwmmxt", ARM::AK_IWMMXT, true }, 144283625Sdim { "arm1136jf-s", ARM::AK_ARMV6, true }, 145283625Sdim { "arm1136j-s", ARM::AK_ARMV6J, true }, 146283625Sdim { "arm1136jz-s", ARM::AK_ARMV6J, false }, 147283625Sdim { "arm1176j-s", ARM::AK_ARMV6K, false }, 148283625Sdim { "mpcore", ARM::AK_ARMV6K, false }, 149283625Sdim { "mpcorenovfp", ARM::AK_ARMV6K, false }, 150283625Sdim { "arm1176jzf-s", ARM::AK_ARMV6K, true }, 151283625Sdim { "arm1176jzf-s", ARM::AK_ARMV6Z, true }, 152283625Sdim { "arm1176jzf-s", ARM::AK_ARMV6ZK, true }, 153283625Sdim { "arm1156t2-s", ARM::AK_ARMV6T2, true }, 154283625Sdim { "arm1156t2f-s", ARM::AK_ARMV6T2, false }, 155283625Sdim { "cortex-m0", ARM::AK_ARMV6M, true }, 156283625Sdim { "cortex-m0plus", ARM::AK_ARMV6M, false }, 157283625Sdim { "cortex-m1", ARM::AK_ARMV6M, false }, 158283625Sdim { "sc000", ARM::AK_ARMV6M, false }, 159283625Sdim { "cortex-a8", ARM::AK_ARMV7, true }, 160283625Sdim { "cortex-a5", ARM::AK_ARMV7A, false }, 161283625Sdim { "cortex-a7", ARM::AK_ARMV7A, false }, 162283625Sdim { "cortex-a8", ARM::AK_ARMV7A, true }, 163283625Sdim { "cortex-a9", ARM::AK_ARMV7A, false }, 164283625Sdim { "cortex-a12", ARM::AK_ARMV7A, false }, 165283625Sdim { "cortex-a15", ARM::AK_ARMV7A, false }, 166283625Sdim { "cortex-a17", ARM::AK_ARMV7A, false }, 167283625Sdim { "krait", ARM::AK_ARMV7A, false }, 168283625Sdim { "cortex-r4", ARM::AK_ARMV7R, true }, 169283625Sdim { "cortex-r4f", ARM::AK_ARMV7R, false }, 170283625Sdim { "cortex-r5", ARM::AK_ARMV7R, false }, 171283625Sdim { "cortex-r7", ARM::AK_ARMV7R, false }, 172283625Sdim { "sc300", ARM::AK_ARMV7M, false }, 173283625Sdim { "cortex-m3", ARM::AK_ARMV7M, true }, 174283625Sdim { "cortex-m4", ARM::AK_ARMV7M, false }, 175283625Sdim { "cortex-m7", ARM::AK_ARMV7M, false }, 176283625Sdim { "cortex-a53", ARM::AK_ARMV8A, true }, 177283625Sdim { "cortex-a57", ARM::AK_ARMV8A, false }, 178283625Sdim { "cortex-a72", ARM::AK_ARMV8A, false }, 179283625Sdim { "cyclone", ARM::AK_ARMV8A, false }, 180283625Sdim { "generic", ARM::AK_ARMV8_1A, true }, 181283625Sdim // Non-standard Arch names. 182283625Sdim { "arm1022e", ARM::AK_ARMV5E, true }, 183283625Sdim { "arm926ej-s", ARM::AK_ARMV5TEJ, true }, 184283625Sdim { "cortex-m0", ARM::AK_ARMV6SM, true }, 185283625Sdim { "arm1176jzf-s", ARM::AK_ARMV6HL, true }, 186283625Sdim { "cortex-a8", ARM::AK_ARMV7L, true }, 187283625Sdim { "cortex-a8", ARM::AK_ARMV7HL, true }, 188283625Sdim { "cortex-m4", ARM::AK_ARMV7EM, true }, 189283625Sdim { "swift", ARM::AK_ARMV7S, true }, 190283625Sdim // Invalid CPU 191283625Sdim { "invalid", ARM::AK_INVALID, true } 192283625Sdim}; 193283625Sdim 194283625Sdim} // namespace 195283625Sdim 196283625Sdimnamespace llvm { 197283625Sdim 198283625Sdim// ======================================================= // 199283625Sdim// Information by ID 200283625Sdim// ======================================================= // 201283625Sdim 202283625Sdimconst char *ARMTargetParser::getFPUName(unsigned FPUKind) { 203283625Sdim if (FPUKind >= ARM::FK_LAST) 204283625Sdim return nullptr; 205283625Sdim return FPUNames[FPUKind].Name; 206283625Sdim} 207283625Sdim 208283625Sdimconst char *ARMTargetParser::getArchName(unsigned ArchKind) { 209283625Sdim if (ArchKind >= ARM::AK_LAST) 210283625Sdim return nullptr; 211283625Sdim return ARCHNames[ArchKind].Name; 212283625Sdim} 213283625Sdim 214283625Sdimconst char *ARMTargetParser::getArchDefaultCPUName(unsigned ArchKind) { 215283625Sdim if (ArchKind >= ARM::AK_LAST) 216283625Sdim return nullptr; 217283625Sdim return ARCHNames[ArchKind].DefaultCPU; 218283625Sdim} 219283625Sdim 220283625Sdimunsigned ARMTargetParser::getArchDefaultCPUArch(unsigned ArchKind) { 221283625Sdim if (ArchKind >= ARM::AK_LAST) 222283625Sdim return ARMBuildAttrs::CPUArch::Pre_v4; 223283625Sdim return ARCHNames[ArchKind].DefaultArch; 224283625Sdim} 225283625Sdim 226283625Sdimconst char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) { 227283625Sdim if (ArchExtKind >= ARM::AEK_LAST) 228283625Sdim return nullptr; 229283625Sdim return ARCHExtNames[ArchExtKind].Name; 230283625Sdim} 231283625Sdim 232283625Sdimconst char *ARMTargetParser::getDefaultCPU(StringRef Arch) { 233283625Sdim unsigned AK = parseArch(Arch); 234283625Sdim if (AK == ARM::AK_INVALID) 235283625Sdim return nullptr; 236283625Sdim 237283625Sdim // Look for multiple AKs to find the default for pair AK+Name. 238283625Sdim for (const auto CPU : CPUNames) { 239283625Sdim if (CPU.ArchID == AK && CPU.Default) 240283625Sdim return CPU.Name; 241283625Sdim } 242283625Sdim return nullptr; 243283625Sdim} 244283625Sdim 245283625Sdim// ======================================================= // 246283625Sdim// Parsers 247283625Sdim// ======================================================= // 248283625Sdim 249283625SdimStringRef ARMTargetParser::getFPUSynonym(StringRef FPU) { 250283625Sdim return StringSwitch<StringRef>(FPU) 251283625Sdim .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported 252283625Sdim .Case("vfp2", "vfpv2") 253283625Sdim .Case("vfp3", "vfpv3") 254283625Sdim .Case("vfp4", "vfpv4") 255283625Sdim .Case("vfp3-d16", "vfpv3-d16") 256283625Sdim .Case("vfp4-d16", "vfpv4-d16") 257283625Sdim // FIXME: sp-16 is NOT the same as d16 258283625Sdim .Cases("fp4-sp-d16", "fpv4-sp-d16", "vfpv4-d16") 259283625Sdim .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") 260283625Sdim .Cases("fp5-sp-d16", "fpv5-sp-d16", "fpv5-d16") 261283625Sdim .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") 262283625Sdim // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. 263283625Sdim .Case("neon-vfpv3", "neon") 264283625Sdim .Default(FPU); 265283625Sdim} 266283625Sdim 267283625SdimStringRef ARMTargetParser::getArchSynonym(StringRef Arch) { 268283625Sdim return StringSwitch<StringRef>(Arch) 269283625Sdim .Cases("armv6m", "v6m", "armv6-m") 270283625Sdim .Cases("armv7a", "v7a", "armv7-a") 271283625Sdim .Cases("armv7r", "v7r", "armv7-r") 272283625Sdim .Cases("armv7m", "v7m", "armv7-m") 273283625Sdim .Cases("armv7em", "v7em", "armv7e-m") 274283625Sdim .Cases("armv8", "v8", "armv8-a") 275283625Sdim .Cases("armv8a", "v8a", "armv8-a") 276283625Sdim .Cases("armv8.1a", "v8.1a", "armv8.1-a") 277283625Sdim .Cases("aarch64", "arm64", "armv8-a") 278283625Sdim .Default(Arch); 279283625Sdim} 280283625Sdim 281283625Sdim// MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but 282283625Sdim// (iwmmxt|xscale)(eb)? is also permitted. If the former, return 283283625Sdim// "v.+", if the latter, return unmodified string, minus 'eb'. 284283625Sdim// If invalid, return empty string. 285283625SdimStringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) { 286283625Sdim size_t offset = StringRef::npos; 287283625Sdim StringRef A = Arch; 288283625Sdim StringRef Error = ""; 289283625Sdim 290283625Sdim // Begins with "arm" / "thumb", move past it. 291283625Sdim if (A.startswith("arm64")) 292283625Sdim offset = 5; 293283625Sdim else if (A.startswith("arm")) 294283625Sdim offset = 3; 295283625Sdim else if (A.startswith("thumb")) 296283625Sdim offset = 5; 297283625Sdim else if (A.startswith("aarch64")) { 298283625Sdim offset = 7; 299283625Sdim // AArch64 uses "_be", not "eb" suffix. 300283625Sdim if (A.find("eb") != StringRef::npos) 301283625Sdim return Error; 302283625Sdim if (A.substr(offset,3) == "_be") 303283625Sdim offset += 3; 304283625Sdim } 305283625Sdim 306283625Sdim // Ex. "armebv7", move past the "eb". 307283625Sdim if (offset != StringRef::npos && A.substr(offset, 2) == "eb") 308283625Sdim offset += 2; 309283625Sdim // Or, if it ends with eb ("armv7eb"), chop it off. 310283625Sdim else if (A.endswith("eb")) 311283625Sdim A = A.substr(0, A.size() - 2); 312283625Sdim // Trim the head 313283625Sdim if (offset != StringRef::npos) 314283625Sdim A = A.substr(offset); 315283625Sdim 316283625Sdim // Empty string means offset reached the end, which means it's valid. 317283625Sdim if (A.empty()) 318283625Sdim return Arch; 319283625Sdim 320283625Sdim // Only match non-marketing names 321283625Sdim if (offset != StringRef::npos) { 322283625Sdim // Must start with 'vN'. 323283625Sdim if (A[0] != 'v' || !std::isdigit(A[1])) 324283625Sdim return Error; 325283625Sdim // Can't have an extra 'eb'. 326283625Sdim if (A.find("eb") != StringRef::npos) 327283625Sdim return Error; 328283625Sdim } 329283625Sdim 330283625Sdim // Arch will either be a 'v' name (v7a) or a marketing name (xscale). 331283625Sdim return A; 332283625Sdim} 333283625Sdim 334283625Sdimunsigned ARMTargetParser::parseFPU(StringRef FPU) { 335283625Sdim StringRef Syn = getFPUSynonym(FPU); 336283625Sdim for (const auto F : FPUNames) { 337283625Sdim if (Syn == F.Name) 338283625Sdim return F.ID; 339283625Sdim } 340283625Sdim return ARM::FK_INVALID; 341283625Sdim} 342283625Sdim 343283625Sdim// Allows partial match, ex. "v7a" matches "armv7a". 344283625Sdimunsigned ARMTargetParser::parseArch(StringRef Arch) { 345283625Sdim StringRef Syn = getArchSynonym(Arch); 346283625Sdim for (const auto A : ARCHNames) { 347283625Sdim if (StringRef(A.Name).endswith(Syn)) 348283625Sdim return A.ID; 349283625Sdim } 350283625Sdim return ARM::AK_INVALID; 351283625Sdim} 352283625Sdim 353283625Sdimunsigned ARMTargetParser::parseArchExt(StringRef ArchExt) { 354283625Sdim for (const auto A : ARCHExtNames) { 355283625Sdim if (ArchExt == A.Name) 356283625Sdim return A.ID; 357283625Sdim } 358283625Sdim return ARM::AEK_INVALID; 359283625Sdim} 360283625Sdim 361283625Sdimunsigned ARMTargetParser::parseCPUArch(StringRef CPU) { 362283625Sdim for (const auto C : CPUNames) { 363283625Sdim if (CPU == C.Name) 364283625Sdim return C.ArchID; 365283625Sdim } 366283625Sdim return ARM::AK_INVALID; 367283625Sdim} 368283625Sdim 369283625Sdim// ARM, Thumb, AArch64 370283625Sdimunsigned ARMTargetParser::parseArchISA(StringRef Arch) { 371283625Sdim return StringSwitch<unsigned>(Arch) 372283625Sdim .StartsWith("aarch64", ARM::IK_AARCH64) 373283625Sdim .StartsWith("arm64", ARM::IK_AARCH64) 374283625Sdim .StartsWith("thumb", ARM::IK_THUMB) 375283625Sdim .StartsWith("arm", ARM::IK_ARM) 376283625Sdim .Default(ARM::EK_INVALID); 377283625Sdim} 378283625Sdim 379283625Sdim// Little/Big endian 380283625Sdimunsigned ARMTargetParser::parseArchEndian(StringRef Arch) { 381283625Sdim if (Arch.startswith("armeb") || 382283625Sdim Arch.startswith("thumbeb") || 383283625Sdim Arch.startswith("aarch64_be")) 384283625Sdim return ARM::EK_BIG; 385283625Sdim 386283625Sdim if (Arch.startswith("arm") || Arch.startswith("thumb")) { 387283625Sdim if (Arch.endswith("eb")) 388283625Sdim return ARM::EK_BIG; 389283625Sdim else 390283625Sdim return ARM::EK_LITTLE; 391283625Sdim } 392283625Sdim 393283625Sdim if (Arch.startswith("aarch64")) 394283625Sdim return ARM::EK_LITTLE; 395283625Sdim 396283625Sdim return ARM::EK_INVALID; 397283625Sdim} 398283625Sdim 399283625Sdim// Profile A/R/M 400283625Sdimunsigned ARMTargetParser::parseArchProfile(StringRef Arch) { 401283625Sdim Arch = getCanonicalArchName(Arch); 402283625Sdim switch(parseArch(Arch)) { 403283625Sdim case ARM::AK_ARMV6M: 404283625Sdim case ARM::AK_ARMV7M: 405283625Sdim case ARM::AK_ARMV6SM: 406283625Sdim case ARM::AK_ARMV7EM: 407283625Sdim return ARM::PK_M; 408283625Sdim case ARM::AK_ARMV7R: 409283625Sdim return ARM::PK_R; 410283625Sdim case ARM::AK_ARMV7: 411283625Sdim case ARM::AK_ARMV7A: 412283625Sdim case ARM::AK_ARMV8A: 413283625Sdim case ARM::AK_ARMV8_1A: 414283625Sdim return ARM::PK_A; 415283625Sdim } 416283625Sdim return ARM::PK_INVALID; 417283625Sdim} 418283625Sdim 419283625Sdim// Version number (ex. v7 = 7). 420283625Sdimunsigned ARMTargetParser::parseArchVersion(StringRef Arch) { 421283625Sdim Arch = getCanonicalArchName(Arch); 422283625Sdim switch(parseArch(Arch)) { 423283625Sdim case ARM::AK_ARMV2: 424283625Sdim case ARM::AK_ARMV2A: 425283625Sdim return 2; 426283625Sdim case ARM::AK_ARMV3: 427283625Sdim case ARM::AK_ARMV3M: 428283625Sdim return 3; 429283625Sdim case ARM::AK_ARMV4: 430283625Sdim case ARM::AK_ARMV4T: 431283625Sdim return 4; 432283625Sdim case ARM::AK_ARMV5: 433283625Sdim case ARM::AK_ARMV5T: 434283625Sdim case ARM::AK_ARMV5TE: 435283625Sdim case ARM::AK_IWMMXT: 436283625Sdim case ARM::AK_IWMMXT2: 437283625Sdim case ARM::AK_XSCALE: 438283625Sdim case ARM::AK_ARMV5E: 439283625Sdim case ARM::AK_ARMV5TEJ: 440283625Sdim return 5; 441283625Sdim case ARM::AK_ARMV6: 442283625Sdim case ARM::AK_ARMV6J: 443283625Sdim case ARM::AK_ARMV6K: 444283625Sdim case ARM::AK_ARMV6T2: 445283625Sdim case ARM::AK_ARMV6Z: 446283625Sdim case ARM::AK_ARMV6ZK: 447283625Sdim case ARM::AK_ARMV6M: 448283625Sdim case ARM::AK_ARMV6SM: 449283625Sdim case ARM::AK_ARMV6HL: 450283625Sdim return 6; 451283625Sdim case ARM::AK_ARMV7: 452283625Sdim case ARM::AK_ARMV7A: 453283625Sdim case ARM::AK_ARMV7R: 454283625Sdim case ARM::AK_ARMV7M: 455283625Sdim case ARM::AK_ARMV7L: 456283625Sdim case ARM::AK_ARMV7HL: 457283625Sdim case ARM::AK_ARMV7S: 458283625Sdim case ARM::AK_ARMV7EM: 459283625Sdim return 7; 460283625Sdim case ARM::AK_ARMV8A: 461283625Sdim case ARM::AK_ARMV8_1A: 462283625Sdim return 8; 463283625Sdim } 464283625Sdim return 0; 465283625Sdim} 466283625Sdim 467283625Sdim} // namespace llvm 468