1//=- llvm/CodeGen/DFAPacketizer.cpp - DFA Packetizer for VLIW -*- C++ -*-=====//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9// This class implements a deterministic finite automaton (DFA) based
10// packetizing mechanism for VLIW architectures. It provides APIs to
11// determine whether there exists a legal mapping of instructions to
12// functional unit assignments in a packet. The DFA is auto-generated from
13// the target's Schedule.td file.
14//
15// A DFA consists of 3 major elements: states, inputs, and transitions. For
16// the packetizing mechanism, the input is the set of instruction classes for
17// a target. The state models all possible combinations of functional unit
18// consumption for a given set of instructions in a packet. A transition
19// models the addition of an instruction to a packet. In the DFA constructed
20// by this class, if an instruction can be added to a packet, then a valid
21// transition exists from the corresponding state. Invalid transitions
22// indicate that the instruction cannot be added to the current packet.
23//
24//===----------------------------------------------------------------------===//
25
26#include "llvm/CodeGen/DFAPacketizer.h"
27#include "llvm/CodeGen/MachineInstr.h"
28#include "llvm/CodeGen/MachineInstrBundle.h"
29#include "llvm/CodeGen/ScheduleDAGInstrs.h"
30#include "llvm/MC/MCInstrItineraries.h"
31#include "llvm/Target/TargetInstrInfo.h"
32using namespace llvm;
33
34// --------------------------------------------------------------------
35// Definitions shared between DFAPacketizer.cpp and DFAPacketizerEmitter.cpp
36
37namespace {
38  DFAInput addDFAFuncUnits(DFAInput Inp, unsigned FuncUnits) {
39    return (Inp << DFA_MAX_RESOURCES) | FuncUnits;
40  }
41
42  /// Return the DFAInput for an instruction class input vector.
43  /// This function is used in both DFAPacketizer.cpp and in
44  /// DFAPacketizerEmitter.cpp.
45  DFAInput getDFAInsnInput(const std::vector<unsigned> &InsnClass) {
46    DFAInput InsnInput = 0;
47    assert ((InsnClass.size() <= DFA_MAX_RESTERMS) &&
48            "Exceeded maximum number of DFA terms");
49    for (auto U : InsnClass)
50      InsnInput = addDFAFuncUnits(InsnInput, U);
51    return InsnInput;
52  }
53}
54// --------------------------------------------------------------------
55
56DFAPacketizer::DFAPacketizer(const InstrItineraryData *I,
57                             const DFAStateInput (*SIT)[2],
58                             const unsigned *SET):
59  InstrItins(I), CurrentState(0), DFAStateInputTable(SIT),
60  DFAStateEntryTable(SET) {
61  // Make sure DFA types are large enough for the number of terms & resources.
62  assert((DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) <= (8 * sizeof(DFAInput))
63        && "(DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) too big for DFAInput");
64  assert((DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) <= (8 * sizeof(DFAStateInput))
65        && "(DFA_MAX_RESTERMS * DFA_MAX_RESOURCES) too big for DFAStateInput");
66}
67
68
69//
70// ReadTable - Read the DFA transition table and update CachedTable.
71//
72// Format of the transition tables:
73// DFAStateInputTable[][2] = pairs of <Input, Transition> for all valid
74//                           transitions
75// DFAStateEntryTable[i] = Index of the first entry in DFAStateInputTable
76//                         for the ith state
77//
78void DFAPacketizer::ReadTable(unsigned int state) {
79  unsigned ThisState = DFAStateEntryTable[state];
80  unsigned NextStateInTable = DFAStateEntryTable[state+1];
81  // Early exit in case CachedTable has already contains this
82  // state's transitions.
83  if (CachedTable.count(UnsignPair(state,
84                                   DFAStateInputTable[ThisState][0])))
85    return;
86
87  for (unsigned i = ThisState; i < NextStateInTable; i++)
88    CachedTable[UnsignPair(state, DFAStateInputTable[i][0])] =
89      DFAStateInputTable[i][1];
90}
91
92//
93// getInsnInput - Return the DFAInput for an instruction class.
94//
95DFAInput DFAPacketizer::getInsnInput(unsigned InsnClass) {
96  // Note: this logic must match that in DFAPacketizerDefs.h for input vectors.
97  DFAInput InsnInput = 0;
98  unsigned i = 0;
99  for (const InstrStage *IS = InstrItins->beginStage(InsnClass),
100        *IE = InstrItins->endStage(InsnClass); IS != IE; ++IS, ++i) {
101    InsnInput = addDFAFuncUnits(InsnInput, IS->getUnits());
102    assert ((i < DFA_MAX_RESTERMS) && "Exceeded maximum number of DFA inputs");
103  }
104  return InsnInput;
105}
106
107// getInsnInput - Return the DFAInput for an instruction class input vector.
108DFAInput DFAPacketizer::getInsnInput(const std::vector<unsigned> &InsnClass) {
109  return getDFAInsnInput(InsnClass);
110}
111
112// canReserveResources - Check if the resources occupied by a MCInstrDesc
113// are available in the current state.
114bool DFAPacketizer::canReserveResources(const llvm::MCInstrDesc *MID) {
115  unsigned InsnClass = MID->getSchedClass();
116  DFAInput InsnInput = getInsnInput(InsnClass);
117  UnsignPair StateTrans = UnsignPair(CurrentState, InsnInput);
118  ReadTable(CurrentState);
119  return (CachedTable.count(StateTrans) != 0);
120}
121
122// reserveResources - Reserve the resources occupied by a MCInstrDesc and
123// change the current state to reflect that change.
124void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) {
125  unsigned InsnClass = MID->getSchedClass();
126  DFAInput InsnInput = getInsnInput(InsnClass);
127  UnsignPair StateTrans = UnsignPair(CurrentState, InsnInput);
128  ReadTable(CurrentState);
129  assert(CachedTable.count(StateTrans) != 0);
130  CurrentState = CachedTable[StateTrans];
131}
132
133
134// canReserveResources - Check if the resources occupied by a machine
135// instruction are available in the current state.
136bool DFAPacketizer::canReserveResources(llvm::MachineInstr *MI) {
137  const llvm::MCInstrDesc &MID = MI->getDesc();
138  return canReserveResources(&MID);
139}
140
141// reserveResources - Reserve the resources occupied by a machine
142// instruction and change the current state to reflect that change.
143void DFAPacketizer::reserveResources(llvm::MachineInstr *MI) {
144  const llvm::MCInstrDesc &MID = MI->getDesc();
145  reserveResources(&MID);
146}
147
148namespace llvm {
149// DefaultVLIWScheduler - This class extends ScheduleDAGInstrs and overrides
150// Schedule method to build the dependence graph.
151class DefaultVLIWScheduler : public ScheduleDAGInstrs {
152private:
153  AliasAnalysis *AA;
154public:
155  DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
156                       AliasAnalysis *AA);
157  // Schedule - Actual scheduling work.
158  void schedule() override;
159};
160}
161
162DefaultVLIWScheduler::DefaultVLIWScheduler(MachineFunction &MF,
163                                           MachineLoopInfo &MLI,
164                                           AliasAnalysis *AA)
165    : ScheduleDAGInstrs(MF, &MLI), AA(AA) {
166  CanHandleTerminators = true;
167}
168
169void DefaultVLIWScheduler::schedule() {
170  // Build the scheduling graph.
171  buildSchedGraph(AA);
172}
173
174// VLIWPacketizerList Ctor
175VLIWPacketizerList::VLIWPacketizerList(MachineFunction &MF,
176                                       MachineLoopInfo &MLI, AliasAnalysis *AA)
177    : MF(MF), AA(AA) {
178  TII = MF.getSubtarget().getInstrInfo();
179  ResourceTracker = TII->CreateTargetScheduleState(MF.getSubtarget());
180  VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, AA);
181}
182
183// VLIWPacketizerList Dtor
184VLIWPacketizerList::~VLIWPacketizerList() {
185  if (VLIWScheduler)
186    delete VLIWScheduler;
187
188  if (ResourceTracker)
189    delete ResourceTracker;
190}
191
192// endPacket - End the current packet, bundle packet instructions and reset
193// DFA state.
194void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB,
195                                         MachineInstr *MI) {
196  if (CurrentPacketMIs.size() > 1) {
197    MachineInstr *MIFirst = CurrentPacketMIs.front();
198    finalizeBundle(*MBB, MIFirst->getIterator(), MI->getIterator());
199  }
200  CurrentPacketMIs.clear();
201  ResourceTracker->clearResources();
202}
203
204// PacketizeMIs - Bundle machine instructions into packets.
205void VLIWPacketizerList::PacketizeMIs(MachineBasicBlock *MBB,
206                                      MachineBasicBlock::iterator BeginItr,
207                                      MachineBasicBlock::iterator EndItr) {
208  assert(VLIWScheduler && "VLIW Scheduler is not initialized!");
209  VLIWScheduler->startBlock(MBB);
210  VLIWScheduler->enterRegion(MBB, BeginItr, EndItr,
211                             std::distance(BeginItr, EndItr));
212  VLIWScheduler->schedule();
213
214  // Generate MI -> SU map.
215  MIToSUnit.clear();
216  for (unsigned i = 0, e = VLIWScheduler->SUnits.size(); i != e; ++i) {
217    SUnit *SU = &VLIWScheduler->SUnits[i];
218    MIToSUnit[SU->getInstr()] = SU;
219  }
220
221  // The main packetizer loop.
222  for (; BeginItr != EndItr; ++BeginItr) {
223    MachineInstr *MI = BeginItr;
224
225    this->initPacketizerState();
226
227    // End the current packet if needed.
228    if (this->isSoloInstruction(MI)) {
229      endPacket(MBB, MI);
230      continue;
231    }
232
233    // Ignore pseudo instructions.
234    if (this->ignorePseudoInstruction(MI, MBB))
235      continue;
236
237    SUnit *SUI = MIToSUnit[MI];
238    assert(SUI && "Missing SUnit Info!");
239
240    // Ask DFA if machine resource is available for MI.
241    bool ResourceAvail = ResourceTracker->canReserveResources(MI);
242    if (ResourceAvail && shouldAddToPacket(MI)) {
243      // Dependency check for MI with instructions in CurrentPacketMIs.
244      for (std::vector<MachineInstr*>::iterator VI = CurrentPacketMIs.begin(),
245           VE = CurrentPacketMIs.end(); VI != VE; ++VI) {
246        MachineInstr *MJ = *VI;
247        SUnit *SUJ = MIToSUnit[MJ];
248        assert(SUJ && "Missing SUnit Info!");
249
250        // Is it legal to packetize SUI and SUJ together.
251        if (!this->isLegalToPacketizeTogether(SUI, SUJ)) {
252          // Allow packetization if dependency can be pruned.
253          if (!this->isLegalToPruneDependencies(SUI, SUJ)) {
254            // End the packet if dependency cannot be pruned.
255            endPacket(MBB, MI);
256            break;
257          } // !isLegalToPruneDependencies.
258        } // !isLegalToPacketizeTogether.
259      } // For all instructions in CurrentPacketMIs.
260    } else {
261      // End the packet if resource is not available, or if the instruction
262      // shoud not be added to the current packet.
263      endPacket(MBB, MI);
264    }
265
266    // Add MI to the current packet.
267    BeginItr = this->addToPacket(MI);
268  } // For all instructions in BB.
269
270  // End any packet left behind.
271  endPacket(MBB, EndItr);
272  VLIWScheduler->exitRegion();
273  VLIWScheduler->finishBlock();
274}
275