1/* Xtensa configuration settings. 2 Copyright (C) 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. 3 Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2, or (at your option) 8 any later version. 9 10 This program is distributed in the hope that it will be useful, but 11 WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 18 19#ifndef XTENSA_CONFIG_H 20#define XTENSA_CONFIG_H 21 22/* The macros defined here match those with the same names in the Xtensa 23 compile-time HAL (Hardware Abstraction Layer). Please refer to the 24 Xtensa System Software Reference Manual for documentation of these 25 macros. */ 26 27#undef XCHAL_HAVE_BE 28#define XCHAL_HAVE_BE 1 29 30#undef XCHAL_HAVE_DENSITY 31#define XCHAL_HAVE_DENSITY 1 32 33#undef XCHAL_HAVE_CONST16 34#define XCHAL_HAVE_CONST16 0 35 36#undef XCHAL_HAVE_ABS 37#define XCHAL_HAVE_ABS 1 38 39#undef XCHAL_HAVE_ADDX 40#define XCHAL_HAVE_ADDX 1 41 42#undef XCHAL_HAVE_L32R 43#define XCHAL_HAVE_L32R 1 44 45#undef XSHAL_USE_ABSOLUTE_LITERALS 46#define XSHAL_USE_ABSOLUTE_LITERALS 0 47 48#undef XCHAL_HAVE_MAC16 49#define XCHAL_HAVE_MAC16 0 50 51#undef XCHAL_HAVE_MUL16 52#define XCHAL_HAVE_MUL16 0 53 54#undef XCHAL_HAVE_MUL32 55#define XCHAL_HAVE_MUL32 0 56 57#undef XCHAL_HAVE_MUL32_HIGH 58#define XCHAL_HAVE_MUL32_HIGH 0 59 60#undef XCHAL_HAVE_DIV32 61#define XCHAL_HAVE_DIV32 0 62 63#undef XCHAL_HAVE_NSA 64#define XCHAL_HAVE_NSA 1 65 66#undef XCHAL_HAVE_MINMAX 67#define XCHAL_HAVE_MINMAX 0 68 69#undef XCHAL_HAVE_SEXT 70#define XCHAL_HAVE_SEXT 0 71 72#undef XCHAL_HAVE_LOOPS 73#define XCHAL_HAVE_LOOPS 1 74 75#undef XCHAL_HAVE_BOOLEANS 76#define XCHAL_HAVE_BOOLEANS 0 77 78#undef XCHAL_HAVE_FP 79#define XCHAL_HAVE_FP 0 80 81#undef XCHAL_HAVE_FP_DIV 82#define XCHAL_HAVE_FP_DIV 0 83 84#undef XCHAL_HAVE_FP_RECIP 85#define XCHAL_HAVE_FP_RECIP 0 86 87#undef XCHAL_HAVE_FP_SQRT 88#define XCHAL_HAVE_FP_SQRT 0 89 90#undef XCHAL_HAVE_FP_RSQRT 91#define XCHAL_HAVE_FP_RSQRT 0 92 93#undef XCHAL_HAVE_WINDOWED 94#define XCHAL_HAVE_WINDOWED 1 95 96#undef XCHAL_HAVE_WIDE_BRANCHES 97#define XCHAL_HAVE_WIDE_BRANCHES 0 98 99#undef XCHAL_HAVE_PREDICTED_BRANCHES 100#define XCHAL_HAVE_PREDICTED_BRANCHES 0 101 102 103#undef XCHAL_ICACHE_SIZE 104#define XCHAL_ICACHE_SIZE 8192 105 106#undef XCHAL_DCACHE_SIZE 107#define XCHAL_DCACHE_SIZE 8192 108 109#undef XCHAL_ICACHE_LINESIZE 110#define XCHAL_ICACHE_LINESIZE 16 111 112#undef XCHAL_DCACHE_LINESIZE 113#define XCHAL_DCACHE_LINESIZE 16 114 115#undef XCHAL_ICACHE_LINEWIDTH 116#define XCHAL_ICACHE_LINEWIDTH 4 117 118#undef XCHAL_DCACHE_LINEWIDTH 119#define XCHAL_DCACHE_LINEWIDTH 4 120 121#undef XCHAL_DCACHE_IS_WRITEBACK 122#define XCHAL_DCACHE_IS_WRITEBACK 0 123 124 125#undef XCHAL_HAVE_MMU 126#define XCHAL_HAVE_MMU 1 127 128#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE 129#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12 130 131 132#undef XCHAL_HAVE_DEBUG 133#define XCHAL_HAVE_DEBUG 1 134 135#undef XCHAL_NUM_IBREAK 136#define XCHAL_NUM_IBREAK 2 137 138#undef XCHAL_NUM_DBREAK 139#define XCHAL_NUM_DBREAK 2 140 141#undef XCHAL_DEBUGLEVEL 142#define XCHAL_DEBUGLEVEL 4 143 144 145#undef XCHAL_INST_FETCH_WIDTH 146#define XCHAL_INST_FETCH_WIDTH 4 147 148#endif /* !XTENSA_CONFIG_H */ 149