1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, i.e., the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "coretypes.h" 157#include "tm.h" 158#include "tree.h" 159#include "rtl.h" 160#include "tm_p.h" 161#include "function.h" 162#include "insn-config.h" 163#include "regs.h" 164#include "hard-reg-set.h" 165#include "flags.h" 166#include "toplev.h" 167#include "recog.h" 168#include "output.h" 169#include "basic-block.h" 170#include "varray.h" 171#include "reload.h" 172#include "ggc.h" 173#include "timevar.h" 174#include "tree-pass.h" 175#include "target.h" 176#include "vecprim.h" 177 178#ifdef STACK_REGS 179 180/* We use this array to cache info about insns, because otherwise we 181 spend too much time in stack_regs_mentioned_p. 182 183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 184 the insn uses stack registers, two indicates the insn does not use 185 stack registers. */ 186static VEC(char,heap) *stack_regs_mentioned_data; 187 188#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 189 190int regstack_completed = 0; 191 192/* This is the basic stack record. TOP is an index into REG[] such 193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 194 195 If TOP is -2, REG[] is not yet initialized. Stack initialization 196 consists of placing each live reg in array `reg' and setting `top' 197 appropriately. 198 199 REG_SET indicates which registers are live. */ 200 201typedef struct stack_def 202{ 203 int top; /* index to top stack element */ 204 HARD_REG_SET reg_set; /* set of live registers */ 205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 206} *stack; 207 208/* This is used to carry information about basic blocks. It is 209 attached to the AUX field of the standard CFG block. */ 210 211typedef struct block_info_def 212{ 213 struct stack_def stack_in; /* Input stack configuration. */ 214 struct stack_def stack_out; /* Output stack configuration. */ 215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 216 int done; /* True if block already converted. */ 217 int predecessors; /* Number of predecessors that need 218 to be visited. */ 219} *block_info; 220 221#define BLOCK_INFO(B) ((block_info) (B)->aux) 222 223/* Passed to change_stack to indicate where to emit insns. */ 224enum emit_where 225{ 226 EMIT_AFTER, 227 EMIT_BEFORE 228}; 229 230/* The block we're currently working on. */ 231static basic_block current_block; 232 233/* In the current_block, whether we're processing the first register 234 stack or call instruction, i.e. the regstack is currently the 235 same as BLOCK_INFO(current_block)->stack_in. */ 236static bool starting_stack_p; 237 238/* This is the register file for all register after conversion. */ 239static rtx 240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 241 242#define FP_MODE_REG(regno,mode) \ 243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 244 245/* Used to initialize uninitialized registers. */ 246static rtx not_a_num; 247 248/* Forward declarations */ 249 250static int stack_regs_mentioned_p (rtx pat); 251static void pop_stack (stack, int); 252static rtx *get_true_reg (rtx *); 253 254static int check_asm_stack_operands (rtx); 255static int get_asm_operand_n_inputs (rtx); 256static rtx stack_result (tree); 257static void replace_reg (rtx *, int); 258static void remove_regno_note (rtx, enum reg_note, unsigned int); 259static int get_hard_regnum (stack, rtx); 260static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); 261static void swap_to_top(rtx, stack, rtx, rtx); 262static bool move_for_stack_reg (rtx, stack, rtx); 263static bool move_nan_for_stack_reg (rtx, stack, rtx); 264static int swap_rtx_condition_1 (rtx); 265static int swap_rtx_condition (rtx); 266static void compare_for_stack_reg (rtx, stack, rtx); 267static bool subst_stack_regs_pat (rtx, stack, rtx); 268static void subst_asm_stack_regs (rtx, stack); 269static bool subst_stack_regs (rtx, stack); 270static void change_stack (rtx, stack, stack, enum emit_where); 271static void print_stack (FILE *, stack); 272static rtx next_flags_user (rtx); 273 274/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 275 276static int 277stack_regs_mentioned_p (rtx pat) 278{ 279 const char *fmt; 280 int i; 281 282 if (STACK_REG_P (pat)) 283 return 1; 284 285 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 287 { 288 if (fmt[i] == 'E') 289 { 290 int j; 291 292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 294 return 1; 295 } 296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 297 return 1; 298 } 299 300 return 0; 301} 302 303/* Return nonzero if INSN mentions stacked registers, else return zero. */ 304 305int 306stack_regs_mentioned (rtx insn) 307{ 308 unsigned int uid, max; 309 int test; 310 311 if (! INSN_P (insn) || !stack_regs_mentioned_data) 312 return 0; 313 314 uid = INSN_UID (insn); 315 max = VEC_length (char, stack_regs_mentioned_data); 316 if (uid >= max) 317 { 318 char *p; 319 unsigned int old_max = max; 320 321 /* Allocate some extra size to avoid too many reallocs, but 322 do not grow too quickly. */ 323 max = uid + uid / 20 + 1; 324 VEC_safe_grow (char, heap, stack_regs_mentioned_data, max); 325 p = VEC_address (char, stack_regs_mentioned_data); 326 memset (&p[old_max], 0, 327 sizeof (char) * (max - old_max)); 328 } 329 330 test = VEC_index (char, stack_regs_mentioned_data, uid); 331 if (test == 0) 332 { 333 /* This insn has yet to be examined. Do so now. */ 334 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 335 VEC_replace (char, stack_regs_mentioned_data, uid, test); 336 } 337 338 return test == 1; 339} 340 341static rtx ix86_flags_rtx; 342 343static rtx 344next_flags_user (rtx insn) 345{ 346 /* Search forward looking for the first use of this value. 347 Stop at block boundaries. */ 348 349 while (insn != BB_END (current_block)) 350 { 351 insn = NEXT_INSN (insn); 352 353 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 354 return insn; 355 356 if (CALL_P (insn)) 357 return NULL_RTX; 358 } 359 return NULL_RTX; 360} 361 362/* Reorganize the stack into ascending numbers, before this insn. */ 363 364static void 365straighten_stack (rtx insn, stack regstack) 366{ 367 struct stack_def temp_stack; 368 int top; 369 370 /* If there is only a single register on the stack, then the stack is 371 already in increasing order and no reorganization is needed. 372 373 Similarly if the stack is empty. */ 374 if (regstack->top <= 0) 375 return; 376 377 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 378 379 for (top = temp_stack.top = regstack->top; top >= 0; top--) 380 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 381 382 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 383} 384 385/* Pop a register from the stack. */ 386 387static void 388pop_stack (stack regstack, int regno) 389{ 390 int top = regstack->top; 391 392 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 393 regstack->top--; 394 /* If regno was not at the top of stack then adjust stack. */ 395 if (regstack->reg [top] != regno) 396 { 397 int i; 398 for (i = regstack->top; i >= 0; i--) 399 if (regstack->reg [i] == regno) 400 { 401 int j; 402 for (j = i; j < top; j++) 403 regstack->reg [j] = regstack->reg [j + 1]; 404 break; 405 } 406 } 407} 408 409/* Return a pointer to the REG expression within PAT. If PAT is not a 410 REG, possible enclosed by a conversion rtx, return the inner part of 411 PAT that stopped the search. */ 412 413static rtx * 414get_true_reg (rtx *pat) 415{ 416 for (;;) 417 switch (GET_CODE (*pat)) 418 { 419 case SUBREG: 420 /* Eliminate FP subregister accesses in favor of the 421 actual FP register in use. */ 422 { 423 rtx subreg; 424 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 425 { 426 int regno_off = subreg_regno_offset (REGNO (subreg), 427 GET_MODE (subreg), 428 SUBREG_BYTE (*pat), 429 GET_MODE (*pat)); 430 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 431 GET_MODE (subreg)); 432 default: 433 return pat; 434 } 435 } 436 case FLOAT: 437 case FIX: 438 case FLOAT_EXTEND: 439 pat = & XEXP (*pat, 0); 440 break; 441 442 case FLOAT_TRUNCATE: 443 if (!flag_unsafe_math_optimizations) 444 return pat; 445 pat = & XEXP (*pat, 0); 446 break; 447 } 448} 449 450/* Set if we find any malformed asms in a block. */ 451static bool any_malformed_asm; 452 453/* There are many rules that an asm statement for stack-like regs must 454 follow. Those rules are explained at the top of this file: the rule 455 numbers below refer to that explanation. */ 456 457static int 458check_asm_stack_operands (rtx insn) 459{ 460 int i; 461 int n_clobbers; 462 int malformed_asm = 0; 463 rtx body = PATTERN (insn); 464 465 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 466 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 467 int alt; 468 469 rtx *clobber_reg = 0; 470 int n_inputs, n_outputs; 471 472 /* Find out what the constraints require. If no constraint 473 alternative matches, this asm is malformed. */ 474 extract_insn (insn); 475 constrain_operands (1); 476 alt = which_alternative; 477 478 preprocess_constraints (); 479 480 n_inputs = get_asm_operand_n_inputs (body); 481 n_outputs = recog_data.n_operands - n_inputs; 482 483 if (alt < 0) 484 { 485 malformed_asm = 1; 486 /* Avoid further trouble with this insn. */ 487 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 488 return 0; 489 } 490 491 /* Strip SUBREGs here to make the following code simpler. */ 492 for (i = 0; i < recog_data.n_operands; i++) 493 if (GET_CODE (recog_data.operand[i]) == SUBREG 494 && REG_P (SUBREG_REG (recog_data.operand[i]))) 495 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 496 497 /* Set up CLOBBER_REG. */ 498 499 n_clobbers = 0; 500 501 if (GET_CODE (body) == PARALLEL) 502 { 503 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 504 505 for (i = 0; i < XVECLEN (body, 0); i++) 506 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 507 { 508 rtx clobber = XVECEXP (body, 0, i); 509 rtx reg = XEXP (clobber, 0); 510 511 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 512 reg = SUBREG_REG (reg); 513 514 if (STACK_REG_P (reg)) 515 { 516 clobber_reg[n_clobbers] = reg; 517 n_clobbers++; 518 } 519 } 520 } 521 522 /* Enforce rule #4: Output operands must specifically indicate which 523 reg an output appears in after an asm. "=f" is not allowed: the 524 operand constraints must select a class with a single reg. 525 526 Also enforce rule #5: Output operands must start at the top of 527 the reg-stack: output operands may not "skip" a reg. */ 528 529 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 530 for (i = 0; i < n_outputs; i++) 531 if (STACK_REG_P (recog_data.operand[i])) 532 { 533 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) 534 { 535 error_for_asm (insn, "output constraint %d must specify a single register", i); 536 malformed_asm = 1; 537 } 538 else 539 { 540 int j; 541 542 for (j = 0; j < n_clobbers; j++) 543 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 544 { 545 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 546 i, reg_names [REGNO (clobber_reg[j])]); 547 malformed_asm = 1; 548 break; 549 } 550 if (j == n_clobbers) 551 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 552 } 553 } 554 555 556 /* Search for first non-popped reg. */ 557 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 558 if (! reg_used_as_output[i]) 559 break; 560 561 /* If there are any other popped regs, that's an error. */ 562 for (; i < LAST_STACK_REG + 1; i++) 563 if (reg_used_as_output[i]) 564 break; 565 566 if (i != LAST_STACK_REG + 1) 567 { 568 error_for_asm (insn, "output regs must be grouped at top of stack"); 569 malformed_asm = 1; 570 } 571 572 /* Enforce rule #2: All implicitly popped input regs must be closer 573 to the top of the reg-stack than any input that is not implicitly 574 popped. */ 575 576 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 577 for (i = n_outputs; i < n_outputs + n_inputs; i++) 578 if (STACK_REG_P (recog_data.operand[i])) 579 { 580 /* An input reg is implicitly popped if it is tied to an 581 output, or if there is a CLOBBER for it. */ 582 int j; 583 584 for (j = 0; j < n_clobbers; j++) 585 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 586 break; 587 588 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 589 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 590 } 591 592 /* Search for first non-popped reg. */ 593 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 594 if (! implicitly_dies[i]) 595 break; 596 597 /* If there are any other popped regs, that's an error. */ 598 for (; i < LAST_STACK_REG + 1; i++) 599 if (implicitly_dies[i]) 600 break; 601 602 if (i != LAST_STACK_REG + 1) 603 { 604 error_for_asm (insn, 605 "implicitly popped regs must be grouped at top of stack"); 606 malformed_asm = 1; 607 } 608 609 /* Enforce rule #3: If any input operand uses the "f" constraint, all 610 output constraints must use the "&" earlyclobber. 611 612 ??? Detect this more deterministically by having constrain_asm_operands 613 record any earlyclobber. */ 614 615 for (i = n_outputs; i < n_outputs + n_inputs; i++) 616 if (recog_op_alt[i][alt].matches == -1) 617 { 618 int j; 619 620 for (j = 0; j < n_outputs; j++) 621 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 622 { 623 error_for_asm (insn, 624 "output operand %d must use %<&%> constraint", j); 625 malformed_asm = 1; 626 } 627 } 628 629 if (malformed_asm) 630 { 631 /* Avoid further trouble with this insn. */ 632 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 633 any_malformed_asm = true; 634 return 0; 635 } 636 637 return 1; 638} 639 640/* Calculate the number of inputs and outputs in BODY, an 641 asm_operands. N_OPERANDS is the total number of operands, and 642 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 643 placed. */ 644 645static int 646get_asm_operand_n_inputs (rtx body) 647{ 648 switch (GET_CODE (body)) 649 { 650 case SET: 651 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS); 652 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 653 654 case ASM_OPERANDS: 655 return ASM_OPERANDS_INPUT_LENGTH (body); 656 657 case PARALLEL: 658 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0)); 659 660 default: 661 gcc_unreachable (); 662 } 663} 664 665/* If current function returns its result in an fp stack register, 666 return the REG. Otherwise, return 0. */ 667 668static rtx 669stack_result (tree decl) 670{ 671 rtx result; 672 673 /* If the value is supposed to be returned in memory, then clearly 674 it is not returned in a stack register. */ 675 if (aggregate_value_p (DECL_RESULT (decl), decl)) 676 return 0; 677 678 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 679 if (result != 0) 680 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), 681 decl, true); 682 683 return result != 0 && STACK_REG_P (result) ? result : 0; 684} 685 686 687/* 688 * This section deals with stack register substitution, and forms the second 689 * pass over the RTL. 690 */ 691 692/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 693 the desired hard REGNO. */ 694 695static void 696replace_reg (rtx *reg, int regno) 697{ 698 gcc_assert (regno >= FIRST_STACK_REG); 699 gcc_assert (regno <= LAST_STACK_REG); 700 gcc_assert (STACK_REG_P (*reg)); 701 702 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) 703 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); 704 705 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 706} 707 708/* Remove a note of type NOTE, which must be found, for register 709 number REGNO from INSN. Remove only one such note. */ 710 711static void 712remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 713{ 714 rtx *note_link, this; 715 716 note_link = ®_NOTES (insn); 717 for (this = *note_link; this; this = XEXP (this, 1)) 718 if (REG_NOTE_KIND (this) == note 719 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 720 { 721 *note_link = XEXP (this, 1); 722 return; 723 } 724 else 725 note_link = &XEXP (this, 1); 726 727 gcc_unreachable (); 728} 729 730/* Find the hard register number of virtual register REG in REGSTACK. 731 The hard register number is relative to the top of the stack. -1 is 732 returned if the register is not found. */ 733 734static int 735get_hard_regnum (stack regstack, rtx reg) 736{ 737 int i; 738 739 gcc_assert (STACK_REG_P (reg)); 740 741 for (i = regstack->top; i >= 0; i--) 742 if (regstack->reg[i] == REGNO (reg)) 743 break; 744 745 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 746} 747 748/* Emit an insn to pop virtual register REG before or after INSN. 749 REGSTACK is the stack state after INSN and is updated to reflect this 750 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 751 is represented as a SET whose destination is the register to be popped 752 and source is the top of stack. A death note for the top of stack 753 cases the movdf pattern to pop. */ 754 755static rtx 756emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) 757{ 758 rtx pop_insn, pop_rtx; 759 int hard_regno; 760 761 /* For complex types take care to pop both halves. These may survive in 762 CLOBBER and USE expressions. */ 763 if (COMPLEX_MODE_P (GET_MODE (reg))) 764 { 765 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 766 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 767 768 pop_insn = NULL_RTX; 769 if (get_hard_regnum (regstack, reg1) >= 0) 770 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 771 if (get_hard_regnum (regstack, reg2) >= 0) 772 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 773 gcc_assert (pop_insn); 774 return pop_insn; 775 } 776 777 hard_regno = get_hard_regnum (regstack, reg); 778 779 gcc_assert (hard_regno >= FIRST_STACK_REG); 780 781 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 782 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 783 784 if (where == EMIT_AFTER) 785 pop_insn = emit_insn_after (pop_rtx, insn); 786 else 787 pop_insn = emit_insn_before (pop_rtx, insn); 788 789 REG_NOTES (pop_insn) 790 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 791 REG_NOTES (pop_insn)); 792 793 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 794 = regstack->reg[regstack->top]; 795 regstack->top -= 1; 796 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 797 798 return pop_insn; 799} 800 801/* Emit an insn before or after INSN to swap virtual register REG with 802 the top of stack. REGSTACK is the stack state before the swap, and 803 is updated to reflect the swap. A swap insn is represented as a 804 PARALLEL of two patterns: each pattern moves one reg to the other. 805 806 If REG is already at the top of the stack, no insn is emitted. */ 807 808static void 809emit_swap_insn (rtx insn, stack regstack, rtx reg) 810{ 811 int hard_regno; 812 rtx swap_rtx; 813 int tmp, other_reg; /* swap regno temps */ 814 rtx i1; /* the stack-reg insn prior to INSN */ 815 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 816 817 hard_regno = get_hard_regnum (regstack, reg); 818 819 if (hard_regno == FIRST_STACK_REG) 820 return; 821 if (hard_regno == -1) 822 { 823 /* Something failed if the register wasn't on the stack. If we had 824 malformed asms, we zapped the instruction itself, but that didn't 825 produce the same pattern of register sets as before. To prevent 826 further failure, adjust REGSTACK to include REG at TOP. */ 827 gcc_assert (any_malformed_asm); 828 regstack->reg[++regstack->top] = REGNO (reg); 829 return; 830 } 831 gcc_assert (hard_regno >= FIRST_STACK_REG); 832 833 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 834 835 tmp = regstack->reg[other_reg]; 836 regstack->reg[other_reg] = regstack->reg[regstack->top]; 837 regstack->reg[regstack->top] = tmp; 838 839 /* Find the previous insn involving stack regs, but don't pass a 840 block boundary. */ 841 i1 = NULL; 842 if (current_block && insn != BB_HEAD (current_block)) 843 { 844 rtx tmp = PREV_INSN (insn); 845 rtx limit = PREV_INSN (BB_HEAD (current_block)); 846 while (tmp != limit) 847 { 848 if (LABEL_P (tmp) 849 || CALL_P (tmp) 850 || NOTE_INSN_BASIC_BLOCK_P (tmp) 851 || (NONJUMP_INSN_P (tmp) 852 && stack_regs_mentioned (tmp))) 853 { 854 i1 = tmp; 855 break; 856 } 857 tmp = PREV_INSN (tmp); 858 } 859 } 860 861 if (i1 != NULL_RTX 862 && (i1set = single_set (i1)) != NULL_RTX) 863 { 864 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 865 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 866 867 /* If the previous register stack push was from the reg we are to 868 swap with, omit the swap. */ 869 870 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG 871 && REG_P (i1src) 872 && REGNO (i1src) == (unsigned) hard_regno - 1 873 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 874 return; 875 876 /* If the previous insn wrote to the reg we are to swap with, 877 omit the swap. */ 878 879 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno 880 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG 881 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 882 return; 883 } 884 885 /* Avoid emitting the swap if this is the first register stack insn 886 of the current_block. Instead update the current_block's stack_in 887 and let compensate edges take care of this for us. */ 888 if (current_block && starting_stack_p) 889 { 890 BLOCK_INFO (current_block)->stack_in = *regstack; 891 starting_stack_p = false; 892 return; 893 } 894 895 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 896 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 897 898 if (i1) 899 emit_insn_after (swap_rtx, i1); 900 else if (current_block) 901 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 902 else 903 emit_insn_before (swap_rtx, insn); 904} 905 906/* Emit an insns before INSN to swap virtual register SRC1 with 907 the top of stack and virtual register SRC2 with second stack 908 slot. REGSTACK is the stack state before the swaps, and 909 is updated to reflect the swaps. A swap insn is represented as a 910 PARALLEL of two patterns: each pattern moves one reg to the other. 911 912 If SRC1 and/or SRC2 are already at the right place, no swap insn 913 is emitted. */ 914 915static void 916swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) 917{ 918 struct stack_def temp_stack; 919 int regno, j, k, temp; 920 921 temp_stack = *regstack; 922 923 /* Place operand 1 at the top of stack. */ 924 regno = get_hard_regnum (&temp_stack, src1); 925 gcc_assert (regno >= 0); 926 if (regno != FIRST_STACK_REG) 927 { 928 k = temp_stack.top - (regno - FIRST_STACK_REG); 929 j = temp_stack.top; 930 931 temp = temp_stack.reg[k]; 932 temp_stack.reg[k] = temp_stack.reg[j]; 933 temp_stack.reg[j] = temp; 934 } 935 936 /* Place operand 2 next on the stack. */ 937 regno = get_hard_regnum (&temp_stack, src2); 938 gcc_assert (regno >= 0); 939 if (regno != FIRST_STACK_REG + 1) 940 { 941 k = temp_stack.top - (regno - FIRST_STACK_REG); 942 j = temp_stack.top - 1; 943 944 temp = temp_stack.reg[k]; 945 temp_stack.reg[k] = temp_stack.reg[j]; 946 temp_stack.reg[j] = temp; 947 } 948 949 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 950} 951 952/* Handle a move to or from a stack register in PAT, which is in INSN. 953 REGSTACK is the current stack. Return whether a control flow insn 954 was deleted in the process. */ 955 956static bool 957move_for_stack_reg (rtx insn, stack regstack, rtx pat) 958{ 959 rtx *psrc = get_true_reg (&SET_SRC (pat)); 960 rtx *pdest = get_true_reg (&SET_DEST (pat)); 961 rtx src, dest; 962 rtx note; 963 bool control_flow_insn_deleted = false; 964 965 src = *psrc; dest = *pdest; 966 967 if (STACK_REG_P (src) && STACK_REG_P (dest)) 968 { 969 /* Write from one stack reg to another. If SRC dies here, then 970 just change the register mapping and delete the insn. */ 971 972 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 973 if (note) 974 { 975 int i; 976 977 /* If this is a no-op move, there must not be a REG_DEAD note. */ 978 gcc_assert (REGNO (src) != REGNO (dest)); 979 980 for (i = regstack->top; i >= 0; i--) 981 if (regstack->reg[i] == REGNO (src)) 982 break; 983 984 /* The destination must be dead, or life analysis is borked. */ 985 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 986 987 /* If the source is not live, this is yet another case of 988 uninitialized variables. Load up a NaN instead. */ 989 if (i < 0) 990 return move_nan_for_stack_reg (insn, regstack, dest); 991 992 /* It is possible that the dest is unused after this insn. 993 If so, just pop the src. */ 994 995 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 996 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 997 else 998 { 999 regstack->reg[i] = REGNO (dest); 1000 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1001 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1002 } 1003 1004 control_flow_insn_deleted |= control_flow_insn_p (insn); 1005 delete_insn (insn); 1006 return control_flow_insn_deleted; 1007 } 1008 1009 /* The source reg does not die. */ 1010 1011 /* If this appears to be a no-op move, delete it, or else it 1012 will confuse the machine description output patterns. But if 1013 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1014 for REG_UNUSED will not work for deleted insns. */ 1015 1016 if (REGNO (src) == REGNO (dest)) 1017 { 1018 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1019 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1020 1021 control_flow_insn_deleted |= control_flow_insn_p (insn); 1022 delete_insn (insn); 1023 return control_flow_insn_deleted; 1024 } 1025 1026 /* The destination ought to be dead. */ 1027 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1028 1029 replace_reg (psrc, get_hard_regnum (regstack, src)); 1030 1031 regstack->reg[++regstack->top] = REGNO (dest); 1032 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1033 replace_reg (pdest, FIRST_STACK_REG); 1034 } 1035 else if (STACK_REG_P (src)) 1036 { 1037 /* Save from a stack reg to MEM, or possibly integer reg. Since 1038 only top of stack may be saved, emit an exchange first if 1039 needs be. */ 1040 1041 emit_swap_insn (insn, regstack, src); 1042 1043 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1044 if (note) 1045 { 1046 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1047 regstack->top--; 1048 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1049 } 1050 else if ((GET_MODE (src) == XFmode) 1051 && regstack->top < REG_STACK_SIZE - 1) 1052 { 1053 /* A 387 cannot write an XFmode value to a MEM without 1054 clobbering the source reg. The output code can handle 1055 this by reading back the value from the MEM. 1056 But it is more efficient to use a temp register if one is 1057 available. Push the source value here if the register 1058 stack is not full, and then write the value to memory via 1059 a pop. */ 1060 rtx push_rtx; 1061 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1062 1063 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1064 emit_insn_before (push_rtx, insn); 1065 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1066 REG_NOTES (insn)); 1067 } 1068 1069 replace_reg (psrc, FIRST_STACK_REG); 1070 } 1071 else 1072 { 1073 gcc_assert (STACK_REG_P (dest)); 1074 1075 /* Load from MEM, or possibly integer REG or constant, into the 1076 stack regs. The actual target is always the top of the 1077 stack. The stack mapping is changed to reflect that DEST is 1078 now at top of stack. */ 1079 1080 /* The destination ought to be dead. */ 1081 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); 1082 1083 gcc_assert (regstack->top < REG_STACK_SIZE); 1084 1085 regstack->reg[++regstack->top] = REGNO (dest); 1086 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1087 replace_reg (pdest, FIRST_STACK_REG); 1088 } 1089 1090 return control_flow_insn_deleted; 1091} 1092 1093/* A helper function which replaces INSN with a pattern that loads up 1094 a NaN into DEST, then invokes move_for_stack_reg. */ 1095 1096static bool 1097move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest) 1098{ 1099 rtx pat; 1100 1101 dest = FP_MODE_REG (REGNO (dest), SFmode); 1102 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); 1103 PATTERN (insn) = pat; 1104 INSN_CODE (insn) = -1; 1105 1106 return move_for_stack_reg (insn, regstack, pat); 1107} 1108 1109/* Swap the condition on a branch, if there is one. Return true if we 1110 found a condition to swap. False if the condition was not used as 1111 such. */ 1112 1113static int 1114swap_rtx_condition_1 (rtx pat) 1115{ 1116 const char *fmt; 1117 int i, r = 0; 1118 1119 if (COMPARISON_P (pat)) 1120 { 1121 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1122 r = 1; 1123 } 1124 else 1125 { 1126 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1127 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1128 { 1129 if (fmt[i] == 'E') 1130 { 1131 int j; 1132 1133 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1134 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1135 } 1136 else if (fmt[i] == 'e') 1137 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1138 } 1139 } 1140 1141 return r; 1142} 1143 1144static int 1145swap_rtx_condition (rtx insn) 1146{ 1147 rtx pat = PATTERN (insn); 1148 1149 /* We're looking for a single set to cc0 or an HImode temporary. */ 1150 1151 if (GET_CODE (pat) == SET 1152 && REG_P (SET_DEST (pat)) 1153 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1154 { 1155 insn = next_flags_user (insn); 1156 if (insn == NULL_RTX) 1157 return 0; 1158 pat = PATTERN (insn); 1159 } 1160 1161 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything 1162 with the cc value right now. We may be able to search for one 1163 though. */ 1164 1165 if (GET_CODE (pat) == SET 1166 && GET_CODE (SET_SRC (pat)) == UNSPEC 1167 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1168 { 1169 rtx dest = SET_DEST (pat); 1170 1171 /* Search forward looking for the first use of this value. 1172 Stop at block boundaries. */ 1173 while (insn != BB_END (current_block)) 1174 { 1175 insn = NEXT_INSN (insn); 1176 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1177 break; 1178 if (CALL_P (insn)) 1179 return 0; 1180 } 1181 1182 /* We haven't found it. */ 1183 if (insn == BB_END (current_block)) 1184 return 0; 1185 1186 /* So we've found the insn using this value. If it is anything 1187 other than sahf or the value does not die (meaning we'd have 1188 to search further), then we must give up. */ 1189 pat = PATTERN (insn); 1190 if (GET_CODE (pat) != SET 1191 || GET_CODE (SET_SRC (pat)) != UNSPEC 1192 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1193 || ! dead_or_set_p (insn, dest)) 1194 return 0; 1195 1196 /* Now we are prepared to handle this as a normal cc0 setter. */ 1197 insn = next_flags_user (insn); 1198 if (insn == NULL_RTX) 1199 return 0; 1200 pat = PATTERN (insn); 1201 } 1202 1203 if (swap_rtx_condition_1 (pat)) 1204 { 1205 int fail = 0; 1206 INSN_CODE (insn) = -1; 1207 if (recog_memoized (insn) == -1) 1208 fail = 1; 1209 /* In case the flags don't die here, recurse to try fix 1210 following user too. */ 1211 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1212 { 1213 insn = next_flags_user (insn); 1214 if (!insn || !swap_rtx_condition (insn)) 1215 fail = 1; 1216 } 1217 if (fail) 1218 { 1219 swap_rtx_condition_1 (pat); 1220 return 0; 1221 } 1222 return 1; 1223 } 1224 return 0; 1225} 1226 1227/* Handle a comparison. Special care needs to be taken to avoid 1228 causing comparisons that a 387 cannot do correctly, such as EQ. 1229 1230 Also, a pop insn may need to be emitted. The 387 does have an 1231 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1232 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1233 set up. */ 1234 1235static void 1236compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) 1237{ 1238 rtx *src1, *src2; 1239 rtx src1_note, src2_note; 1240 1241 src1 = get_true_reg (&XEXP (pat_src, 0)); 1242 src2 = get_true_reg (&XEXP (pat_src, 1)); 1243 1244 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1245 registers that die in this insn - move those to stack top first. */ 1246 if ((! STACK_REG_P (*src1) 1247 || (STACK_REG_P (*src2) 1248 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1249 && swap_rtx_condition (insn)) 1250 { 1251 rtx temp; 1252 temp = XEXP (pat_src, 0); 1253 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1254 XEXP (pat_src, 1) = temp; 1255 1256 src1 = get_true_reg (&XEXP (pat_src, 0)); 1257 src2 = get_true_reg (&XEXP (pat_src, 1)); 1258 1259 INSN_CODE (insn) = -1; 1260 } 1261 1262 /* We will fix any death note later. */ 1263 1264 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1265 1266 if (STACK_REG_P (*src2)) 1267 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1268 else 1269 src2_note = NULL_RTX; 1270 1271 emit_swap_insn (insn, regstack, *src1); 1272 1273 replace_reg (src1, FIRST_STACK_REG); 1274 1275 if (STACK_REG_P (*src2)) 1276 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1277 1278 if (src1_note) 1279 { 1280 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1281 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1282 } 1283 1284 /* If the second operand dies, handle that. But if the operands are 1285 the same stack register, don't bother, because only one death is 1286 needed, and it was just handled. */ 1287 1288 if (src2_note 1289 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1290 && REGNO (*src1) == REGNO (*src2))) 1291 { 1292 /* As a special case, two regs may die in this insn if src2 is 1293 next to top of stack and the top of stack also dies. Since 1294 we have already popped src1, "next to top of stack" is really 1295 at top (FIRST_STACK_REG) now. */ 1296 1297 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1298 && src1_note) 1299 { 1300 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1301 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1302 } 1303 else 1304 { 1305 /* The 386 can only represent death of the first operand in 1306 the case handled above. In all other cases, emit a separate 1307 pop and remove the death note from here. */ 1308 1309 /* link_cc0_insns (insn); */ 1310 1311 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1312 1313 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1314 EMIT_AFTER); 1315 } 1316 } 1317} 1318 1319/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1320 is the current register layout. Return whether a control flow insn 1321 was deleted in the process. */ 1322 1323static bool 1324subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) 1325{ 1326 rtx *dest, *src; 1327 bool control_flow_insn_deleted = false; 1328 1329 switch (GET_CODE (pat)) 1330 { 1331 case USE: 1332 /* Deaths in USE insns can happen in non optimizing compilation. 1333 Handle them by popping the dying register. */ 1334 src = get_true_reg (&XEXP (pat, 0)); 1335 if (STACK_REG_P (*src) 1336 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1337 { 1338 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1339 return control_flow_insn_deleted; 1340 } 1341 /* ??? Uninitialized USE should not happen. */ 1342 else 1343 gcc_assert (get_hard_regnum (regstack, *src) != -1); 1344 break; 1345 1346 case CLOBBER: 1347 { 1348 rtx note; 1349 1350 dest = get_true_reg (&XEXP (pat, 0)); 1351 if (STACK_REG_P (*dest)) 1352 { 1353 note = find_reg_note (insn, REG_DEAD, *dest); 1354 1355 if (pat != PATTERN (insn)) 1356 { 1357 /* The fix_truncdi_1 pattern wants to be able to allocate 1358 its own scratch register. It does this by clobbering 1359 an fp reg so that it is assured of an empty reg-stack 1360 register. If the register is live, kill it now. 1361 Remove the DEAD/UNUSED note so we don't try to kill it 1362 later too. */ 1363 1364 if (note) 1365 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1366 else 1367 { 1368 note = find_reg_note (insn, REG_UNUSED, *dest); 1369 gcc_assert (note); 1370 } 1371 remove_note (insn, note); 1372 replace_reg (dest, FIRST_STACK_REG + 1); 1373 } 1374 else 1375 { 1376 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1377 indicates an uninitialized value. Because reload removed 1378 all other clobbers, this must be due to a function 1379 returning without a value. Load up a NaN. */ 1380 1381 if (!note) 1382 { 1383 rtx t = *dest; 1384 if (COMPLEX_MODE_P (GET_MODE (t))) 1385 { 1386 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); 1387 if (get_hard_regnum (regstack, u) == -1) 1388 { 1389 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); 1390 rtx insn2 = emit_insn_before (pat2, insn); 1391 control_flow_insn_deleted 1392 |= move_nan_for_stack_reg (insn2, regstack, u); 1393 } 1394 } 1395 if (get_hard_regnum (regstack, t) == -1) 1396 control_flow_insn_deleted 1397 |= move_nan_for_stack_reg (insn, regstack, t); 1398 } 1399 } 1400 } 1401 break; 1402 } 1403 1404 case SET: 1405 { 1406 rtx *src1 = (rtx *) 0, *src2; 1407 rtx src1_note, src2_note; 1408 rtx pat_src; 1409 1410 dest = get_true_reg (&SET_DEST (pat)); 1411 src = get_true_reg (&SET_SRC (pat)); 1412 pat_src = SET_SRC (pat); 1413 1414 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1415 if (STACK_REG_P (*src) 1416 || (STACK_REG_P (*dest) 1417 && (REG_P (*src) || MEM_P (*src) 1418 || GET_CODE (*src) == CONST_DOUBLE))) 1419 { 1420 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1421 break; 1422 } 1423 1424 switch (GET_CODE (pat_src)) 1425 { 1426 case COMPARE: 1427 compare_for_stack_reg (insn, regstack, pat_src); 1428 break; 1429 1430 case CALL: 1431 { 1432 int count; 1433 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; 1434 --count >= 0;) 1435 { 1436 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1437 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1438 } 1439 } 1440 replace_reg (dest, FIRST_STACK_REG); 1441 break; 1442 1443 case REG: 1444 /* This is a `tstM2' case. */ 1445 gcc_assert (*dest == cc0_rtx); 1446 src1 = src; 1447 1448 /* Fall through. */ 1449 1450 case FLOAT_TRUNCATE: 1451 case SQRT: 1452 case ABS: 1453 case NEG: 1454 /* These insns only operate on the top of the stack. DEST might 1455 be cc0_rtx if we're processing a tstM pattern. Also, it's 1456 possible that the tstM case results in a REG_DEAD note on the 1457 source. */ 1458 1459 if (src1 == 0) 1460 src1 = get_true_reg (&XEXP (pat_src, 0)); 1461 1462 emit_swap_insn (insn, regstack, *src1); 1463 1464 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1465 1466 if (STACK_REG_P (*dest)) 1467 replace_reg (dest, FIRST_STACK_REG); 1468 1469 if (src1_note) 1470 { 1471 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1472 regstack->top--; 1473 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1474 } 1475 1476 replace_reg (src1, FIRST_STACK_REG); 1477 break; 1478 1479 case MINUS: 1480 case DIV: 1481 /* On i386, reversed forms of subM3 and divM3 exist for 1482 MODE_FLOAT, so the same code that works for addM3 and mulM3 1483 can be used. */ 1484 case MULT: 1485 case PLUS: 1486 /* These insns can accept the top of stack as a destination 1487 from a stack reg or mem, or can use the top of stack as a 1488 source and some other stack register (possibly top of stack) 1489 as a destination. */ 1490 1491 src1 = get_true_reg (&XEXP (pat_src, 0)); 1492 src2 = get_true_reg (&XEXP (pat_src, 1)); 1493 1494 /* We will fix any death note later. */ 1495 1496 if (STACK_REG_P (*src1)) 1497 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1498 else 1499 src1_note = NULL_RTX; 1500 if (STACK_REG_P (*src2)) 1501 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1502 else 1503 src2_note = NULL_RTX; 1504 1505 /* If either operand is not a stack register, then the dest 1506 must be top of stack. */ 1507 1508 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1509 emit_swap_insn (insn, regstack, *dest); 1510 else 1511 { 1512 /* Both operands are REG. If neither operand is already 1513 at the top of stack, choose to make the one that is the dest 1514 the new top of stack. */ 1515 1516 int src1_hard_regnum, src2_hard_regnum; 1517 1518 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1519 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1520 gcc_assert (src1_hard_regnum != -1); 1521 gcc_assert (src2_hard_regnum != -1); 1522 1523 if (src1_hard_regnum != FIRST_STACK_REG 1524 && src2_hard_regnum != FIRST_STACK_REG) 1525 emit_swap_insn (insn, regstack, *dest); 1526 } 1527 1528 if (STACK_REG_P (*src1)) 1529 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1530 if (STACK_REG_P (*src2)) 1531 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1532 1533 if (src1_note) 1534 { 1535 rtx src1_reg = XEXP (src1_note, 0); 1536 1537 /* If the register that dies is at the top of stack, then 1538 the destination is somewhere else - merely substitute it. 1539 But if the reg that dies is not at top of stack, then 1540 move the top of stack to the dead reg, as though we had 1541 done the insn and then a store-with-pop. */ 1542 1543 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1544 { 1545 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1546 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1547 } 1548 else 1549 { 1550 int regno = get_hard_regnum (regstack, src1_reg); 1551 1552 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1553 replace_reg (dest, regno); 1554 1555 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1556 = regstack->reg[regstack->top]; 1557 } 1558 1559 CLEAR_HARD_REG_BIT (regstack->reg_set, 1560 REGNO (XEXP (src1_note, 0))); 1561 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1562 regstack->top--; 1563 } 1564 else if (src2_note) 1565 { 1566 rtx src2_reg = XEXP (src2_note, 0); 1567 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1568 { 1569 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1570 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1571 } 1572 else 1573 { 1574 int regno = get_hard_regnum (regstack, src2_reg); 1575 1576 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1577 replace_reg (dest, regno); 1578 1579 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1580 = regstack->reg[regstack->top]; 1581 } 1582 1583 CLEAR_HARD_REG_BIT (regstack->reg_set, 1584 REGNO (XEXP (src2_note, 0))); 1585 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1586 regstack->top--; 1587 } 1588 else 1589 { 1590 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1591 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1592 } 1593 1594 /* Keep operand 1 matching with destination. */ 1595 if (COMMUTATIVE_ARITH_P (pat_src) 1596 && REG_P (*src1) && REG_P (*src2) 1597 && REGNO (*src1) != REGNO (*dest)) 1598 { 1599 int tmp = REGNO (*src1); 1600 replace_reg (src1, REGNO (*src2)); 1601 replace_reg (src2, tmp); 1602 } 1603 break; 1604 1605 case UNSPEC: 1606 switch (XINT (pat_src, 1)) 1607 { 1608 case UNSPEC_FIST: 1609 1610 case UNSPEC_FIST_FLOOR: 1611 case UNSPEC_FIST_CEIL: 1612 1613 /* These insns only operate on the top of the stack. */ 1614 1615 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1616 emit_swap_insn (insn, regstack, *src1); 1617 1618 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1619 1620 if (STACK_REG_P (*dest)) 1621 replace_reg (dest, FIRST_STACK_REG); 1622 1623 if (src1_note) 1624 { 1625 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1626 regstack->top--; 1627 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1628 } 1629 1630 replace_reg (src1, FIRST_STACK_REG); 1631 break; 1632 1633 case UNSPEC_SIN: 1634 case UNSPEC_COS: 1635 case UNSPEC_FRNDINT: 1636 case UNSPEC_F2XM1: 1637 1638 case UNSPEC_FRNDINT_FLOOR: 1639 case UNSPEC_FRNDINT_CEIL: 1640 case UNSPEC_FRNDINT_TRUNC: 1641 case UNSPEC_FRNDINT_MASK_PM: 1642 1643 /* These insns only operate on the top of the stack. */ 1644 1645 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1646 1647 emit_swap_insn (insn, regstack, *src1); 1648 1649 /* Input should never die, it is 1650 replaced with output. */ 1651 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1652 gcc_assert (!src1_note); 1653 1654 if (STACK_REG_P (*dest)) 1655 replace_reg (dest, FIRST_STACK_REG); 1656 1657 replace_reg (src1, FIRST_STACK_REG); 1658 break; 1659 1660 case UNSPEC_FPATAN: 1661 case UNSPEC_FYL2X: 1662 case UNSPEC_FYL2XP1: 1663 /* These insns operate on the top two stack slots. */ 1664 1665 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1666 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1667 1668 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1669 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1670 1671 swap_to_top (insn, regstack, *src1, *src2); 1672 1673 replace_reg (src1, FIRST_STACK_REG); 1674 replace_reg (src2, FIRST_STACK_REG + 1); 1675 1676 if (src1_note) 1677 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1678 if (src2_note) 1679 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1680 1681 /* Pop both input operands from the stack. */ 1682 CLEAR_HARD_REG_BIT (regstack->reg_set, 1683 regstack->reg[regstack->top]); 1684 CLEAR_HARD_REG_BIT (regstack->reg_set, 1685 regstack->reg[regstack->top - 1]); 1686 regstack->top -= 2; 1687 1688 /* Push the result back onto the stack. */ 1689 regstack->reg[++regstack->top] = REGNO (*dest); 1690 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1691 replace_reg (dest, FIRST_STACK_REG); 1692 break; 1693 1694 case UNSPEC_FSCALE_FRACT: 1695 case UNSPEC_FPREM_F: 1696 case UNSPEC_FPREM1_F: 1697 /* These insns operate on the top two stack slots. 1698 first part of double input, double output insn. */ 1699 1700 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1701 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1702 1703 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1704 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1705 1706 /* Inputs should never die, they are 1707 replaced with outputs. */ 1708 gcc_assert (!src1_note); 1709 gcc_assert (!src2_note); 1710 1711 swap_to_top (insn, regstack, *src1, *src2); 1712 1713 /* Push the result back onto stack. Empty stack slot 1714 will be filled in second part of insn. */ 1715 if (STACK_REG_P (*dest)) { 1716 regstack->reg[regstack->top] = REGNO (*dest); 1717 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1718 replace_reg (dest, FIRST_STACK_REG); 1719 } 1720 1721 replace_reg (src1, FIRST_STACK_REG); 1722 replace_reg (src2, FIRST_STACK_REG + 1); 1723 break; 1724 1725 case UNSPEC_FSCALE_EXP: 1726 case UNSPEC_FPREM_U: 1727 case UNSPEC_FPREM1_U: 1728 /* These insns operate on the top two stack slots./ 1729 second part of double input, double output insn. */ 1730 1731 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1732 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1733 1734 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1735 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1736 1737 /* Inputs should never die, they are 1738 replaced with outputs. */ 1739 gcc_assert (!src1_note); 1740 gcc_assert (!src2_note); 1741 1742 swap_to_top (insn, regstack, *src1, *src2); 1743 1744 /* Push the result back onto stack. Fill empty slot from 1745 first part of insn and fix top of stack pointer. */ 1746 if (STACK_REG_P (*dest)) { 1747 regstack->reg[regstack->top - 1] = REGNO (*dest); 1748 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1749 replace_reg (dest, FIRST_STACK_REG + 1); 1750 } 1751 1752 replace_reg (src1, FIRST_STACK_REG); 1753 replace_reg (src2, FIRST_STACK_REG + 1); 1754 break; 1755 1756 case UNSPEC_SINCOS_COS: 1757 case UNSPEC_TAN_ONE: 1758 case UNSPEC_XTRACT_FRACT: 1759 /* These insns operate on the top two stack slots, 1760 first part of one input, double output insn. */ 1761 1762 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1763 1764 emit_swap_insn (insn, regstack, *src1); 1765 1766 /* Input should never die, it is 1767 replaced with output. */ 1768 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1769 gcc_assert (!src1_note); 1770 1771 /* Push the result back onto stack. Empty stack slot 1772 will be filled in second part of insn. */ 1773 if (STACK_REG_P (*dest)) { 1774 regstack->reg[regstack->top + 1] = REGNO (*dest); 1775 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1776 replace_reg (dest, FIRST_STACK_REG); 1777 } 1778 1779 replace_reg (src1, FIRST_STACK_REG); 1780 break; 1781 1782 case UNSPEC_SINCOS_SIN: 1783 case UNSPEC_TAN_TAN: 1784 case UNSPEC_XTRACT_EXP: 1785 /* These insns operate on the top two stack slots, 1786 second part of one input, double output insn. */ 1787 1788 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1789 1790 emit_swap_insn (insn, regstack, *src1); 1791 1792 /* Input should never die, it is 1793 replaced with output. */ 1794 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1795 gcc_assert (!src1_note); 1796 1797 /* Push the result back onto stack. Fill empty slot from 1798 first part of insn and fix top of stack pointer. */ 1799 if (STACK_REG_P (*dest)) { 1800 regstack->reg[regstack->top] = REGNO (*dest); 1801 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1802 replace_reg (dest, FIRST_STACK_REG + 1); 1803 1804 regstack->top++; 1805 } 1806 1807 replace_reg (src1, FIRST_STACK_REG); 1808 break; 1809 1810 case UNSPEC_SAHF: 1811 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1812 The combination matches the PPRO fcomi instruction. */ 1813 1814 pat_src = XVECEXP (pat_src, 0, 0); 1815 gcc_assert (GET_CODE (pat_src) == UNSPEC); 1816 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); 1817 /* Fall through. */ 1818 1819 case UNSPEC_FNSTSW: 1820 /* Combined fcomp+fnstsw generated for doing well with 1821 CSE. When optimizing this would have been broken 1822 up before now. */ 1823 1824 pat_src = XVECEXP (pat_src, 0, 0); 1825 gcc_assert (GET_CODE (pat_src) == COMPARE); 1826 1827 compare_for_stack_reg (insn, regstack, pat_src); 1828 break; 1829 1830 default: 1831 gcc_unreachable (); 1832 } 1833 break; 1834 1835 case IF_THEN_ELSE: 1836 /* This insn requires the top of stack to be the destination. */ 1837 1838 src1 = get_true_reg (&XEXP (pat_src, 1)); 1839 src2 = get_true_reg (&XEXP (pat_src, 2)); 1840 1841 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1842 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1843 1844 /* If the comparison operator is an FP comparison operator, 1845 it is handled correctly by compare_for_stack_reg () who 1846 will move the destination to the top of stack. But if the 1847 comparison operator is not an FP comparison operator, we 1848 have to handle it here. */ 1849 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1850 && REGNO (*dest) != regstack->reg[regstack->top]) 1851 { 1852 /* In case one of operands is the top of stack and the operands 1853 dies, it is safe to make it the destination operand by 1854 reversing the direction of cmove and avoid fxch. */ 1855 if ((REGNO (*src1) == regstack->reg[regstack->top] 1856 && src1_note) 1857 || (REGNO (*src2) == regstack->reg[regstack->top] 1858 && src2_note)) 1859 { 1860 int idx1 = (get_hard_regnum (regstack, *src1) 1861 - FIRST_STACK_REG); 1862 int idx2 = (get_hard_regnum (regstack, *src2) 1863 - FIRST_STACK_REG); 1864 1865 /* Make reg-stack believe that the operands are already 1866 swapped on the stack */ 1867 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1868 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1869 1870 /* Reverse condition to compensate the operand swap. 1871 i386 do have comparison always reversible. */ 1872 PUT_CODE (XEXP (pat_src, 0), 1873 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1874 } 1875 else 1876 emit_swap_insn (insn, regstack, *dest); 1877 } 1878 1879 { 1880 rtx src_note [3]; 1881 int i; 1882 1883 src_note[0] = 0; 1884 src_note[1] = src1_note; 1885 src_note[2] = src2_note; 1886 1887 if (STACK_REG_P (*src1)) 1888 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1889 if (STACK_REG_P (*src2)) 1890 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1891 1892 for (i = 1; i <= 2; i++) 1893 if (src_note [i]) 1894 { 1895 int regno = REGNO (XEXP (src_note[i], 0)); 1896 1897 /* If the register that dies is not at the top of 1898 stack, then move the top of stack to the dead reg. 1899 Top of stack should never die, as it is the 1900 destination. */ 1901 gcc_assert (regno != regstack->reg[regstack->top]); 1902 remove_regno_note (insn, REG_DEAD, regno); 1903 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1904 EMIT_AFTER); 1905 } 1906 } 1907 1908 /* Make dest the top of stack. Add dest to regstack if 1909 not present. */ 1910 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1911 regstack->reg[++regstack->top] = REGNO (*dest); 1912 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1913 replace_reg (dest, FIRST_STACK_REG); 1914 break; 1915 1916 default: 1917 gcc_unreachable (); 1918 } 1919 break; 1920 } 1921 1922 default: 1923 break; 1924 } 1925 1926 return control_flow_insn_deleted; 1927} 1928 1929/* Substitute hard regnums for any stack regs in INSN, which has 1930 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1931 before the insn, and is updated with changes made here. 1932 1933 There are several requirements and assumptions about the use of 1934 stack-like regs in asm statements. These rules are enforced by 1935 record_asm_stack_regs; see comments there for details. Any 1936 asm_operands left in the RTL at this point may be assume to meet the 1937 requirements, since record_asm_stack_regs removes any problem asm. */ 1938 1939static void 1940subst_asm_stack_regs (rtx insn, stack regstack) 1941{ 1942 rtx body = PATTERN (insn); 1943 int alt; 1944 1945 rtx *note_reg; /* Array of note contents */ 1946 rtx **note_loc; /* Address of REG field of each note */ 1947 enum reg_note *note_kind; /* The type of each note */ 1948 1949 rtx *clobber_reg = 0; 1950 rtx **clobber_loc = 0; 1951 1952 struct stack_def temp_stack; 1953 int n_notes; 1954 int n_clobbers; 1955 rtx note; 1956 int i; 1957 int n_inputs, n_outputs; 1958 1959 if (! check_asm_stack_operands (insn)) 1960 return; 1961 1962 /* Find out what the constraints required. If no constraint 1963 alternative matches, that is a compiler bug: we should have caught 1964 such an insn in check_asm_stack_operands. */ 1965 extract_insn (insn); 1966 constrain_operands (1); 1967 alt = which_alternative; 1968 1969 preprocess_constraints (); 1970 1971 n_inputs = get_asm_operand_n_inputs (body); 1972 n_outputs = recog_data.n_operands - n_inputs; 1973 1974 gcc_assert (alt >= 0); 1975 1976 /* Strip SUBREGs here to make the following code simpler. */ 1977 for (i = 0; i < recog_data.n_operands; i++) 1978 if (GET_CODE (recog_data.operand[i]) == SUBREG 1979 && REG_P (SUBREG_REG (recog_data.operand[i]))) 1980 { 1981 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1982 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1983 } 1984 1985 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1986 1987 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1988 i++; 1989 1990 note_reg = alloca (i * sizeof (rtx)); 1991 note_loc = alloca (i * sizeof (rtx *)); 1992 note_kind = alloca (i * sizeof (enum reg_note)); 1993 1994 n_notes = 0; 1995 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1996 { 1997 rtx reg = XEXP (note, 0); 1998 rtx *loc = & XEXP (note, 0); 1999 2000 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2001 { 2002 loc = & SUBREG_REG (reg); 2003 reg = SUBREG_REG (reg); 2004 } 2005 2006 if (STACK_REG_P (reg) 2007 && (REG_NOTE_KIND (note) == REG_DEAD 2008 || REG_NOTE_KIND (note) == REG_UNUSED)) 2009 { 2010 note_reg[n_notes] = reg; 2011 note_loc[n_notes] = loc; 2012 note_kind[n_notes] = REG_NOTE_KIND (note); 2013 n_notes++; 2014 } 2015 } 2016 2017 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2018 2019 n_clobbers = 0; 2020 2021 if (GET_CODE (body) == PARALLEL) 2022 { 2023 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 2024 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *)); 2025 2026 for (i = 0; i < XVECLEN (body, 0); i++) 2027 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2028 { 2029 rtx clobber = XVECEXP (body, 0, i); 2030 rtx reg = XEXP (clobber, 0); 2031 rtx *loc = & XEXP (clobber, 0); 2032 2033 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) 2034 { 2035 loc = & SUBREG_REG (reg); 2036 reg = SUBREG_REG (reg); 2037 } 2038 2039 if (STACK_REG_P (reg)) 2040 { 2041 clobber_reg[n_clobbers] = reg; 2042 clobber_loc[n_clobbers] = loc; 2043 n_clobbers++; 2044 } 2045 } 2046 } 2047 2048 temp_stack = *regstack; 2049 2050 /* Put the input regs into the desired place in TEMP_STACK. */ 2051 2052 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2053 if (STACK_REG_P (recog_data.operand[i]) 2054 && reg_class_subset_p (recog_op_alt[i][alt].cl, 2055 FLOAT_REGS) 2056 && recog_op_alt[i][alt].cl != FLOAT_REGS) 2057 { 2058 /* If an operand needs to be in a particular reg in 2059 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2060 these constraints are for single register classes, and 2061 reload guaranteed that operand[i] is already in that class, 2062 we can just use REGNO (recog_data.operand[i]) to know which 2063 actual reg this operand needs to be in. */ 2064 2065 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2066 2067 gcc_assert (regno >= 0); 2068 2069 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2070 { 2071 /* recog_data.operand[i] is not in the right place. Find 2072 it and swap it with whatever is already in I's place. 2073 K is where recog_data.operand[i] is now. J is where it 2074 should be. */ 2075 int j, k, temp; 2076 2077 k = temp_stack.top - (regno - FIRST_STACK_REG); 2078 j = (temp_stack.top 2079 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2080 2081 temp = temp_stack.reg[k]; 2082 temp_stack.reg[k] = temp_stack.reg[j]; 2083 temp_stack.reg[j] = temp; 2084 } 2085 } 2086 2087 /* Emit insns before INSN to make sure the reg-stack is in the right 2088 order. */ 2089 2090 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2091 2092 /* Make the needed input register substitutions. Do death notes and 2093 clobbers too, because these are for inputs, not outputs. */ 2094 2095 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2096 if (STACK_REG_P (recog_data.operand[i])) 2097 { 2098 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2099 2100 gcc_assert (regnum >= 0); 2101 2102 replace_reg (recog_data.operand_loc[i], regnum); 2103 } 2104 2105 for (i = 0; i < n_notes; i++) 2106 if (note_kind[i] == REG_DEAD) 2107 { 2108 int regnum = get_hard_regnum (regstack, note_reg[i]); 2109 2110 gcc_assert (regnum >= 0); 2111 2112 replace_reg (note_loc[i], regnum); 2113 } 2114 2115 for (i = 0; i < n_clobbers; i++) 2116 { 2117 /* It's OK for a CLOBBER to reference a reg that is not live. 2118 Don't try to replace it in that case. */ 2119 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2120 2121 if (regnum >= 0) 2122 { 2123 /* Sigh - clobbers always have QImode. But replace_reg knows 2124 that these regs can't be MODE_INT and will assert. Just put 2125 the right reg there without calling replace_reg. */ 2126 2127 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2128 } 2129 } 2130 2131 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2132 2133 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2134 if (STACK_REG_P (recog_data.operand[i])) 2135 { 2136 /* An input reg is implicitly popped if it is tied to an 2137 output, or if there is a CLOBBER for it. */ 2138 int j; 2139 2140 for (j = 0; j < n_clobbers; j++) 2141 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2142 break; 2143 2144 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2145 { 2146 /* recog_data.operand[i] might not be at the top of stack. 2147 But that's OK, because all we need to do is pop the 2148 right number of regs off of the top of the reg-stack. 2149 record_asm_stack_regs guaranteed that all implicitly 2150 popped regs were grouped at the top of the reg-stack. */ 2151 2152 CLEAR_HARD_REG_BIT (regstack->reg_set, 2153 regstack->reg[regstack->top]); 2154 regstack->top--; 2155 } 2156 } 2157 2158 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2159 Note that there isn't any need to substitute register numbers. 2160 ??? Explain why this is true. */ 2161 2162 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2163 { 2164 /* See if there is an output for this hard reg. */ 2165 int j; 2166 2167 for (j = 0; j < n_outputs; j++) 2168 if (STACK_REG_P (recog_data.operand[j]) 2169 && REGNO (recog_data.operand[j]) == (unsigned) i) 2170 { 2171 regstack->reg[++regstack->top] = i; 2172 SET_HARD_REG_BIT (regstack->reg_set, i); 2173 break; 2174 } 2175 } 2176 2177 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2178 input that the asm didn't implicitly pop. If the asm didn't 2179 implicitly pop an input reg, that reg will still be live. 2180 2181 Note that we can't use find_regno_note here: the register numbers 2182 in the death notes have already been substituted. */ 2183 2184 for (i = 0; i < n_outputs; i++) 2185 if (STACK_REG_P (recog_data.operand[i])) 2186 { 2187 int j; 2188 2189 for (j = 0; j < n_notes; j++) 2190 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2191 && note_kind[j] == REG_UNUSED) 2192 { 2193 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2194 EMIT_AFTER); 2195 break; 2196 } 2197 } 2198 2199 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2200 if (STACK_REG_P (recog_data.operand[i])) 2201 { 2202 int j; 2203 2204 for (j = 0; j < n_notes; j++) 2205 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2206 && note_kind[j] == REG_DEAD 2207 && TEST_HARD_REG_BIT (regstack->reg_set, 2208 REGNO (recog_data.operand[i]))) 2209 { 2210 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2211 EMIT_AFTER); 2212 break; 2213 } 2214 } 2215} 2216 2217/* Substitute stack hard reg numbers for stack virtual registers in 2218 INSN. Non-stack register numbers are not changed. REGSTACK is the 2219 current stack content. Insns may be emitted as needed to arrange the 2220 stack for the 387 based on the contents of the insn. Return whether 2221 a control flow insn was deleted in the process. */ 2222 2223static bool 2224subst_stack_regs (rtx insn, stack regstack) 2225{ 2226 rtx *note_link, note; 2227 bool control_flow_insn_deleted = false; 2228 int i; 2229 2230 if (CALL_P (insn)) 2231 { 2232 int top = regstack->top; 2233 2234 /* If there are any floating point parameters to be passed in 2235 registers for this call, make sure they are in the right 2236 order. */ 2237 2238 if (top >= 0) 2239 { 2240 straighten_stack (insn, regstack); 2241 2242 /* Now mark the arguments as dead after the call. */ 2243 2244 while (regstack->top >= 0) 2245 { 2246 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2247 regstack->top--; 2248 } 2249 } 2250 } 2251 2252 /* Do the actual substitution if any stack regs are mentioned. 2253 Since we only record whether entire insn mentions stack regs, and 2254 subst_stack_regs_pat only works for patterns that contain stack regs, 2255 we must check each pattern in a parallel here. A call_value_pop could 2256 fail otherwise. */ 2257 2258 if (stack_regs_mentioned (insn)) 2259 { 2260 int n_operands = asm_noperands (PATTERN (insn)); 2261 if (n_operands >= 0) 2262 { 2263 /* This insn is an `asm' with operands. Decode the operands, 2264 decide how many are inputs, and do register substitution. 2265 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2266 2267 subst_asm_stack_regs (insn, regstack); 2268 return control_flow_insn_deleted; 2269 } 2270 2271 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2272 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2273 { 2274 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2275 { 2276 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 2277 XVECEXP (PATTERN (insn), 0, i) 2278 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); 2279 control_flow_insn_deleted 2280 |= subst_stack_regs_pat (insn, regstack, 2281 XVECEXP (PATTERN (insn), 0, i)); 2282 } 2283 } 2284 else 2285 control_flow_insn_deleted 2286 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2287 } 2288 2289 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2290 REG_UNUSED will already have been dealt with, so just return. */ 2291 2292 if (NOTE_P (insn) || INSN_DELETED_P (insn)) 2293 return control_flow_insn_deleted; 2294 2295 /* If this a noreturn call, we can't insert pop insns after it. 2296 Instead, reset the stack state to empty. */ 2297 if (CALL_P (insn) 2298 && find_reg_note (insn, REG_NORETURN, NULL)) 2299 { 2300 regstack->top = -1; 2301 CLEAR_HARD_REG_SET (regstack->reg_set); 2302 return control_flow_insn_deleted; 2303 } 2304 2305 /* If there is a REG_UNUSED note on a stack register on this insn, 2306 the indicated reg must be popped. The REG_UNUSED note is removed, 2307 since the form of the newly emitted pop insn references the reg, 2308 making it no longer `unset'. */ 2309 2310 note_link = ®_NOTES (insn); 2311 for (note = *note_link; note; note = XEXP (note, 1)) 2312 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2313 { 2314 *note_link = XEXP (note, 1); 2315 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2316 } 2317 else 2318 note_link = &XEXP (note, 1); 2319 2320 return control_flow_insn_deleted; 2321} 2322 2323/* Change the organization of the stack so that it fits a new basic 2324 block. Some registers might have to be popped, but there can never be 2325 a register live in the new block that is not now live. 2326 2327 Insert any needed insns before or after INSN, as indicated by 2328 WHERE. OLD is the original stack layout, and NEW is the desired 2329 form. OLD is updated to reflect the code emitted, i.e., it will be 2330 the same as NEW upon return. 2331 2332 This function will not preserve block_end[]. But that information 2333 is no longer needed once this has executed. */ 2334 2335static void 2336change_stack (rtx insn, stack old, stack new, enum emit_where where) 2337{ 2338 int reg; 2339 int update_end = 0; 2340 2341 /* Stack adjustments for the first insn in a block update the 2342 current_block's stack_in instead of inserting insns directly. 2343 compensate_edges will add the necessary code later. */ 2344 if (current_block 2345 && starting_stack_p 2346 && where == EMIT_BEFORE) 2347 { 2348 BLOCK_INFO (current_block)->stack_in = *new; 2349 starting_stack_p = false; 2350 *old = *new; 2351 return; 2352 } 2353 2354 /* We will be inserting new insns "backwards". If we are to insert 2355 after INSN, find the next insn, and insert before it. */ 2356 2357 if (where == EMIT_AFTER) 2358 { 2359 if (current_block && BB_END (current_block) == insn) 2360 update_end = 1; 2361 insn = NEXT_INSN (insn); 2362 } 2363 2364 /* Pop any registers that are not needed in the new block. */ 2365 2366 /* If the destination block's stack already has a specified layout 2367 and contains two or more registers, use a more intelligent algorithm 2368 to pop registers that minimizes the number number of fxchs below. */ 2369 if (new->top > 0) 2370 { 2371 bool slots[REG_STACK_SIZE]; 2372 int pops[REG_STACK_SIZE]; 2373 int next, dest, topsrc; 2374 2375 /* First pass to determine the free slots. */ 2376 for (reg = 0; reg <= new->top; reg++) 2377 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]); 2378 2379 /* Second pass to allocate preferred slots. */ 2380 topsrc = -1; 2381 for (reg = old->top; reg > new->top; reg--) 2382 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2383 { 2384 dest = -1; 2385 for (next = 0; next <= new->top; next++) 2386 if (!slots[next] && new->reg[next] == old->reg[reg]) 2387 { 2388 /* If this is a preference for the new top of stack, record 2389 the fact by remembering it's old->reg in topsrc. */ 2390 if (next == new->top) 2391 topsrc = reg; 2392 slots[next] = true; 2393 dest = next; 2394 break; 2395 } 2396 pops[reg] = dest; 2397 } 2398 else 2399 pops[reg] = reg; 2400 2401 /* Intentionally, avoid placing the top of stack in it's correct 2402 location, if we still need to permute the stack below and we 2403 can usefully place it somewhere else. This is the case if any 2404 slot is still unallocated, in which case we should place the 2405 top of stack there. */ 2406 if (topsrc != -1) 2407 for (reg = 0; reg < new->top; reg++) 2408 if (!slots[reg]) 2409 { 2410 pops[topsrc] = reg; 2411 slots[new->top] = false; 2412 slots[reg] = true; 2413 break; 2414 } 2415 2416 /* Third pass allocates remaining slots and emits pop insns. */ 2417 next = new->top; 2418 for (reg = old->top; reg > new->top; reg--) 2419 { 2420 dest = pops[reg]; 2421 if (dest == -1) 2422 { 2423 /* Find next free slot. */ 2424 while (slots[next]) 2425 next--; 2426 dest = next--; 2427 } 2428 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), 2429 EMIT_BEFORE); 2430 } 2431 } 2432 else 2433 { 2434 /* The following loop attempts to maximize the number of times we 2435 pop the top of the stack, as this permits the use of the faster 2436 ffreep instruction on platforms that support it. */ 2437 int live, next; 2438 2439 live = 0; 2440 for (reg = 0; reg <= old->top; reg++) 2441 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2442 live++; 2443 2444 next = live; 2445 while (old->top >= live) 2446 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top])) 2447 { 2448 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next])) 2449 next--; 2450 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), 2451 EMIT_BEFORE); 2452 } 2453 else 2454 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), 2455 EMIT_BEFORE); 2456 } 2457 2458 if (new->top == -2) 2459 { 2460 /* If the new block has never been processed, then it can inherit 2461 the old stack order. */ 2462 2463 new->top = old->top; 2464 memcpy (new->reg, old->reg, sizeof (new->reg)); 2465 } 2466 else 2467 { 2468 /* This block has been entered before, and we must match the 2469 previously selected stack order. */ 2470 2471 /* By now, the only difference should be the order of the stack, 2472 not their depth or liveliness. */ 2473 2474 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2475 gcc_unreachable (); 2476 win: 2477 gcc_assert (old->top == new->top); 2478 2479 /* If the stack is not empty (new->top != -1), loop here emitting 2480 swaps until the stack is correct. 2481 2482 The worst case number of swaps emitted is N + 2, where N is the 2483 depth of the stack. In some cases, the reg at the top of 2484 stack may be correct, but swapped anyway in order to fix 2485 other regs. But since we never swap any other reg away from 2486 its correct slot, this algorithm will converge. */ 2487 2488 if (new->top != -1) 2489 do 2490 { 2491 /* Swap the reg at top of stack into the position it is 2492 supposed to be in, until the correct top of stack appears. */ 2493 2494 while (old->reg[old->top] != new->reg[new->top]) 2495 { 2496 for (reg = new->top; reg >= 0; reg--) 2497 if (new->reg[reg] == old->reg[old->top]) 2498 break; 2499 2500 gcc_assert (reg != -1); 2501 2502 emit_swap_insn (insn, old, 2503 FP_MODE_REG (old->reg[reg], DFmode)); 2504 } 2505 2506 /* See if any regs remain incorrect. If so, bring an 2507 incorrect reg to the top of stack, and let the while loop 2508 above fix it. */ 2509 2510 for (reg = new->top; reg >= 0; reg--) 2511 if (new->reg[reg] != old->reg[reg]) 2512 { 2513 emit_swap_insn (insn, old, 2514 FP_MODE_REG (old->reg[reg], DFmode)); 2515 break; 2516 } 2517 } while (reg >= 0); 2518 2519 /* At this point there must be no differences. */ 2520 2521 for (reg = old->top; reg >= 0; reg--) 2522 gcc_assert (old->reg[reg] == new->reg[reg]); 2523 } 2524 2525 if (update_end) 2526 BB_END (current_block) = PREV_INSN (insn); 2527} 2528 2529/* Print stack configuration. */ 2530 2531static void 2532print_stack (FILE *file, stack s) 2533{ 2534 if (! file) 2535 return; 2536 2537 if (s->top == -2) 2538 fprintf (file, "uninitialized\n"); 2539 else if (s->top == -1) 2540 fprintf (file, "empty\n"); 2541 else 2542 { 2543 int i; 2544 fputs ("[ ", file); 2545 for (i = 0; i <= s->top; ++i) 2546 fprintf (file, "%d ", s->reg[i]); 2547 fputs ("]\n", file); 2548 } 2549} 2550 2551/* This function was doing life analysis. We now let the regular live 2552 code do it's job, so we only need to check some extra invariants 2553 that reg-stack expects. Primary among these being that all registers 2554 are initialized before use. 2555 2556 The function returns true when code was emitted to CFG edges and 2557 commit_edge_insertions needs to be called. */ 2558 2559static int 2560convert_regs_entry (void) 2561{ 2562 int inserted = 0; 2563 edge e; 2564 edge_iterator ei; 2565 2566 /* Load something into each stack register live at function entry. 2567 Such live registers can be caused by uninitialized variables or 2568 functions not returning values on all paths. In order to keep 2569 the push/pop code happy, and to not scrog the register stack, we 2570 must put something in these registers. Use a QNaN. 2571 2572 Note that we are inserting converted code here. This code is 2573 never seen by the convert_regs pass. */ 2574 2575 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 2576 { 2577 basic_block block = e->dest; 2578 block_info bi = BLOCK_INFO (block); 2579 int reg, top = -1; 2580 2581 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2582 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2583 { 2584 rtx init; 2585 2586 bi->stack_in.reg[++top] = reg; 2587 2588 init = gen_rtx_SET (VOIDmode, 2589 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2590 not_a_num); 2591 insert_insn_on_edge (init, e); 2592 inserted = 1; 2593 } 2594 2595 bi->stack_in.top = top; 2596 } 2597 2598 return inserted; 2599} 2600 2601/* Construct the desired stack for function exit. This will either 2602 be `empty', or the function return value at top-of-stack. */ 2603 2604static void 2605convert_regs_exit (void) 2606{ 2607 int value_reg_low, value_reg_high; 2608 stack output_stack; 2609 rtx retvalue; 2610 2611 retvalue = stack_result (current_function_decl); 2612 value_reg_low = value_reg_high = -1; 2613 if (retvalue) 2614 { 2615 value_reg_low = REGNO (retvalue); 2616 value_reg_high = value_reg_low 2617 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1; 2618 } 2619 2620 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2621 if (value_reg_low == -1) 2622 output_stack->top = -1; 2623 else 2624 { 2625 int reg; 2626 2627 output_stack->top = value_reg_high - value_reg_low; 2628 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2629 { 2630 output_stack->reg[value_reg_high - reg] = reg; 2631 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2632 } 2633 } 2634} 2635 2636/* Copy the stack info from the end of edge E's source block to the 2637 start of E's destination block. */ 2638 2639static void 2640propagate_stack (edge e) 2641{ 2642 stack src_stack = &BLOCK_INFO (e->src)->stack_out; 2643 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in; 2644 int reg; 2645 2646 /* Preserve the order of the original stack, but check whether 2647 any pops are needed. */ 2648 dest_stack->top = -1; 2649 for (reg = 0; reg <= src_stack->top; ++reg) 2650 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) 2651 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; 2652} 2653 2654 2655/* Adjust the stack of edge E's source block on exit to match the stack 2656 of it's target block upon input. The stack layouts of both blocks 2657 should have been defined by now. */ 2658 2659static bool 2660compensate_edge (edge e) 2661{ 2662 basic_block source = e->src, target = e->dest; 2663 stack target_stack = &BLOCK_INFO (target)->stack_in; 2664 stack source_stack = &BLOCK_INFO (source)->stack_out; 2665 struct stack_def regstack; 2666 int reg; 2667 2668 if (dump_file) 2669 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); 2670 2671 gcc_assert (target_stack->top != -2); 2672 2673 /* Check whether stacks are identical. */ 2674 if (target_stack->top == source_stack->top) 2675 { 2676 for (reg = target_stack->top; reg >= 0; --reg) 2677 if (target_stack->reg[reg] != source_stack->reg[reg]) 2678 break; 2679 2680 if (reg == -1) 2681 { 2682 if (dump_file) 2683 fprintf (dump_file, "no changes needed\n"); 2684 return false; 2685 } 2686 } 2687 2688 if (dump_file) 2689 { 2690 fprintf (dump_file, "correcting stack to "); 2691 print_stack (dump_file, target_stack); 2692 } 2693 2694 /* Abnormal calls may appear to have values live in st(0), but the 2695 abnormal return path will not have actually loaded the values. */ 2696 if (e->flags & EDGE_ABNORMAL_CALL) 2697 { 2698 /* Assert that the lifetimes are as we expect -- one value 2699 live at st(0) on the end of the source block, and no 2700 values live at the beginning of the destination block. 2701 For complex return values, we may have st(1) live as well. */ 2702 gcc_assert (source_stack->top == 0 || source_stack->top == 1); 2703 gcc_assert (target_stack->top == -1); 2704 return false; 2705 } 2706 2707 /* Handle non-call EH edges specially. The normal return path have 2708 values in registers. These will be popped en masse by the unwind 2709 library. */ 2710 if (e->flags & EDGE_EH) 2711 { 2712 gcc_assert (target_stack->top == -1); 2713 return false; 2714 } 2715 2716 /* We don't support abnormal edges. Global takes care to 2717 avoid any live register across them, so we should never 2718 have to insert instructions on such edges. */ 2719 gcc_assert (! (e->flags & EDGE_ABNORMAL)); 2720 2721 /* Make a copy of source_stack as change_stack is destructive. */ 2722 regstack = *source_stack; 2723 2724 /* It is better to output directly to the end of the block 2725 instead of to the edge, because emit_swap can do minimal 2726 insn scheduling. We can do this when there is only one 2727 edge out, and it is not abnormal. */ 2728 if (EDGE_COUNT (source->succs) == 1) 2729 { 2730 current_block = source; 2731 change_stack (BB_END (source), ®stack, target_stack, 2732 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); 2733 } 2734 else 2735 { 2736 rtx seq, after; 2737 2738 current_block = NULL; 2739 start_sequence (); 2740 2741 /* ??? change_stack needs some point to emit insns after. */ 2742 after = emit_note (NOTE_INSN_DELETED); 2743 2744 change_stack (after, ®stack, target_stack, EMIT_BEFORE); 2745 2746 seq = get_insns (); 2747 end_sequence (); 2748 2749 insert_insn_on_edge (seq, e); 2750 return true; 2751 } 2752 return false; 2753} 2754 2755/* Traverse all non-entry edges in the CFG, and emit the necessary 2756 edge compensation code to change the stack from stack_out of the 2757 source block to the stack_in of the destination block. */ 2758 2759static bool 2760compensate_edges (void) 2761{ 2762 bool inserted = false; 2763 basic_block bb; 2764 2765 starting_stack_p = false; 2766 2767 FOR_EACH_BB (bb) 2768 if (bb != ENTRY_BLOCK_PTR) 2769 { 2770 edge e; 2771 edge_iterator ei; 2772 2773 FOR_EACH_EDGE (e, ei, bb->succs) 2774 inserted |= compensate_edge (e); 2775 } 2776 return inserted; 2777} 2778 2779/* Select the better of two edges E1 and E2 to use to determine the 2780 stack layout for their shared destination basic block. This is 2781 typically the more frequently executed. The edge E1 may be NULL 2782 (in which case E2 is returned), but E2 is always non-NULL. */ 2783 2784static edge 2785better_edge (edge e1, edge e2) 2786{ 2787 if (!e1) 2788 return e2; 2789 2790 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) 2791 return e1; 2792 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) 2793 return e2; 2794 2795 if (e1->count > e2->count) 2796 return e1; 2797 if (e1->count < e2->count) 2798 return e2; 2799 2800 /* Prefer critical edges to minimize inserting compensation code on 2801 critical edges. */ 2802 2803 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) 2804 return EDGE_CRITICAL_P (e1) ? e1 : e2; 2805 2806 /* Avoid non-deterministic behavior. */ 2807 return (e1->src->index < e2->src->index) ? e1 : e2; 2808} 2809 2810/* Convert stack register references in one block. */ 2811 2812static void 2813convert_regs_1 (basic_block block) 2814{ 2815 struct stack_def regstack; 2816 block_info bi = BLOCK_INFO (block); 2817 int reg; 2818 rtx insn, next; 2819 bool control_flow_insn_deleted = false; 2820 2821 any_malformed_asm = false; 2822 2823 /* Choose an initial stack layout, if one hasn't already been chosen. */ 2824 if (bi->stack_in.top == -2) 2825 { 2826 edge e, beste = NULL; 2827 edge_iterator ei; 2828 2829 /* Select the best incoming edge (typically the most frequent) to 2830 use as a template for this basic block. */ 2831 FOR_EACH_EDGE (e, ei, block->preds) 2832 if (BLOCK_INFO (e->src)->done) 2833 beste = better_edge (beste, e); 2834 2835 if (beste) 2836 propagate_stack (beste); 2837 else 2838 { 2839 /* No predecessors. Create an arbitrary input stack. */ 2840 bi->stack_in.top = -1; 2841 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2842 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2843 bi->stack_in.reg[++bi->stack_in.top] = reg; 2844 } 2845 } 2846 2847 if (dump_file) 2848 { 2849 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); 2850 print_stack (dump_file, &bi->stack_in); 2851 } 2852 2853 /* Process all insns in this block. Keep track of NEXT so that we 2854 don't process insns emitted while substituting in INSN. */ 2855 current_block = block; 2856 next = BB_HEAD (block); 2857 regstack = bi->stack_in; 2858 starting_stack_p = true; 2859 2860 do 2861 { 2862 insn = next; 2863 next = NEXT_INSN (insn); 2864 2865 /* Ensure we have not missed a block boundary. */ 2866 gcc_assert (next); 2867 if (insn == BB_END (block)) 2868 next = NULL; 2869 2870 /* Don't bother processing unless there is a stack reg 2871 mentioned or if it's a CALL_INSN. */ 2872 if (stack_regs_mentioned (insn) 2873 || CALL_P (insn)) 2874 { 2875 if (dump_file) 2876 { 2877 fprintf (dump_file, " insn %d input stack: ", 2878 INSN_UID (insn)); 2879 print_stack (dump_file, ®stack); 2880 } 2881 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2882 starting_stack_p = false; 2883 } 2884 } 2885 while (next); 2886 2887 if (dump_file) 2888 { 2889 fprintf (dump_file, "Expected live registers ["); 2890 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2891 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2892 fprintf (dump_file, " %d", reg); 2893 fprintf (dump_file, " ]\nOutput stack: "); 2894 print_stack (dump_file, ®stack); 2895 } 2896 2897 insn = BB_END (block); 2898 if (JUMP_P (insn)) 2899 insn = PREV_INSN (insn); 2900 2901 /* If the function is declared to return a value, but it returns one 2902 in only some cases, some registers might come live here. Emit 2903 necessary moves for them. */ 2904 2905 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2906 { 2907 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2908 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2909 { 2910 rtx set; 2911 2912 if (dump_file) 2913 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); 2914 2915 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); 2916 insn = emit_insn_after (set, insn); 2917 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2918 } 2919 } 2920 2921 /* Amongst the insns possibly deleted during the substitution process above, 2922 might have been the only trapping insn in the block. We purge the now 2923 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 2924 called at the end of convert_regs. The order in which we process the 2925 blocks ensures that we never delete an already processed edge. 2926 2927 Note that, at this point, the CFG may have been damaged by the emission 2928 of instructions after an abnormal call, which moves the basic block end 2929 (and is the reason why we call fixup_abnormal_edges later). So we must 2930 be sure that the trapping insn has been deleted before trying to purge 2931 dead edges, otherwise we risk purging valid edges. 2932 2933 ??? We are normally supposed not to delete trapping insns, so we pretend 2934 that the insns deleted above don't actually trap. It would have been 2935 better to detect this earlier and avoid creating the EH edge in the first 2936 place, still, but we don't have enough information at that time. */ 2937 2938 if (control_flow_insn_deleted) 2939 purge_dead_edges (block); 2940 2941 /* Something failed if the stack lives don't match. If we had malformed 2942 asms, we zapped the instruction itself, but that didn't produce the 2943 same pattern of register kills as before. */ 2944 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2945 gcc_assert (any_malformed_asm); 2946 win: 2947 bi->stack_out = regstack; 2948 bi->done = true; 2949} 2950 2951/* Convert registers in all blocks reachable from BLOCK. */ 2952 2953static void 2954convert_regs_2 (basic_block block) 2955{ 2956 basic_block *stack, *sp; 2957 2958 /* We process the blocks in a top-down manner, in a way such that one block 2959 is only processed after all its predecessors. The number of predecessors 2960 of every block has already been computed. */ 2961 2962 stack = XNEWVEC (basic_block, n_basic_blocks); 2963 sp = stack; 2964 2965 *sp++ = block; 2966 2967 do 2968 { 2969 edge e; 2970 edge_iterator ei; 2971 2972 block = *--sp; 2973 2974 /* Processing BLOCK is achieved by convert_regs_1, which may purge 2975 some dead EH outgoing edge after the deletion of the trapping 2976 insn inside the block. Since the number of predecessors of 2977 BLOCK's successors was computed based on the initial edge set, 2978 we check the necessity to process some of these successors 2979 before such an edge deletion may happen. However, there is 2980 a pitfall: if BLOCK is the only predecessor of a successor and 2981 the edge between them happens to be deleted, the successor 2982 becomes unreachable and should not be processed. The problem 2983 is that there is no way to preventively detect this case so we 2984 stack the successor in all cases and hand over the task of 2985 fixing up the discrepancy to convert_regs_1. */ 2986 2987 FOR_EACH_EDGE (e, ei, block->succs) 2988 if (! (e->flags & EDGE_DFS_BACK)) 2989 { 2990 BLOCK_INFO (e->dest)->predecessors--; 2991 if (!BLOCK_INFO (e->dest)->predecessors) 2992 *sp++ = e->dest; 2993 } 2994 2995 convert_regs_1 (block); 2996 } 2997 while (sp != stack); 2998 2999 free (stack); 3000} 3001 3002/* Traverse all basic blocks in a function, converting the register 3003 references in each insn from the "flat" register file that gcc uses, 3004 to the stack-like registers the 387 uses. */ 3005 3006static void 3007convert_regs (void) 3008{ 3009 int inserted; 3010 basic_block b; 3011 edge e; 3012 edge_iterator ei; 3013 3014 /* Initialize uninitialized registers on function entry. */ 3015 inserted = convert_regs_entry (); 3016 3017 /* Construct the desired stack for function exit. */ 3018 convert_regs_exit (); 3019 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 3020 3021 /* ??? Future: process inner loops first, and give them arbitrary 3022 initial stacks which emit_swap_insn can modify. This ought to 3023 prevent double fxch that often appears at the head of a loop. */ 3024 3025 /* Process all blocks reachable from all entry points. */ 3026 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) 3027 convert_regs_2 (e->dest); 3028 3029 /* ??? Process all unreachable blocks. Though there's no excuse 3030 for keeping these even when not optimizing. */ 3031 FOR_EACH_BB (b) 3032 { 3033 block_info bi = BLOCK_INFO (b); 3034 3035 if (! bi->done) 3036 convert_regs_2 (b); 3037 } 3038 3039 inserted |= compensate_edges (); 3040 3041 clear_aux_for_blocks (); 3042 3043 fixup_abnormal_edges (); 3044 if (inserted) 3045 commit_edge_insertions (); 3046 3047 if (dump_file) 3048 fputc ('\n', dump_file); 3049} 3050 3051/* Convert register usage from "flat" register file usage to a "stack 3052 register file. FILE is the dump file, if used. 3053 3054 Construct a CFG and run life analysis. Then convert each insn one 3055 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 3056 code duplication created when the converter inserts pop insns on 3057 the edges. */ 3058 3059static bool 3060reg_to_stack (void) 3061{ 3062 basic_block bb; 3063 int i; 3064 int max_uid; 3065 3066 /* Clean up previous run. */ 3067 if (stack_regs_mentioned_data != NULL) 3068 VEC_free (char, heap, stack_regs_mentioned_data); 3069 3070 /* See if there is something to do. Flow analysis is quite 3071 expensive so we might save some compilation time. */ 3072 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3073 if (regs_ever_live[i]) 3074 break; 3075 if (i > LAST_STACK_REG) 3076 return false; 3077 3078 /* Ok, floating point instructions exist. If not optimizing, 3079 build the CFG and run life analysis. 3080 Also need to rebuild life when superblock scheduling is done 3081 as it don't update liveness yet. */ 3082 if (!optimize 3083 || ((flag_sched2_use_superblocks || flag_sched2_use_traces) 3084 && flag_schedule_insns_after_reload)) 3085 { 3086 count_or_remove_death_notes (NULL, 1); 3087 life_analysis (PROP_DEATH_NOTES); 3088 } 3089 mark_dfs_back_edges (); 3090 3091 /* Set up block info for each basic block. */ 3092 alloc_aux_for_blocks (sizeof (struct block_info_def)); 3093 FOR_EACH_BB (bb) 3094 { 3095 block_info bi = BLOCK_INFO (bb); 3096 edge_iterator ei; 3097 edge e; 3098 int reg; 3099 3100 FOR_EACH_EDGE (e, ei, bb->preds) 3101 if (!(e->flags & EDGE_DFS_BACK) 3102 && e->src != ENTRY_BLOCK_PTR) 3103 bi->predecessors++; 3104 3105 /* Set current register status at last instruction `uninitialized'. */ 3106 bi->stack_in.top = -2; 3107 3108 /* Copy live_at_end and live_at_start into temporaries. */ 3109 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 3110 { 3111 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg)) 3112 SET_HARD_REG_BIT (bi->out_reg_set, reg); 3113 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg)) 3114 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 3115 } 3116 } 3117 3118 /* Create the replacement registers up front. */ 3119 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 3120 { 3121 enum machine_mode mode; 3122 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 3123 mode != VOIDmode; 3124 mode = GET_MODE_WIDER_MODE (mode)) 3125 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3126 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 3127 mode != VOIDmode; 3128 mode = GET_MODE_WIDER_MODE (mode)) 3129 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 3130 } 3131 3132 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 3133 3134 /* A QNaN for initializing uninitialized variables. 3135 3136 ??? We can't load from constant memory in PIC mode, because 3137 we're inserting these instructions before the prologue and 3138 the PIC register hasn't been set up. In that case, fall back 3139 on zero, which we can get from `ldz'. */ 3140 3141 if (flag_pic) 3142 not_a_num = CONST0_RTX (SFmode); 3143 else 3144 { 3145 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 3146 not_a_num = force_const_mem (SFmode, not_a_num); 3147 } 3148 3149 /* Allocate a cache for stack_regs_mentioned. */ 3150 max_uid = get_max_uid (); 3151 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1); 3152 memset (VEC_address (char, stack_regs_mentioned_data), 3153 0, sizeof (char) * max_uid + 1); 3154 3155 convert_regs (); 3156 3157 free_aux_for_blocks (); 3158 return true; 3159} 3160#endif /* STACK_REGS */ 3161 3162static bool 3163gate_handle_stack_regs (void) 3164{ 3165#ifdef STACK_REGS 3166 return 1; 3167#else 3168 return 0; 3169#endif 3170} 3171 3172/* Convert register usage from flat register file usage to a stack 3173 register file. */ 3174static unsigned int 3175rest_of_handle_stack_regs (void) 3176{ 3177#ifdef STACK_REGS 3178 if (reg_to_stack () && optimize) 3179 { 3180 regstack_completed = 1; 3181 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK 3182 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0)) 3183 && (flag_reorder_blocks || flag_reorder_blocks_and_partition)) 3184 { 3185 reorder_basic_blocks (0); 3186 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK); 3187 } 3188 } 3189 else 3190 regstack_completed = 1; 3191#endif 3192 return 0; 3193} 3194 3195struct tree_opt_pass pass_stack_regs = 3196{ 3197 "stack", /* name */ 3198 gate_handle_stack_regs, /* gate */ 3199 rest_of_handle_stack_regs, /* execute */ 3200 NULL, /* sub */ 3201 NULL, /* next */ 3202 0, /* static_pass_number */ 3203 TV_REG_STACK, /* tv_id */ 3204 0, /* properties_required */ 3205 0, /* properties_provided */ 3206 0, /* properties_destroyed */ 3207 0, /* todo_flags_start */ 3208 TODO_dump_func | 3209 TODO_ggc_collect, /* todo_flags_finish */ 3210 'k' /* letter */ 3211}; 3212