1/*
2 * This file is _NOT_ automatically generated.  It must agree with the
3 * Virtual Function register map definitions in t4vf_defs.h in the common
4 * code.
5 */
6__FBSDID("$FreeBSD: stable/11/usr.sbin/cxgbetool/reg_defs_t4vf.c 296471 2016-03-07 21:11:35Z np $");
7
8struct reg_info t4vf_sge_regs[] = {
9	{ "SGE_KDOORBELL",			0x000, 0 },
10		{ "QID", 15, 17 },
11		{ "Priority", 14, 1 },
12		{ "PIDX", 0, 14 },
13	{ "SGE_GTS",				0x004, 0 },
14		{ "IngressQID", 16, 16 },
15		{ "TimerReg", 13, 3 },
16		{ "SEIntArm", 12, 1 },
17		{ "CIDXInc", 0, 12 },
18
19	{ NULL, 0, 0 }
20};
21
22struct reg_info t5vf_sge_regs[] = {
23	{ "SGE_VF_KDOORBELL",			0x000, 0 },
24		{ "QID", 15, 17 },
25		{ "Priority", 14, 1 },
26		{ "Type", 13, 1 },
27		{ "PIDX", 0, 13 },
28	{ "SGE_VF_GTS",				0x004, 0 },
29		{ "IngressQID", 16, 16 },
30		{ "TimerReg", 13, 3 },
31		{ "SEIntArm", 12, 1 },
32		{ "CIDXInc", 0, 12 },
33
34	{ NULL, 0, 0 }
35};
36
37struct reg_info t4vf_mps_regs[] = {
38	{ "MPS_VF_CTL",	0x100, 0 },
39		{ "TxEn", 1, 1 },
40		{ "RxEn", 0, 1 },
41
42	{ "MPS_VF_STAT_TX_VF_BCAST_BYTES_L",	0x180, 0 },
43	{ "MPS_VF_STAT_TX_VF_BCAST_BYTES_H",	0x184, 0 },
44	{ "MPS_VF_STAT_TX_VF_BCAST_FRAMES_L",	0x188, 0 },
45	{ "MPS_VF_STAT_TX_VF_BCAST_FRAMES_H",	0x18c, 0 },
46
47	{ "MPS_VF_STAT_TX_VF_MCAST_BYTES_L",	0x190, 0 },
48	{ "MPS_VF_STAT_TX_VF_MCAST_BYTES_H",	0x194, 0 },
49	{ "MPS_VF_STAT_TX_VF_MCAST_FRAMES_L",	0x198, 0 },
50	{ "MPS_VF_STAT_TX_VF_MCAST_FRAMES_H",	0x19c, 0 },
51
52	{ "MPS_VF_STAT_TX_VF_UCAST_BYTES_L",	0x1a0, 0 },
53	{ "MPS_VF_STAT_TX_VF_UCAST_BYTES_H",	0x1a4, 0 },
54	{ "MPS_VF_STAT_TX_VF_UCAST_FRAMES_L",	0x1a8, 0 },
55	{ "MPS_VF_STAT_TX_VF_UCAST_FRAMES_H",	0x1ac, 0 },
56
57	{ "MPS_VF_STAT_TX_VF_DROP_FRAMES_L",	0x1b0, 0 },
58	{ "MPS_VF_STAT_TX_VF_DROP_FRAMES_H",	0x1b4, 0 },
59
60	{ "MPS_VF_STAT_TX_VF_OFFLOAD_BYTES_L",  0x1b8, 0 },
61	{ "MPS_VF_STAT_TX_VF_OFFLOAD_BYTES_H",  0x1bc, 0 },
62	{ "MPS_VF_STAT_TX_VF_OFFLOAD_FRAMES_L",	0x1c0, 0 },
63	{ "MPS_VF_STAT_TX_VF_OFFLOAD_FRAMES_H",	0x1c4, 0 },
64
65	{ "MPS_VF_STAT_RX_VF_BCAST_BYTES_L",	0x1c8, 0 },
66	{ "MPS_VF_STAT_RX_VF_BCAST_BYTES_H",	0x1cc, 0 },
67	{ "MPS_VF_STAT_RX_VF_BCAST_FRAMES_L",	0x1d0, 0 },
68	{ "MPS_VF_STAT_RX_VF_BCAST_FRAMES_H",	0x1d4, 0 },
69
70	{ "MPS_VF_STAT_RX_VF_MCAST_BYTES_L",	0x1d8, 0 },
71	{ "MPS_VF_STAT_RX_VF_MCAST_BYTES_H",	0x1dc, 0 },
72	{ "MPS_VF_STAT_RX_VF_MCAST_FRAMES_L",	0x1e0, 0 },
73	{ "MPS_VF_STAT_RX_VF_MCAST_FRAMES_H",	0x1e4, 0 },
74
75	{ "MPS_VF_STAT_RX_VF_UCAST_BYTES_L",	0x1e8, 0 },
76	{ "MPS_VF_STAT_RX_VF_UCAST_BYTES_H",	0x1ec, 0 },
77	{ "MPS_VF_STAT_RX_VF_UCAST_FRAMES_L",	0x1f0, 0 },
78	{ "MPS_VF_STAT_RX_VF_UCAST_FRAMES_H",	0x1f4, 0 },
79
80	{ "MPS_VF_STAT_RX_VF_ERR_FRAMES_L",	0x1f8, 0 },
81	{ "MPS_VF_STAT_RX_VF_ERR_FRAMES_H",	0x1fc, 0 },
82
83	{ NULL, 0, 0 }
84};
85
86struct reg_info t4vf_pl_regs[] = {
87	{ "PL_VF_WHOAMI",			0x200, 0 },
88		{ "PortxMap", 24, 3 },
89		{ "SourceBus", 16, 2 },
90		{ "SourcePF", 8, 3 },
91		{ "IsVF", 7, 1 },
92		{ "VFID", 0, 7 },
93
94	{ NULL, 0, 0 }
95};
96
97struct reg_info t5vf_pl_regs[] = {
98	{ "PL_WHOAMI",				0x200, 0 },
99		{ "PortxMap", 24, 3 },
100		{ "SourceBus", 16, 2 },
101		{ "SourcePF", 8, 3 },
102		{ "IsVF", 7, 1 },
103		{ "VFID", 0, 7 },
104	{ "PL_VF_REV",				0x204, 0 },
105		{ "ChipID", 4, 4 },
106		{ "Rev", 0, 4 },
107	{ "PL_VF_REVISION",			0x208, 0 },
108
109	{ NULL, 0, 0 }
110};
111
112struct reg_info t6vf_pl_regs[] = {
113	{ "PL_WHOAMI",				0x200, 0 },
114		{ "PortxMap", 24, 3 },
115		{ "SourceBus", 16, 2 },
116		{ "SourcePF", 9, 3 },
117		{ "IsVF", 8, 1 },
118		{ "VFID", 0, 8 },
119	{ "PL_VF_REV",				0x204, 0 },
120		{ "ChipID", 4, 4 },
121		{ "Rev", 0, 4 },
122	{ "PL_VF_REVISION",			0x208, 0 },
123
124	{ NULL, 0, 0 }
125};
126
127struct reg_info t4vf_cim_regs[] = {
128	/*
129	 * Note: the Mailbox Control register has read side-effects so
130	 * the driver simply returns 0xffff for this register.
131	 */
132	{ "CIM_VF_EXT_MAILBOX_CTRL",		0x300, 0 },
133		{ "MBGeneric", 4, 4 },
134		{ "MBMsgValid", 3, 1 },
135		{ "MBIntReq", 2, 1 },
136		{ "MBOwner", 0, 2 },
137	{ "CIM_VF_EXT_MAILBOX_STATUS",		0x304, 0 },
138		{ "MBVFReady", 0, 1 },
139
140	{ NULL, 0, 0 }
141};
142
143struct reg_info t4vf_mbdata_regs[] = {
144	{ "CIM_VF_EXT_MAILBOX_DATA_00",		0x240, 0 },
145		{ "Return", 8, 8 },
146		{ "Length16", 0, 8 },
147	{ "CIM_VF_EXT_MAILBOX_DATA_04",		0x244, 0 },
148		{ "OpCode", 24, 8 },
149		{ "Request", 23, 1 },
150		{ "Read", 22, 1 },
151		{ "Write", 21, 1 },
152		{ "Execute", 20, 1 },
153	{ "CIM_VF_EXT_MAILBOX_DATA_08",		0x248, 0 },
154	{ "CIM_VF_EXT_MAILBOX_DATA_0c",		0x24c, 0 },
155	{ "CIM_VF_EXT_MAILBOX_DATA_10",		0x250, 0 },
156	{ "CIM_VF_EXT_MAILBOX_DATA_14",		0x254, 0 },
157	{ "CIM_VF_EXT_MAILBOX_DATA_18",		0x258, 0 },
158	{ "CIM_VF_EXT_MAILBOX_DATA_1c",		0x25c, 0 },
159	{ "CIM_VF_EXT_MAILBOX_DATA_20",		0x260, 0 },
160	{ "CIM_VF_EXT_MAILBOX_DATA_24",		0x264, 0 },
161	{ "CIM_VF_EXT_MAILBOX_DATA_28",		0x268, 0 },
162	{ "CIM_VF_EXT_MAILBOX_DATA_2c",		0x26c, 0 },
163	{ "CIM_VF_EXT_MAILBOX_DATA_30",		0x270, 0 },
164	{ "CIM_VF_EXT_MAILBOX_DATA_34",		0x274, 0 },
165	{ "CIM_VF_EXT_MAILBOX_DATA_38",		0x278, 0 },
166	{ "CIM_VF_EXT_MAILBOX_DATA_3c",		0x27c, 0 },
167
168	{ NULL, 0, 0 }
169};
170