1171095Ssam/*- 2171095Ssam * Copyright (c) 2002-2007 Neterion, Inc. 3171095Ssam * All rights reserved. 4171095Ssam * 5171095Ssam * Redistribution and use in source and binary forms, with or without 6171095Ssam * modification, are permitted provided that the following conditions 7171095Ssam * are met: 8171095Ssam * 1. Redistributions of source code must retain the above copyright 9171095Ssam * notice, this list of conditions and the following disclaimer. 10171095Ssam * 2. Redistributions in binary form must reproduce the above copyright 11171095Ssam * notice, this list of conditions and the following disclaimer in the 12171095Ssam * documentation and/or other materials provided with the distribution. 13171095Ssam * 14171095Ssam * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15171095Ssam * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16171095Ssam * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17171095Ssam * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18171095Ssam * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19171095Ssam * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20171095Ssam * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21171095Ssam * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22171095Ssam * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23171095Ssam * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24171095Ssam * SUCH DAMAGE. 25171095Ssam * 26171095Ssam * $FreeBSD$ 27171095Ssam */ 28173139Srwatson 29171095Ssam#ifndef XGE_CMN_H 30171095Ssam#define XGE_CMN_H 31171095Ssam 32171095Ssam#include <stdio.h> 33171095Ssam#include <stdlib.h> 34171095Ssam#include <string.h> 35171095Ssam#include <unistd.h> 36171095Ssam#include <errno.h> 37171095Ssam#include <sys/types.h> 38171095Ssam#include <sys/socket.h> 39171095Ssam#include <sys/ioctl.h> 40171095Ssam#include <net/if.h> 41171095Ssam#include <netinet/in.h> 42171095Ssam#include <arpa/inet.h> 43171095Ssam#include <fcntl.h> 44171095Ssam 45171095Ssam#if BYTE_ORDER == BIG_ENDIAN 46171095Ssam#define XGE_OS_HOST_BIG_ENDIAN 1 47171095Ssam#endif 48171095Ssam 49173139Srwatson#define u64 unsigned long long 50173139Srwatson#define u32 unsigned int 51173139Srwatson#define u16 unsigned short 52173139Srwatson#define u8 unsigned char 53171095Ssam 54171095Ssam#define XGE_COUNT_REGS 386 55171095Ssam#define XGE_COUNT_STATS 160 56171095Ssam#define XGE_COUNT_PCICONF 43 57173139Srwatson#define XGE_COUNT_DEVCONF 1677 58171095Ssam#ifdef CONFIG_LRO 59173139Srwatson#define XGE_COUNT_INTRSTAT 26 60171095Ssam#else 61173139Srwatson#define XGE_COUNT_INTRSTAT 20 62171095Ssam#endif 63173139Srwatson#define XGE_COUNT_SWSTAT 54 64173139Srwatson#define XGE_COUNT_DRIVERSTATS 27 65171095Ssam#define DEVICE_ID_XFRAME_II 0x5832 66171095Ssam#define XGE_COUNT_EXTENDED_STATS 56 67171095Ssam 68173139Srwatson#define XGE_PRINT(fd, fmt...) { \ 69173139Srwatson fprintf(fd, fmt); \ 70173139Srwatson fprintf(fd, "\n"); \ 71173139Srwatson printf(fmt); \ 72173139Srwatson printf("\n"); \ 73171095Ssam} 74171095Ssam 75173139Srwatson#define XGE_PRINT_LINE(fd) XGE_PRINT(fd, line); 76173139Srwatson 77171095Ssam/* Read & Write Register */ 78171095Ssamtypedef struct barregister 79171095Ssam{ 80173139Srwatson char option[2]; 81173139Srwatson u64 offset; 82173139Srwatson u64 value; 83173139Srwatson}xge_register_info_t; 84171095Ssam 85171095Ssam/* Register Dump */ 86171095Ssamtypedef struct xge_pci_bar0_t 87171095Ssam{ 88173139Srwatson u8 name[32]; /* Register name as in user guides */ 89173139Srwatson u64 offset; /* Offset from base address */ 90173139Srwatson u64 value; /* Value */ 91173139Srwatson char type; /* 1: XframeII, 0: Common */ 92171095Ssam} xge_pci_bar0_t; 93171095Ssam 94171095Ssam/* Hardware Statistics */ 95171095Ssamtypedef struct xge_stats_hw_info_t 96171095Ssam{ 97173139Srwatson u8 name[32]; /* Statistics name */ 98173139Srwatson u64 be_offset; /* Offset from base address (BE) */ 99173139Srwatson u64 le_offset; /* Offset from base address (LE) */ 100173139Srwatson u8 type; /* Type: 1, 2, 3 or 4 bytes */ 101173139Srwatson u64 value; /* Value */ 102171095Ssam} xge_stats_hw_info_t; 103171095Ssam 104171095Ssam/* PCI Configuration Space */ 105171095Ssamtypedef struct xge_pci_config_t 106171095Ssam{ 107173139Srwatson u8 name[32]; /* Pci conf. name */ 108173139Srwatson u64 be_offset; /* Offset from base address (BE) */ 109173139Srwatson u64 le_offset; /* Offset from base address (LE) */ 110173139Srwatson u64 value; /* Value */ 111171095Ssam} xge_pci_config_t; 112171095Ssam 113171095Ssam/* Device Configuration */ 114171095Ssamtypedef struct xge_device_config_t 115171095Ssam{ 116173139Srwatson u8 name[32]; /* Device conf. name */ 117173139Srwatson u64 value; /* Value */ 118171095Ssam} xge_device_config_t; 119171095Ssam 120171095Ssam/* Interrupt Statistics */ 121171095Ssamtypedef struct xge_stats_intr_info_t 122171095Ssam{ 123173139Srwatson u8 name[32]; /* Interrupt entry name */ 124173139Srwatson u64 value; /* Value (count) */ 125173139Srwatson} xge_stats_intr_info_t; 126171095Ssam 127171095Ssam/* Tcode Statistics */ 128171095Ssamtypedef struct xge_stats_tcode_info_t 129171095Ssam{ 130173139Srwatson u8 name[32]; /* Tcode entry name */ 131173139Srwatson u64 value; /* Value (count) */ 132173139Srwatson u8 type; /* Type: 1, 2, 3 or 4 bytes */ 133173139Srwatson u16 flag; 134171095Ssam}xge_stats_tcode_info_t; 135171095Ssam 136173139Srwatsontypedef struct xge_stats_driver_info_t 137173139Srwatson{ 138173139Srwatson u8 name[32]; /* Driver statistics name */ 139173139Srwatson u64 value; /* Value */ 140173139Srwatson} xge_stats_driver_info_t; 141173139Srwatson 142171095Ssam#ifdef XGE_OS_HOST_BIG_ENDIAN 143171095Ssam#define GET_OFFSET_STATS(index) statsInfo[(index)].be_offset 144171095Ssam#define GET_OFFSET_PCICONF(index) pciconfInfo[(index)].be_offset 145171095Ssam#else 146171095Ssam#define GET_OFFSET_STATS(index) statsInfo[(index)].le_offset 147171095Ssam#define GET_OFFSET_PCICONF(index) pciconfInfo[(index)].le_offset 148171095Ssam#endif 149171095Ssam 150171095Ssam#endif //XGE_CMN_H 151