1/*-
2 * Copyright (c) 2002-2007 Neterion, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29#ifndef XGE_CMN_H
30#define XGE_CMN_H
31
32#include <stdio.h>
33#include <stdlib.h>
34#include <string.h>
35#include <unistd.h>
36#include <errno.h>
37#include <sys/types.h>
38#include <sys/socket.h>
39#include <sys/ioctl.h>
40#include <net/if.h>
41#include <netinet/in.h>
42#include <arpa/inet.h>
43#include <fcntl.h>
44
45#if BYTE_ORDER == BIG_ENDIAN
46#define XGE_OS_HOST_BIG_ENDIAN 1
47#endif
48
49#define u64 unsigned long long
50#define u32 unsigned int
51#define u16 unsigned short
52#define u8  unsigned char
53
54#define XGE_COUNT_REGS           386
55#define XGE_COUNT_STATS          160
56#define XGE_COUNT_PCICONF        43
57#define XGE_COUNT_DEVCONF        1677
58#ifdef CONFIG_LRO
59#define XGE_COUNT_INTRSTAT       26
60#else
61#define XGE_COUNT_INTRSTAT       20
62#endif
63#define XGE_COUNT_SWSTAT         54
64#define XGE_COUNT_DRIVERSTATS    27
65#define DEVICE_ID_XFRAME_II      0x5832
66#define XGE_COUNT_EXTENDED_STATS 56
67
68#define XGE_PRINT(fd, fmt...) {                                                \
69	fprintf(fd, fmt);                                                      \
70	fprintf(fd, "\n");                                                     \
71	printf(fmt);                                                           \
72	printf("\n");                                                          \
73}
74
75#define XGE_PRINT_LINE(fd)    XGE_PRINT(fd, line);
76
77/* Read & Write Register */
78typedef struct barregister
79{
80	char option[2];
81	u64 offset;
82	u64 value;
83}xge_register_info_t;
84
85/* Register Dump */
86typedef struct xge_pci_bar0_t
87{
88	u8   name[32];                     /* Register name as in user guides */
89	u64  offset;                       /* Offset from base address        */
90	u64  value;                        /* Value                           */
91	char type;                         /* 1: XframeII, 0: Common          */
92} xge_pci_bar0_t;
93
94/* Hardware Statistics */
95typedef struct xge_stats_hw_info_t
96{
97	u8  name[32];                      /* Statistics name                 */
98	u64 be_offset;                     /* Offset from base address (BE)   */
99	u64 le_offset;                     /* Offset from base address (LE)   */
100	u8  type;                          /* Type: 1, 2, 3 or 4 bytes        */
101	u64 value;                         /* Value                           */
102} xge_stats_hw_info_t;
103
104/* PCI Configuration Space */
105typedef struct xge_pci_config_t
106{
107	u8  name[32];                      /* Pci conf. name                  */
108	u64 be_offset;                     /* Offset from base address (BE)   */
109	u64 le_offset;                     /* Offset from base address (LE)   */
110	u64 value;                         /* Value                           */
111} xge_pci_config_t;
112
113/* Device Configuration */
114typedef struct xge_device_config_t
115{
116	u8  name[32];                      /* Device conf. name               */
117	u64 value;                         /* Value                           */
118} xge_device_config_t;
119
120/* Interrupt Statistics */
121typedef struct xge_stats_intr_info_t
122{
123	u8  name[32];                      /* Interrupt entry name            */
124	u64 value;                         /* Value (count)                   */
125} xge_stats_intr_info_t;
126
127/* Tcode Statistics */
128typedef struct xge_stats_tcode_info_t
129{
130    u8  name[32];                          /* Tcode entry name                */
131    u64 value;                             /* Value (count)                   */
132    u8  type;                              /* Type: 1, 2, 3 or 4 bytes        */
133    u16 flag;
134}xge_stats_tcode_info_t;
135
136typedef struct xge_stats_driver_info_t
137{
138	u8 name[32];                       /* Driver statistics name          */
139	u64 value;                         /* Value                           */
140} xge_stats_driver_info_t;
141
142#ifdef XGE_OS_HOST_BIG_ENDIAN
143#define GET_OFFSET_STATS(index)       statsInfo[(index)].be_offset
144#define GET_OFFSET_PCICONF(index)     pciconfInfo[(index)].be_offset
145#else
146#define GET_OFFSET_STATS(index)       statsInfo[(index)].le_offset
147#define GET_OFFSET_PCICONF(index)     pciconfInfo[(index)].le_offset
148#endif
149
150#endif //XGE_CMN_H
151