1/* 2 * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org> 3 * All Rights Reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18#include <sys/cdefs.h> 19__FBSDID("$FreeBSD$"); 20 21#include <stdio.h> 22#include <stdlib.h> 23#include <unistd.h> 24#include <fcntl.h> 25#include <errno.h> 26#include <string.h> 27 28#include <sys/types.h> 29#include <sys/alq.h> 30#include <sys/endian.h> 31 32#include <dev/ath/if_ath_alq.h> 33#include <dev/ath/ath_hal/ar5416/ar5416desc.h> 34 35#include "ar5416_ds.h" 36 37#define MS(_v, _f) ( ((_v) & (_f)) >> _f##_S ) 38#define MF(_v, _f) ( !! ((_v) & (_f))) 39 40static void 41ar5416_decode_txstatus(struct if_ath_alq_payload *a) 42{ 43 struct ar5416_desc txs; 44 45 /* XXX assumes txs is smaller than PAYLOAD_LEN! */ 46 memcpy(&txs, &a->payload, sizeof(struct ar5416_desc)); 47 48 printf("[%u.%06u] [%llu] TXSTATUS: TxDone=%d, FrmOk=%d, filt=%d, TS=0x%08x\n", 49 (unsigned int) be32toh(a->hdr.tstamp_sec), 50 (unsigned int) be32toh(a->hdr.tstamp_usec), 51 (unsigned long long) be64toh(a->hdr.threadid), 52 MF(txs.u.tx.status[9], AR_TxDone), 53 MF(txs.u.tx.status[1], AR_FrmXmitOK), 54 MF(txs.u.tx.status[1], AR_Filtered), 55 txs.u.tx.status[2]); 56 57 /* ds_txstatus0 */ 58 printf(" RX RSSI 0 [%d %d %d]", 59 MS(txs.u.tx.status[0], AR_TxRSSIAnt00), 60 MS(txs.u.tx.status[0], AR_TxRSSIAnt01), 61 MS(txs.u.tx.status[0], AR_TxRSSIAnt02)); 62 63 /* ds_txstatus5 */ 64 printf(" RX RSSI 1 [%d %d %d] Comb=%d\n", 65 MS(txs.u.tx.status[5], AR_TxRSSIAnt10), 66 MS(txs.u.tx.status[5], AR_TxRSSIAnt11), 67 MS(txs.u.tx.status[5], AR_TxRSSIAnt12), 68 MS(txs.u.tx.status[5], AR_TxRSSICombined)); 69 70 /* ds_txstatus0 */ 71 printf(" BA Valid=%d", 72 MF(txs.u.tx.status[0], AR_TxBaStatus)); 73 74 /* ds_txstatus1 */ 75 printf(", Frmok=%d, xretries=%d, fifounderrun=%d, filt=%d\n", 76 MF(txs.u.tx.status[1], AR_FrmXmitOK), 77 MF(txs.u.tx.status[1], AR_ExcessiveRetries), 78 MF(txs.u.tx.status[1], AR_FIFOUnderrun), 79 MF(txs.u.tx.status[1], AR_Filtered)); 80 printf(" DelimUnderrun=%d, DataUnderun=%d, DescCfgErr=%d," 81 " TxTimerExceeded=%d\n", 82 MF(txs.u.tx.status[1], AR_TxDelimUnderrun), 83 MF(txs.u.tx.status[1], AR_TxDataUnderrun), 84 MF(txs.u.tx.status[1], AR_DescCfgErr), 85 MF(txs.u.tx.status[1], AR_TxTimerExpired)); 86 87 printf(" RTScnt=%d, FailCnt=%d, VRetryCnt=%d\n", 88 MS(txs.u.tx.status[1], AR_RTSFailCnt), 89 MS(txs.u.tx.status[1], AR_DataFailCnt), 90 MS(txs.u.tx.status[1], AR_VirtRetryCnt)); 91 92 /* ds_txstatus2 */ 93 printf(" TxTimestamp=0x%08x", txs.u.tx.status[2]); 94 95 /* ds_txstatus3 */ 96 /* ds_txstatus4 */ 97 printf(", BALow=0x%08x", txs.u.tx.status[3]); 98 printf(", BAHigh=0x%08x\n", txs.u.tx.status[4]); 99 100 101 /* ds_txstatus6 */ 102 /* ds_txstatus7 */ 103 /* ds_txstatus8 */ 104 printf(" TxEVM[0]=0x%08x, TxEVM[1]=0x%08x, TxEVM[2]=0x%08x\n", 105 txs.u.tx.status[6], 106 txs.u.tx.status[7], 107 txs.u.tx.status[8]); 108 109 /* ds_txstatus9 */ 110 printf(" TxDone=%d, SeqNum=0x%04x, TxOpExceeded=%d, FinalTsIdx=%d\n", 111 MF(txs.u.tx.status[9], AR_TxDone), 112 MS(txs.u.tx.status[9], AR_SeqNum), 113 MF(txs.u.tx.status[9], AR_TxOpExceeded), 114 MS(txs.u.tx.status[9], AR_FinalTxIdx)); 115 printf(" PowerMgmt=%d, TxTid=%d\n", 116 MF(txs.u.tx.status[9], AR_PowerMgmt), 117 MS(txs.u.tx.status[9], AR_TxTid)); 118 119 printf("\n ------\n"); 120} 121 122static void 123ar5416_decode_txdesc(struct if_ath_alq_payload *a) 124{ 125 struct ar5416_desc txc; 126 127 /* XXX assumes txs is smaller than PAYLOAD_LEN! */ 128 memcpy(&txc, &a->payload, sizeof(struct ar5416_desc)); 129 130 printf("[%u.%06u] [%llu] TXD\n", 131 (unsigned int) be32toh(a->hdr.tstamp_sec), 132 (unsigned int) be32toh(a->hdr.tstamp_usec), 133 (unsigned long long) be64toh(a->hdr.threadid)); 134 135 printf(" link=0x%08x, data=0x%08x\n", 136 txc.ds_link, 137 txc.ds_data); 138 139 /* ds_ctl0 */ 140 printf(" Frame Len=%d, VMF=%d\n", 141 txc.ds_ctl0 & AR_FrameLen, 142 MF(txc.ds_ctl0, AR_VirtMoreFrag)); 143 printf(" TX power0=%d, RtsEna=%d, Veol=%d, ClrDstMask=%d\n", 144 MS(txc.ds_ctl0, AR_XmitPower), 145 MF(txc.ds_ctl0, AR_RTSEnable), 146 MF(txc.ds_ctl0, AR_VEOL), 147 MF(txc.ds_ctl0, AR_ClrDestMask)); 148 printf(" TxIntrReq=%d, DestIdxValid=%d, CtsEnable=%d\n", 149 MF(txc.ds_ctl0, AR_TxIntrReq), 150 MF(txc.ds_ctl0, AR_DestIdxValid), 151 MF(txc.ds_ctl0, AR_CTSEnable)); 152 153 /* ds_ctl1 */ 154 printf(" BufLen=%d, TxMore=%d, DestIdx=%d," 155 " FrType=0x%x\n", 156 txc.ds_ctl1 & AR_BufLen, 157 MF(txc.ds_ctl1, AR_TxMore), 158 MS(txc.ds_ctl1, AR_DestIdx), 159 MS(txc.ds_ctl1, AR_FrameType)); 160 printf(" NoAck=%d, InsertTs=%d, CorruptFcs=%d, ExtOnly=%d," 161 " ExtAndCtl=%d\n", 162 MF(txc.ds_ctl1, AR_NoAck), 163 MF(txc.ds_ctl1, AR_InsertTS), 164 MF(txc.ds_ctl1, AR_CorruptFCS), 165 MF(txc.ds_ctl1, AR_ExtOnly), 166 MF(txc.ds_ctl1, AR_ExtAndCtl)); 167 printf(" MoreAggr=%d, IsAggr=%d, MoreRifs=%d\n", 168 MF(txc.ds_ctl1, AR_MoreAggr), 169 MF(txc.ds_ctl1, AR_IsAggr), 170 MF(txc.ds_ctl1, AR_MoreRifs)); 171 172 /* ds_ctl2 */ 173 printf(" DurUpEna=%d, Burstdur=0x%04x\n", 174 MF(txc.ds_ctl2, AR_DurUpdateEn), 175 MS(txc.ds_ctl2, AR_BurstDur)); 176 printf(" Try0=%d, Try1=%d, Try2=%d, Try3=%d\n", 177 MS(txc.ds_ctl2, AR_XmitDataTries0), 178 MS(txc.ds_ctl2, AR_XmitDataTries1), 179 MS(txc.ds_ctl2, AR_XmitDataTries2), 180 MS(txc.ds_ctl2, AR_XmitDataTries3)); 181 182 /* ds_ctl3, 4 */ 183 printf(" try 0: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 184 MS(txc.ds_ctl3, AR_XmitRate0), 185 MS(txc.ds_ctl4, AR_PacketDur0), 186 MF(txc.ds_ctl4, AR_RTSCTSQual0)); 187 printf(" try 1: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 188 MS(txc.ds_ctl3, AR_XmitRate1), 189 MS(txc.ds_ctl4, AR_PacketDur1), 190 MF(txc.ds_ctl4, AR_RTSCTSQual1)); 191 192 /* ds_ctl3, 5 */ 193 printf(" try 2: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 194 MS(txc.ds_ctl3, AR_XmitRate2), 195 MS(txc.ds_ctl5, AR_PacketDur2), 196 MF(txc.ds_ctl5, AR_RTSCTSQual2)); 197 printf(" try 3: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 198 MS(txc.ds_ctl3, AR_XmitRate3), 199 MS(txc.ds_ctl5, AR_PacketDur3), 200 MF(txc.ds_ctl5, AR_RTSCTSQual3)); 201 202 /* ds_ctl6 */ 203 printf(" AggrLen=%d, PadDelim=%d, EncrType=%d\n", 204 MS(txc.ds_ctl6, AR_AggrLen), 205 MS(txc.ds_ctl6, AR_PadDelim), 206 MS(txc.ds_ctl6, AR_EncrType)); 207 208 /* ds_ctl7 */ 209 printf(" try 0: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 210 MS(txc.ds_ctl7, AR_ChainSel0), 211 MF(txc.ds_ctl7, AR_GI0), 212 MF(txc.ds_ctl7, AR_2040_0), 213 MF(txc.ds_ctl7, AR_STBC0)); 214 printf(" try 1: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 215 MS(txc.ds_ctl7, AR_ChainSel1), 216 MF(txc.ds_ctl7, AR_GI1), 217 MF(txc.ds_ctl7, AR_2040_1), 218 MF(txc.ds_ctl7, AR_STBC1)); 219 printf(" try 2: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 220 MS(txc.ds_ctl7, AR_ChainSel2), 221 MF(txc.ds_ctl7, AR_GI2), 222 MF(txc.ds_ctl7, AR_2040_2), 223 MF(txc.ds_ctl7, AR_STBC2)); 224 printf(" try 3: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 225 MS(txc.ds_ctl7, AR_ChainSel3), 226 MF(txc.ds_ctl7, AR_GI3), 227 MF(txc.ds_ctl7, AR_2040_3), 228 MF(txc.ds_ctl7, AR_STBC3)); 229 230 printf(" RTSCtsRate=0x%02x\n", MS(txc.ds_ctl7, AR_RTSCTSRate)); 231 232 /* ds_ctl8 */ 233 printf(" try 0: ant=0x%08x\n", txc.ds_ctl8 & AR_AntCtl0); 234 235 /* ds_ctl9 */ 236 printf(" try 1: TxPower=%d, ant=0x%08x\n", 237 MS(txc.ds_ctl9, AR_XmitPower1), 238 txc.ds_ctl9 & AR_AntCtl1); 239 240 /* ds_ctl10 */ 241 printf(" try 2: TxPower=%d, ant=0x%08x\n", 242 MS(txc.ds_ctl10, AR_XmitPower2), 243 txc.ds_ctl10 & AR_AntCtl2); 244 245 /* ds_ctl11 */ 246 printf(" try 3: TxPower=%d, ant=0x%08x\n", 247 MS(txc.ds_ctl11, AR_XmitPower3), 248 txc.ds_ctl11 & AR_AntCtl3); 249 250 printf("\n ------ \n"); 251} 252 253static void 254ar5416_decode_rxstatus(struct if_ath_alq_payload *a) 255{ 256 struct ar5416_desc rxs; 257 258 /* XXX assumes rxs is smaller than PAYLOAD_LEN! */ 259 memcpy(&rxs, &a->payload, sizeof(struct ar5416_desc)); 260 261 printf("[%u.%06u] [%llu] RXSTATUS: RxDone=%d, RxRate=0x%02x, TS=0x%08x\n", 262 (unsigned int) be32toh(a->hdr.tstamp_sec), 263 (unsigned int) be32toh(a->hdr.tstamp_usec), 264 (unsigned long long) be64toh(a->hdr.threadid), 265 MF(rxs.ds_rxstatus8, AR_RxDone), 266 MS(rxs.ds_rxstatus0, AR_RxRate), 267 rxs.ds_rxstatus2); 268 269 printf(" link=0x%08x, data=0x%08x, ctl0=0x%08x, ctl2=0x%08x\n", 270 rxs.ds_link, 271 rxs.ds_data, 272 rxs.ds_ctl0, 273 rxs.ds_ctl1); 274 275 /* status0 */ 276 /* 277 * XXX TODO: For AR9285, the chain 1 and chain 2 RSSI values 278 * acutally contain the RX mixer configuration 279 */ 280 printf(" RSSICtl[0]=%d, RSSICtl[1]=%d, RSSICtl[2]=%d\n", 281 MS(rxs.ds_rxstatus0, AR_RxRSSIAnt00), 282 MS(rxs.ds_rxstatus0, AR_RxRSSIAnt01), 283 MS(rxs.ds_rxstatus0, AR_RxRSSIAnt02)); 284 285 /* status4 */ 286 printf(" RSSIExt[0]=%d, RSSIExt[1]=%d, RSSIExt[2]=%d, RSSIComb=%d\n", 287 MS(rxs.ds_rxstatus4, AR_RxRSSIAnt10), 288 MS(rxs.ds_rxstatus4, AR_RxRSSIAnt11), 289 MS(rxs.ds_rxstatus4, AR_RxRSSIAnt12), 290 MS(rxs.ds_rxstatus4, AR_RxRSSICombined)); 291 292 /* status2 */ 293 printf(" RxTimestamp=0x%08x,", rxs.ds_rxstatus2); 294 295 /* status1 */ 296 printf(" DataLen=%d, RxMore=%d, NumDelim=%d\n", 297 rxs.ds_rxstatus1 & AR_DataLen, 298 MF(rxs.ds_rxstatus1, AR_RxMore), 299 MS(rxs.ds_rxstatus1, AR_NumDelim)); 300 301 /* status3 - RxRate however is for Owl 2.0 */ 302 printf(" GI=%d, 2040=%d, RxRate=0x%02x, DupFrame=%d, RxAnt=0x%08x\n", 303 MF(rxs.ds_rxstatus3, AR_GI), 304 MF(rxs.ds_rxstatus3, AR_2040), 305 MS(rxs.ds_rxstatus0, AR_RxRate), 306 MF(rxs.ds_rxstatus3, AR_DupFrame), 307 MS(rxs.ds_rxstatus3, AR_RxAntenna)); 308 309 /* status5 */ 310 /* status6 */ 311 /* status7 */ 312 printf(" RxEvm0=0x%08x, RxEvm1=0x%08x, RxEvm2=0x%08x\n", 313 rxs.ds_rxstatus5, 314 rxs.ds_rxstatus6, 315 rxs.ds_rxstatus7); 316 317 /* status8 */ 318 printf(" RxDone=%d, RxFrameOk=%d, CrcErr=%d, DecryptCrcErr=%d\n", 319 MF(rxs.ds_rxstatus8, AR_RxDone), 320 MF(rxs.ds_rxstatus8, AR_RxFrameOK), 321 MF(rxs.ds_rxstatus8, AR_CRCErr), 322 MF(rxs.ds_rxstatus8, AR_DecryptCRCErr)); 323 printf(" PhyErr=%d, MichaelErr=%d, PreDelimCRCErr=%d, KeyIdxValid=%d\n", 324 MF(rxs.ds_rxstatus8, AR_PHYErr), 325 MF(rxs.ds_rxstatus8, AR_MichaelErr), 326 MF(rxs.ds_rxstatus8, AR_PreDelimCRCErr), 327 MF(rxs.ds_rxstatus8, AR_RxKeyIdxValid)); 328 329 printf(" RxMoreAggr=%d, RxAggr=%d, PostDelimCRCErr=%d, HiRxChain=%d\n", 330 MF(rxs.ds_rxstatus8, AR_RxMoreAggr), 331 MF(rxs.ds_rxstatus8, AR_RxAggr), 332 MF(rxs.ds_rxstatus8, AR_PostDelimCRCErr), 333 MF(rxs.ds_rxstatus8, AR_HiRxChain)); 334 335 /* If PHY error, print that out. Otherwise, the key index */ 336 if (MF(rxs.ds_rxstatus8, AR_PHYErr)) 337 printf(" PhyErrCode=0x%02x", 338 MS(rxs.ds_rxstatus8, AR_PHYErrCode)); 339 else 340 printf(" KeyIdx=0x%02x", 341 MS(rxs.ds_rxstatus8, AR_KeyIdx)); 342 printf(", KeyMiss=%d\n", 343 MF(rxs.ds_rxstatus8, AR_KeyMiss)); 344 345 printf("\n ------\n"); 346} 347 348void 349ar5416_alq_payload(struct if_ath_alq_payload *a) 350{ 351 352 switch (be16toh(a->hdr.op)) { 353 case ATH_ALQ_EDMA_TXSTATUS: /* TXSTATUS */ 354 ar5416_decode_txstatus(a); 355 break; 356 case ATH_ALQ_EDMA_RXSTATUS: /* RXSTATUS */ 357 ar5416_decode_rxstatus(a); 358 break; 359 case ATH_ALQ_EDMA_TXDESC: /* TXDESC */ 360 ar5416_decode_txdesc(a); 361 break; 362 default: 363 printf("[%d.%06d] [%lld] op: %d; len %d\n", 364 be32toh(a->hdr.tstamp_sec), 365 be32toh(a->hdr.tstamp_usec), 366 be64toh(a->hdr.threadid), 367 be16toh(a->hdr.op), be16toh(a->hdr.len)); 368 } 369} 370