1/******************************************************************************
2 * xen.h
3 *
4 * Guest OS interface to Xen.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Copyright (c) 2004, K A Fraser
25 */
26
27#ifndef __XEN_PUBLIC_XEN_H__
28#define __XEN_PUBLIC_XEN_H__
29
30#include "xen-compat.h"
31
32#if defined(__i386__) || defined(__x86_64__)
33#include "arch-x86/xen.h"
34#elif defined(__arm__) || defined (__aarch64__)
35#include "arch-arm.h"
36#else
37#error "Unsupported architecture"
38#endif
39
40#ifndef __ASSEMBLY__
41/* Guest handles for primitive C types. */
42DEFINE_XEN_GUEST_HANDLE(char);
43__DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char);
44DEFINE_XEN_GUEST_HANDLE(int);
45__DEFINE_XEN_GUEST_HANDLE(uint,  unsigned int);
46#if __XEN_INTERFACE_VERSION__ < 0x00040300
47DEFINE_XEN_GUEST_HANDLE(long);
48__DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long);
49#endif
50DEFINE_XEN_GUEST_HANDLE(void);
51
52DEFINE_XEN_GUEST_HANDLE(uint64_t);
53DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
54DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
55#endif
56
57/*
58 * HYPERCALLS
59 */
60
61/* `incontents 100 hcalls List of hypercalls
62 * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*()
63 */
64
65#define __HYPERVISOR_set_trap_table        0
66#define __HYPERVISOR_mmu_update            1
67#define __HYPERVISOR_set_gdt               2
68#define __HYPERVISOR_stack_switch          3
69#define __HYPERVISOR_set_callbacks         4
70#define __HYPERVISOR_fpu_taskswitch        5
71#define __HYPERVISOR_sched_op_compat       6 /* compat since 0x00030101 */
72#define __HYPERVISOR_platform_op           7
73#define __HYPERVISOR_set_debugreg          8
74#define __HYPERVISOR_get_debugreg          9
75#define __HYPERVISOR_update_descriptor    10
76#define __HYPERVISOR_memory_op            12
77#define __HYPERVISOR_multicall            13
78#define __HYPERVISOR_update_va_mapping    14
79#define __HYPERVISOR_set_timer_op         15
80#define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */
81#define __HYPERVISOR_xen_version          17
82#define __HYPERVISOR_console_io           18
83#define __HYPERVISOR_physdev_op_compat    19 /* compat since 0x00030202 */
84#define __HYPERVISOR_grant_table_op       20
85#define __HYPERVISOR_vm_assist            21
86#define __HYPERVISOR_update_va_mapping_otherdomain 22
87#define __HYPERVISOR_iret                 23 /* x86 only */
88#define __HYPERVISOR_vcpu_op              24
89#define __HYPERVISOR_set_segment_base     25 /* x86/64 only */
90#define __HYPERVISOR_mmuext_op            26
91#define __HYPERVISOR_xsm_op               27
92#define __HYPERVISOR_nmi_op               28
93#define __HYPERVISOR_sched_op             29
94#define __HYPERVISOR_callback_op          30
95#define __HYPERVISOR_xenoprof_op          31
96#define __HYPERVISOR_event_channel_op     32
97#define __HYPERVISOR_physdev_op           33
98#define __HYPERVISOR_hvm_op               34
99#define __HYPERVISOR_sysctl               35
100#define __HYPERVISOR_domctl               36
101#define __HYPERVISOR_kexec_op             37
102#define __HYPERVISOR_tmem_op              38
103#define __HYPERVISOR_xc_reserved_op       39 /* reserved for XenClient */
104#define __HYPERVISOR_xenpmu_op            40
105
106/* Architecture-specific hypercall definitions. */
107#define __HYPERVISOR_arch_0               48
108#define __HYPERVISOR_arch_1               49
109#define __HYPERVISOR_arch_2               50
110#define __HYPERVISOR_arch_3               51
111#define __HYPERVISOR_arch_4               52
112#define __HYPERVISOR_arch_5               53
113#define __HYPERVISOR_arch_6               54
114#define __HYPERVISOR_arch_7               55
115
116/* ` } */
117
118/*
119 * HYPERCALL COMPATIBILITY.
120 */
121
122/* New sched_op hypercall introduced in 0x00030101. */
123#if __XEN_INTERFACE_VERSION__ < 0x00030101
124#undef __HYPERVISOR_sched_op
125#define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat
126#endif
127
128/* New event-channel and physdev hypercalls introduced in 0x00030202. */
129#if __XEN_INTERFACE_VERSION__ < 0x00030202
130#undef __HYPERVISOR_event_channel_op
131#define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat
132#undef __HYPERVISOR_physdev_op
133#define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat
134#endif
135
136/* New platform_op hypercall introduced in 0x00030204. */
137#if __XEN_INTERFACE_VERSION__ < 0x00030204
138#define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op
139#endif
140
141/*
142 * VIRTUAL INTERRUPTS
143 *
144 * Virtual interrupts that a guest OS may receive from Xen.
145 *
146 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
147 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
148 * The latter can be allocated only once per guest: they must initially be
149 * allocated to VCPU0 but can subsequently be re-bound.
150 */
151/* ` enum virq { */
152#define VIRQ_TIMER      0  /* V. Timebase update, and/or requested timeout.  */
153#define VIRQ_DEBUG      1  /* V. Request guest to dump debug info.           */
154#define VIRQ_CONSOLE    2  /* G. (DOM0) Bytes received on emergency console. */
155#define VIRQ_DOM_EXC    3  /* G. (DOM0) Exceptional event for some domain.   */
156#define VIRQ_TBUF       4  /* G. (DOM0) Trace buffer has records available.  */
157#define VIRQ_DEBUGGER   6  /* G. (DOM0) A domain has paused for debugging.   */
158#define VIRQ_XENOPROF   7  /* V. XenOprofile interrupt: new sample available */
159#define VIRQ_CON_RING   8  /* G. (DOM0) Bytes received on console            */
160#define VIRQ_PCPU_STATE 9  /* G. (DOM0) PCPU state changed                   */
161#define VIRQ_MEM_EVENT  10 /* G. (DOM0) A memory event has occured           */
162#define VIRQ_XC_RESERVED 11 /* G. Reserved for XenClient                     */
163#define VIRQ_ENOMEM     12 /* G. (DOM0) Low on heap memory       */
164#define VIRQ_XENPMU     13 /* V.  PMC interrupt                              */
165
166/* Architecture-specific VIRQ definitions. */
167#define VIRQ_ARCH_0    16
168#define VIRQ_ARCH_1    17
169#define VIRQ_ARCH_2    18
170#define VIRQ_ARCH_3    19
171#define VIRQ_ARCH_4    20
172#define VIRQ_ARCH_5    21
173#define VIRQ_ARCH_6    22
174#define VIRQ_ARCH_7    23
175/* ` } */
176
177#define NR_VIRQS       24
178
179/*
180 * ` enum neg_errnoval
181 * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[],
182 * `                       unsigned count, unsigned *done_out,
183 * `                       unsigned foreigndom)
184 * `
185 * @reqs is an array of mmu_update_t structures ((ptr, val) pairs).
186 * @count is the length of the above array.
187 * @pdone is an output parameter indicating number of completed operations
188 * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this
189 *                    hypercall invocation. Can be DOMID_SELF.
190 * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced
191 *                     in this hypercall invocation. The value of this field
192 *                     (x) encodes the PFD as follows:
193 *                     x == 0 => PFD == DOMID_SELF
194 *                     x != 0 => PFD == x - 1
195 *
196 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command.
197 * -------------
198 * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
199 * Updates an entry in a page table belonging to PFD. If updating an L1 table,
200 * and the new table entry is valid/present, the mapped frame must belong to
201 * FD. If attempting to map an I/O page then the caller assumes the privilege
202 * of the FD.
203 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
204 * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
205 * ptr[:2]  -- Machine address of the page-table entry to modify.
206 * val      -- Value to write.
207 *
208 * There also certain implicit requirements when using this hypercall. The
209 * pages that make up a pagetable must be mapped read-only in the guest.
210 * This prevents uncontrolled guest updates to the pagetable. Xen strictly
211 * enforces this, and will disallow any pagetable update which will end up
212 * mapping pagetable page RW, and will disallow using any writable page as a
213 * pagetable. In practice it means that when constructing a page table for a
214 * process, thread, etc, we MUST be very dilligient in following these rules:
215 *  1). Start with top-level page (PGD or in Xen language: L4). Fill out
216 *      the entries.
217 *  2). Keep on going, filling out the upper (PUD or L3), and middle (PMD
218 *      or L2).
219 *  3). Start filling out the PTE table (L1) with the PTE entries. Once
220 *  	done, make sure to set each of those entries to RO (so writeable bit
221 *  	is unset). Once that has been completed, set the PMD (L2) for this
222 *  	PTE table as RO.
223 *  4). When completed with all of the PMD (L2) entries, and all of them have
224 *  	been set to RO, make sure to set RO the PUD (L3). Do the same
225 *  	operation on PGD (L4) pagetable entries that have a PUD (L3) entry.
226 *  5). Now before you can use those pages (so setting the cr3), you MUST also
227 *      pin them so that the hypervisor can verify the entries. This is done
228 *      via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame
229 *      number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op(
230 *      MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be
231 *      issued.
232 * For 32-bit guests, the L4 is not used (as there is less pagetables), so
233 * instead use L3.
234 * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE
235 * hypercall. Also if so desired the OS can also try to write to the PTE
236 * and be trapped by the hypervisor (as the PTE entry is RO).
237 *
238 * To deallocate the pages, the operations are the reverse of the steps
239 * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the
240 * pagetable MUST not be in use (meaning that the cr3 is not set to it).
241 *
242 * ptr[1:0] == MMU_MACHPHYS_UPDATE:
243 * Updates an entry in the machine->pseudo-physical mapping table.
244 * ptr[:2]  -- Machine address within the frame whose mapping to modify.
245 *             The frame must belong to the FD, if one is specified.
246 * val      -- Value to write into the mapping entry.
247 *
248 * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD:
249 * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed
250 * with those in @val.
251 *
252 * @val is usually the machine frame number along with some attributes.
253 * The attributes by default follow the architecture defined bits. Meaning that
254 * if this is a X86_64 machine and four page table layout is used, the layout
255 * of val is:
256 *  - 63 if set means No execute (NX)
257 *  - 46-13 the machine frame number
258 *  - 12 available for guest
259 *  - 11 available for guest
260 *  - 10 available for guest
261 *  - 9 available for guest
262 *  - 8 global
263 *  - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages)
264 *  - 6 dirty
265 *  - 5 accessed
266 *  - 4 page cached disabled
267 *  - 3 page write through
268 *  - 2 userspace accessible
269 *  - 1 writeable
270 *  - 0 present
271 *
272 *  The one bits that does not fit with the default layout is the PAGE_PSE
273 *  also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the
274 *  HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB
275 *  (or 2MB) instead of using the PAGE_PSE bit.
276 *
277 *  The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen
278 *  using it as the Page Attribute Table (PAT) bit - for details on it please
279 *  refer to Intel SDM 10.12. The PAT allows to set the caching attributes of
280 *  pages instead of using MTRRs.
281 *
282 *  The PAT MSR is as follows (it is a 64-bit value, each entry is 8 bits):
283 *                    PAT4                 PAT0
284 *  +-----+-----+----+----+----+-----+----+----+
285 *  | UC  | UC- | WC | WB | UC | UC- | WC | WB |  <= Linux
286 *  +-----+-----+----+----+----+-----+----+----+
287 *  | UC  | UC- | WT | WB | UC | UC- | WT | WB |  <= BIOS (default when machine boots)
288 *  +-----+-----+----+----+----+-----+----+----+
289 *  | rsv | rsv | WP | WC | UC | UC- | WT | WB |  <= Xen
290 *  +-----+-----+----+----+----+-----+----+----+
291 *
292 *  The lookup of this index table translates to looking up
293 *  Bit 7, Bit 4, and Bit 3 of val entry:
294 *
295 *  PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3).
296 *
297 *  If all bits are off, then we are using PAT0. If bit 3 turned on,
298 *  then we are using PAT1, if bit 3 and bit 4, then PAT2..
299 *
300 *  As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means
301 *  that if a guest that follows Linux's PAT setup and would like to set Write
302 *  Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is
303 *  set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the
304 *  caching as:
305 *
306 *   WB = none (so PAT0)
307 *   WC = PWT (bit 3 on)
308 *   UC = PWT | PCD (bit 3 and 4 are on).
309 *
310 * To make it work with Xen, it needs to translate the WC bit as so:
311 *
312 *  PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3
313 *
314 * And to translate back it would:
315 *
316 * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7.
317 */
318#define MMU_NORMAL_PT_UPDATE      0 /* checked '*ptr = val'. ptr is MA.      */
319#define MMU_MACHPHYS_UPDATE       1 /* ptr = MA of frame to modify entry for */
320#define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */
321
322/*
323 * MMU EXTENDED OPERATIONS
324 *
325 * ` enum neg_errnoval
326 * ` HYPERVISOR_mmuext_op(mmuext_op_t uops[],
327 * `                      unsigned int count,
328 * `                      unsigned int *pdone,
329 * `                      unsigned int foreigndom)
330 */
331/* HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
332 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
333 * Where the FD has some effect, it is described below.
334 *
335 * cmd: MMUEXT_(UN)PIN_*_TABLE
336 * mfn: Machine frame number to be (un)pinned as a p.t. page.
337 *      The frame must belong to the FD, if one is specified.
338 *
339 * cmd: MMUEXT_NEW_BASEPTR
340 * mfn: Machine frame number of new page-table base to install in MMU.
341 *
342 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
343 * mfn: Machine frame number of new page-table base to install in MMU
344 *      when in user space.
345 *
346 * cmd: MMUEXT_TLB_FLUSH_LOCAL
347 * No additional arguments. Flushes local TLB.
348 *
349 * cmd: MMUEXT_INVLPG_LOCAL
350 * linear_addr: Linear address to be flushed from the local TLB.
351 *
352 * cmd: MMUEXT_TLB_FLUSH_MULTI
353 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
354 *
355 * cmd: MMUEXT_INVLPG_MULTI
356 * linear_addr: Linear address to be flushed.
357 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
358 *
359 * cmd: MMUEXT_TLB_FLUSH_ALL
360 * No additional arguments. Flushes all VCPUs' TLBs.
361 *
362 * cmd: MMUEXT_INVLPG_ALL
363 * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
364 *
365 * cmd: MMUEXT_FLUSH_CACHE
366 * No additional arguments. Writes back and flushes cache contents.
367 *
368 * cmd: MMUEXT_FLUSH_CACHE_GLOBAL
369 * No additional arguments. Writes back and flushes cache contents
370 * on all CPUs in the system.
371 *
372 * cmd: MMUEXT_SET_LDT
373 * linear_addr: Linear address of LDT base (NB. must be page-aligned).
374 * nr_ents: Number of entries in LDT.
375 *
376 * cmd: MMUEXT_CLEAR_PAGE
377 * mfn: Machine frame number to be cleared.
378 *
379 * cmd: MMUEXT_COPY_PAGE
380 * mfn: Machine frame number of the destination page.
381 * src_mfn: Machine frame number of the source page.
382 *
383 * cmd: MMUEXT_[UN]MARK_SUPER
384 * mfn: Machine frame number of head of superpage to be [un]marked.
385 */
386/* ` enum mmuext_cmd { */
387#define MMUEXT_PIN_L1_TABLE      0
388#define MMUEXT_PIN_L2_TABLE      1
389#define MMUEXT_PIN_L3_TABLE      2
390#define MMUEXT_PIN_L4_TABLE      3
391#define MMUEXT_UNPIN_TABLE       4
392#define MMUEXT_NEW_BASEPTR       5
393#define MMUEXT_TLB_FLUSH_LOCAL   6
394#define MMUEXT_INVLPG_LOCAL      7
395#define MMUEXT_TLB_FLUSH_MULTI   8
396#define MMUEXT_INVLPG_MULTI      9
397#define MMUEXT_TLB_FLUSH_ALL    10
398#define MMUEXT_INVLPG_ALL       11
399#define MMUEXT_FLUSH_CACHE      12
400#define MMUEXT_SET_LDT          13
401#define MMUEXT_NEW_USER_BASEPTR 15
402#define MMUEXT_CLEAR_PAGE       16
403#define MMUEXT_COPY_PAGE        17
404#define MMUEXT_FLUSH_CACHE_GLOBAL 18
405#define MMUEXT_MARK_SUPER       19
406#define MMUEXT_UNMARK_SUPER     20
407/* ` } */
408
409#ifndef __ASSEMBLY__
410struct mmuext_op {
411    unsigned int cmd; /* => enum mmuext_cmd */
412    union {
413        /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR
414         * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */
415        xen_pfn_t     mfn;
416        /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
417        unsigned long linear_addr;
418    } arg1;
419    union {
420        /* SET_LDT */
421        unsigned int nr_ents;
422        /* TLB_FLUSH_MULTI, INVLPG_MULTI */
423#if __XEN_INTERFACE_VERSION__ >= 0x00030205
424        XEN_GUEST_HANDLE(const_void) vcpumask;
425#else
426        const void *vcpumask;
427#endif
428        /* COPY_PAGE */
429        xen_pfn_t src_mfn;
430    } arg2;
431};
432typedef struct mmuext_op mmuext_op_t;
433DEFINE_XEN_GUEST_HANDLE(mmuext_op_t);
434#endif
435
436/*
437 * ` enum neg_errnoval
438 * ` HYPERVISOR_update_va_mapping(unsigned long va, u64 val,
439 * `                              enum uvm_flags flags)
440 * `
441 * ` enum neg_errnoval
442 * ` HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, u64 val,
443 * `                                          enum uvm_flags flags,
444 * `                                          domid_t domid)
445 * `
446 * ` @va: The virtual address whose mapping we want to change
447 * ` @val: The new page table entry, must contain a machine address
448 * ` @flags: Control TLB flushes
449 */
450/* These are passed as 'flags' to update_va_mapping. They can be ORed. */
451/* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap.   */
452/* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer.         */
453/* ` enum uvm_flags { */
454#define UVMF_NONE               (0UL<<0) /* No flushing at all.   */
455#define UVMF_TLB_FLUSH          (1UL<<0) /* Flush entire TLB(s).  */
456#define UVMF_INVLPG             (2UL<<0) /* Flush only one entry. */
457#define UVMF_FLUSHTYPE_MASK     (3UL<<0)
458#define UVMF_MULTI              (0UL<<2) /* Flush subset of TLBs. */
459#define UVMF_LOCAL              (0UL<<2) /* Flush local TLB.      */
460#define UVMF_ALL                (1UL<<2) /* Flush all TLBs.       */
461/* ` } */
462
463/*
464 * Commands to HYPERVISOR_console_io().
465 */
466#define CONSOLEIO_write         0
467#define CONSOLEIO_read          1
468
469/*
470 * Commands to HYPERVISOR_vm_assist().
471 */
472#define VMASST_CMD_enable                0
473#define VMASST_CMD_disable               1
474
475/* x86/32 guests: simulate full 4GB segment limits. */
476#define VMASST_TYPE_4gb_segments         0
477
478/* x86/32 guests: trap (vector 15) whenever above vmassist is used. */
479#define VMASST_TYPE_4gb_segments_notify  1
480
481/*
482 * x86 guests: support writes to bottom-level PTEs.
483 * NB1. Page-directory entries cannot be written.
484 * NB2. Guest must continue to remove all writable mappings of PTEs.
485 */
486#define VMASST_TYPE_writable_pagetables  2
487
488/* x86/PAE guests: support PDPTs above 4GB. */
489#define VMASST_TYPE_pae_extended_cr3     3
490
491/*
492 * x86/64 guests: strictly hide M2P from user mode.
493 * This allows the guest to control respective hypervisor behavior:
494 * - when not set, L4 tables get created with the respective slot blank,
495 *   and whenever the L4 table gets used as a kernel one the missing
496 *   mapping gets inserted,
497 * - when set, L4 tables get created with the respective slot initialized
498 *   as before, and whenever the L4 table gets used as a user one the
499 *   mapping gets zapped.
500 */
501#define VMASST_TYPE_m2p_strict           32
502
503#if __XEN_INTERFACE_VERSION__ < 0x00040600
504#define MAX_VMASST_TYPE                  3
505#endif
506
507#ifndef __ASSEMBLY__
508
509typedef uint16_t domid_t;
510
511/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
512#define DOMID_FIRST_RESERVED (0x7FF0U)
513
514/* DOMID_SELF is used in certain contexts to refer to oneself. */
515#define DOMID_SELF (0x7FF0U)
516
517/*
518 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
519 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
520 * is useful to ensure that no mappings to the OS's own heap are accidentally
521 * installed. (e.g., in Linux this could cause havoc as reference counts
522 * aren't adjusted on the I/O-mapping code path).
523 * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
524 * be specified by any calling domain.
525 */
526#define DOMID_IO   (0x7FF1U)
527
528/*
529 * DOMID_XEN is used to allow privileged domains to map restricted parts of
530 * Xen's heap space (e.g., the machine_to_phys table).
531 * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
532 * the caller is privileged.
533 */
534#define DOMID_XEN  (0x7FF2U)
535
536/*
537 * DOMID_COW is used as the owner of sharable pages */
538#define DOMID_COW  (0x7FF3U)
539
540/* DOMID_INVALID is used to identify pages with unknown owner. */
541#define DOMID_INVALID (0x7FF4U)
542
543/* Idle domain. */
544#define DOMID_IDLE (0x7FFFU)
545
546/*
547 * Send an array of these to HYPERVISOR_mmu_update().
548 * NB. The fields are natural pointer/address size for this architecture.
549 */
550struct mmu_update {
551    uint64_t ptr;       /* Machine address of PTE. */
552    uint64_t val;       /* New contents of PTE.    */
553};
554typedef struct mmu_update mmu_update_t;
555DEFINE_XEN_GUEST_HANDLE(mmu_update_t);
556
557/*
558 * ` enum neg_errnoval
559 * ` HYPERVISOR_multicall(multicall_entry_t call_list[],
560 * `                      uint32_t nr_calls);
561 *
562 * NB. The fields are logically the natural register size for this
563 * architecture. In cases where xen_ulong_t is larger than this then
564 * any unused bits in the upper portion must be zero.
565 */
566struct multicall_entry {
567    xen_ulong_t op, result;
568    xen_ulong_t args[6];
569};
570typedef struct multicall_entry multicall_entry_t;
571DEFINE_XEN_GUEST_HANDLE(multicall_entry_t);
572
573#if __XEN_INTERFACE_VERSION__ < 0x00040400
574/*
575 * Event channel endpoints per domain (when using the 2-level ABI):
576 *  1024 if a long is 32 bits; 4096 if a long is 64 bits.
577 */
578#define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS
579#endif
580
581struct vcpu_time_info {
582    /*
583     * Updates to the following values are preceded and followed by an
584     * increment of 'version'. The guest can therefore detect updates by
585     * looking for changes to 'version'. If the least-significant bit of
586     * the version number is set then an update is in progress and the guest
587     * must wait to read a consistent set of values.
588     * The correct way to interact with the version number is similar to
589     * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry.
590     */
591    uint32_t version;
592    uint32_t pad0;
593    uint64_t tsc_timestamp;   /* TSC at last update of time vals.  */
594    uint64_t system_time;     /* Time, in nanosecs, since boot.    */
595    /*
596     * Current system time:
597     *   system_time +
598     *   ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
599     * CPU frequency (Hz):
600     *   ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
601     */
602    uint32_t tsc_to_system_mul;
603    int8_t   tsc_shift;
604    int8_t   pad1[3];
605}; /* 32 bytes */
606typedef struct vcpu_time_info vcpu_time_info_t;
607
608struct vcpu_info {
609    /*
610     * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
611     * a pending notification for a particular VCPU. It is then cleared
612     * by the guest OS /before/ checking for pending work, thus avoiding
613     * a set-and-check race. Note that the mask is only accessed by Xen
614     * on the CPU that is currently hosting the VCPU. This means that the
615     * pending and mask flags can be updated by the guest without special
616     * synchronisation (i.e., no need for the x86 LOCK prefix).
617     * This may seem suboptimal because if the pending flag is set by
618     * a different CPU then an IPI may be scheduled even when the mask
619     * is set. However, note:
620     *  1. The task of 'interrupt holdoff' is covered by the per-event-
621     *     channel mask bits. A 'noisy' event that is continually being
622     *     triggered can be masked at source at this very precise
623     *     granularity.
624     *  2. The main purpose of the per-VCPU mask is therefore to restrict
625     *     reentrant execution: whether for concurrency control, or to
626     *     prevent unbounded stack usage. Whatever the purpose, we expect
627     *     that the mask will be asserted only for short periods at a time,
628     *     and so the likelihood of a 'spurious' IPI is suitably small.
629     * The mask is read before making an event upcall to the guest: a
630     * non-zero mask therefore guarantees that the VCPU will not receive
631     * an upcall activation. The mask is cleared when the VCPU requests
632     * to block: this avoids wakeup-waiting races.
633     */
634    uint8_t evtchn_upcall_pending;
635#ifdef XEN_HAVE_PV_UPCALL_MASK
636    uint8_t evtchn_upcall_mask;
637#else /* XEN_HAVE_PV_UPCALL_MASK */
638    uint8_t pad0;
639#endif /* XEN_HAVE_PV_UPCALL_MASK */
640    xen_ulong_t evtchn_pending_sel;
641    struct arch_vcpu_info arch;
642    struct vcpu_time_info time;
643}; /* 64 bytes (x86) */
644#ifndef __XEN__
645typedef struct vcpu_info vcpu_info_t;
646#endif
647
648/*
649 * `incontents 200 startofday_shared Start-of-day shared data structure
650 * Xen/kernel shared data -- pointer provided in start_info.
651 *
652 * This structure is defined to be both smaller than a page, and the
653 * only data on the shared page, but may vary in actual size even within
654 * compatible Xen versions; guests should not rely on the size
655 * of this structure remaining constant.
656 */
657struct shared_info {
658    struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS];
659
660    /*
661     * A domain can create "event channels" on which it can send and receive
662     * asynchronous event notifications. There are three classes of event that
663     * are delivered by this mechanism:
664     *  1. Bi-directional inter- and intra-domain connections. Domains must
665     *     arrange out-of-band to set up a connection (usually by allocating
666     *     an unbound 'listener' port and avertising that via a storage service
667     *     such as xenstore).
668     *  2. Physical interrupts. A domain with suitable hardware-access
669     *     privileges can bind an event-channel port to a physical interrupt
670     *     source.
671     *  3. Virtual interrupts ('events'). A domain can bind an event-channel
672     *     port to a virtual interrupt source, such as the virtual-timer
673     *     device or the emergency console.
674     *
675     * Event channels are addressed by a "port index". Each channel is
676     * associated with two bits of information:
677     *  1. PENDING -- notifies the domain that there is a pending notification
678     *     to be processed. This bit is cleared by the guest.
679     *  2. MASK -- if this bit is clear then a 0->1 transition of PENDING
680     *     will cause an asynchronous upcall to be scheduled. This bit is only
681     *     updated by the guest. It is read-only within Xen. If a channel
682     *     becomes pending while the channel is masked then the 'edge' is lost
683     *     (i.e., when the channel is unmasked, the guest must manually handle
684     *     pending notifications as no upcall will be scheduled by Xen).
685     *
686     * To expedite scanning of pending notifications, any 0->1 pending
687     * transition on an unmasked channel causes a corresponding bit in a
688     * per-vcpu selector word to be set. Each bit in the selector covers a
689     * 'C long' in the PENDING bitfield array.
690     */
691    xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8];
692    xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8];
693
694    /*
695     * Wallclock time: updated only by control software. Guests should base
696     * their gettimeofday() syscall on this wallclock-base value.
697     */
698    uint32_t wc_version;      /* Version counter: see vcpu_time_info_t. */
699    uint32_t wc_sec;          /* Secs  00:00:00 UTC, Jan 1, 1970.  */
700    uint32_t wc_nsec;         /* Nsecs 00:00:00 UTC, Jan 1, 1970.  */
701#if !defined(__i386__)
702    uint32_t wc_sec_hi;
703# define xen_wc_sec_hi wc_sec_hi
704#elif !defined(__XEN__) && !defined(__XEN_TOOLS__)
705# define xen_wc_sec_hi arch.wc_sec_hi
706#endif
707
708    struct arch_shared_info arch;
709
710};
711#ifndef __XEN__
712typedef struct shared_info shared_info_t;
713#endif
714
715/*
716 * `incontents 200 startofday Start-of-day memory layout
717 *
718 *  1. The domain is started within contiguous virtual-memory region.
719 *  2. The contiguous region ends on an aligned 4MB boundary.
720 *  3. This the order of bootstrap elements in the initial virtual region:
721 *      a. relocated kernel image
722 *      b. initial ram disk              [mod_start, mod_len]
723 *         (may be omitted)
724 *      c. list of allocated page frames [mfn_list, nr_pages]
725 *         (unless relocated due to XEN_ELFNOTE_INIT_P2M)
726 *      d. start_info_t structure        [register ESI (x86)]
727 *         in case of dom0 this page contains the console info, too
728 *      e. unless dom0: xenstore ring page
729 *      f. unless dom0: console ring page
730 *      g. bootstrap page tables         [pt_base and CR3 (x86)]
731 *      h. bootstrap stack               [register ESP (x86)]
732 *  4. Bootstrap elements are packed together, but each is 4kB-aligned.
733 *  5. The list of page frames forms a contiguous 'pseudo-physical' memory
734 *     layout for the domain. In particular, the bootstrap virtual-memory
735 *     region is a 1:1 mapping to the first section of the pseudo-physical map.
736 *  6. All bootstrap elements are mapped read-writable for the guest OS. The
737 *     only exception is the bootstrap page table, which is mapped read-only.
738 *  7. There is guaranteed to be at least 512kB padding after the final
739 *     bootstrap element. If necessary, the bootstrap virtual region is
740 *     extended by an extra 4MB to ensure this.
741 *
742 * Note: Prior to 25833:bb85bbccb1c9. ("x86/32-on-64 adjust Dom0 initial page
743 * table layout") a bug caused the pt_base (3.g above) and cr3 to not point
744 * to the start of the guest page tables (it was offset by two pages).
745 * This only manifested itself on 32-on-64 dom0 kernels and not 32-on-64 domU
746 * or 64-bit kernels of any colour. The page tables for a 32-on-64 dom0 got
747 * allocated in the order: 'first L1','first L2', 'first L3', so the offset
748 * to the page table base is by two pages back. The initial domain if it is
749 * 32-bit and runs under a 64-bit hypervisor should _NOT_ use two of the
750 * pages preceding pt_base and mark them as reserved/unused.
751 */
752#ifdef XEN_HAVE_PV_GUEST_ENTRY
753struct start_info {
754    /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME.    */
755    char magic[32];             /* "xen-<version>-<platform>".            */
756    unsigned long nr_pages;     /* Total pages allocated to this domain.  */
757    unsigned long shared_info;  /* MACHINE address of shared info struct. */
758    uint32_t flags;             /* SIF_xxx flags.                         */
759    xen_pfn_t store_mfn;        /* MACHINE page number of shared page.    */
760    uint32_t store_evtchn;      /* Event channel for store communication. */
761    union {
762        struct {
763            xen_pfn_t mfn;      /* MACHINE page number of console page.   */
764            uint32_t  evtchn;   /* Event channel for console page.        */
765        } domU;
766        struct {
767            uint32_t info_off;  /* Offset of console_info struct.         */
768            uint32_t info_size; /* Size of console_info struct from start.*/
769        } dom0;
770    } console;
771    /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME).     */
772    unsigned long pt_base;      /* VIRTUAL address of page directory.     */
773    unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames.       */
774    unsigned long mfn_list;     /* VIRTUAL address of page-frame list.    */
775    unsigned long mod_start;    /* VIRTUAL address of pre-loaded module   */
776                                /* (PFN of pre-loaded module if           */
777                                /*  SIF_MOD_START_PFN set in flags).      */
778    unsigned long mod_len;      /* Size (bytes) of pre-loaded module.     */
779#define MAX_GUEST_CMDLINE 1024
780    int8_t cmd_line[MAX_GUEST_CMDLINE];
781    /* The pfn range here covers both page table and p->m table frames.   */
782    unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table.    */
783    unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table.  */
784};
785typedef struct start_info start_info_t;
786
787/* New console union for dom0 introduced in 0x00030203. */
788#if __XEN_INTERFACE_VERSION__ < 0x00030203
789#define console_mfn    console.domU.mfn
790#define console_evtchn console.domU.evtchn
791#endif
792#endif /* XEN_HAVE_PV_GUEST_ENTRY */
793
794/* These flags are passed in the 'flags' field of start_info_t. */
795#define SIF_PRIVILEGED    (1<<0)  /* Is the domain privileged? */
796#define SIF_INITDOMAIN    (1<<1)  /* Is this the initial control domain? */
797#define SIF_MULTIBOOT_MOD (1<<2)  /* Is mod_start a multiboot module? */
798#define SIF_MOD_START_PFN (1<<3)  /* Is mod_start a PFN? */
799#define SIF_VIRT_P2M_4TOOLS (1<<4) /* Do Xen tools understand a virt. mapped */
800                                   /* P->M making the 3 level tree obsolete? */
801#define SIF_PM_MASK       (0xFF<<8) /* reserve 1 byte for xen-pm options */
802
803/*
804 * A multiboot module is a package containing modules very similar to a
805 * multiboot module array. The only differences are:
806 * - the array of module descriptors is by convention simply at the beginning
807 *   of the multiboot module,
808 * - addresses in the module descriptors are based on the beginning of the
809 *   multiboot module,
810 * - the number of modules is determined by a termination descriptor that has
811 *   mod_start == 0.
812 *
813 * This permits to both build it statically and reference it in a configuration
814 * file, and let the PV guest easily rebase the addresses to virtual addresses
815 * and at the same time count the number of modules.
816 */
817struct xen_multiboot_mod_list
818{
819    /* Address of first byte of the module */
820    uint32_t mod_start;
821    /* Address of last byte of the module (inclusive) */
822    uint32_t mod_end;
823    /* Address of zero-terminated command line */
824    uint32_t cmdline;
825    /* Unused, must be zero */
826    uint32_t pad;
827};
828/*
829 * `incontents 200 startofday_dom0_console Dom0_console
830 *
831 * The console structure in start_info.console.dom0
832 *
833 * This structure includes a variety of information required to
834 * have a working VGA/VESA console.
835 */
836typedef struct dom0_vga_console_info {
837    uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */
838#define XEN_VGATYPE_TEXT_MODE_3 0x03
839#define XEN_VGATYPE_VESA_LFB    0x23
840#define XEN_VGATYPE_EFI_LFB     0x70
841
842    union {
843        struct {
844            /* Font height, in pixels. */
845            uint16_t font_height;
846            /* Cursor location (column, row). */
847            uint16_t cursor_x, cursor_y;
848            /* Number of rows and columns (dimensions in characters). */
849            uint16_t rows, columns;
850        } text_mode_3;
851
852        struct {
853            /* Width and height, in pixels. */
854            uint16_t width, height;
855            /* Bytes per scan line. */
856            uint16_t bytes_per_line;
857            /* Bits per pixel. */
858            uint16_t bits_per_pixel;
859            /* LFB physical address, and size (in units of 64kB). */
860            uint32_t lfb_base;
861            uint32_t lfb_size;
862            /* RGB mask offsets and sizes, as defined by VBE 1.2+ */
863            uint8_t  red_pos, red_size;
864            uint8_t  green_pos, green_size;
865            uint8_t  blue_pos, blue_size;
866            uint8_t  rsvd_pos, rsvd_size;
867#if __XEN_INTERFACE_VERSION__ >= 0x00030206
868            /* VESA capabilities (offset 0xa, VESA command 0x4f00). */
869            uint32_t gbl_caps;
870            /* Mode attributes (offset 0x0, VESA command 0x4f01). */
871            uint16_t mode_attrs;
872#endif
873        } vesa_lfb;
874    } u;
875} dom0_vga_console_info_t;
876#define xen_vga_console_info dom0_vga_console_info
877#define xen_vga_console_info_t dom0_vga_console_info_t
878
879typedef uint8_t xen_domain_handle_t[16];
880
881/* Turn a plain number into a C unsigned long constant. */
882#define __mk_unsigned_long(x) x ## UL
883#define mk_unsigned_long(x) __mk_unsigned_long(x)
884
885__DEFINE_XEN_GUEST_HANDLE(uint8,  uint8_t);
886__DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
887__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
888__DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t);
889
890#else /* __ASSEMBLY__ */
891
892/* In assembly code we cannot use C numeric constant suffixes. */
893#define mk_unsigned_long(x) x
894
895#endif /* !__ASSEMBLY__ */
896
897/* Default definitions for macros used by domctl/sysctl. */
898#if defined(__XEN__) || defined(__XEN_TOOLS__)
899
900#ifndef int64_aligned_t
901#define int64_aligned_t int64_t
902#endif
903#ifndef uint64_aligned_t
904#define uint64_aligned_t uint64_t
905#endif
906#ifndef XEN_GUEST_HANDLE_64
907#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name)
908#endif
909
910#ifndef __ASSEMBLY__
911struct xenctl_bitmap {
912    XEN_GUEST_HANDLE_64(uint8) bitmap;
913    uint32_t nr_bits;
914};
915#endif
916
917#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */
918
919#endif /* __XEN_PUBLIC_XEN_H__ */
920
921/*
922 * Local variables:
923 * mode: C
924 * c-file-style: "BSD"
925 * c-basic-offset: 4
926 * tab-width: 4
927 * indent-tabs-mode: nil
928 * End:
929 */
930