isa_dma.c revision 61994
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $FreeBSD: head/sys/i386/isa/isa_dma.c 61994 2000-06-23 07:44:33Z msmith $ 38 */ 39 40/* 41 * code to manage AT bus 42 * 43 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 44 * Fixed uninitialized variable problem and added code to deal 45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 46 * mode DMA count compution and reorganized DMA setup code in 47 * isa_dmastart() 48 */ 49 50#include <sys/param.h> 51#include <sys/systm.h> 52#include <sys/bus.h> 53#include <sys/kernel.h> 54#include <sys/malloc.h> 55#include <sys/module.h> 56#include <vm/vm.h> 57#include <vm/vm_param.h> 58#include <vm/pmap.h> 59#include <i386/isa/isa.h> 60#include <i386/isa/ic/i8237.h> 61#include <isa/isavar.h> 62 63/* 64** Register definitions for DMA controller 1 (channels 0..3): 65*/ 66#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 67#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 68#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 69#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 70 71/* 72** Register definitions for DMA controller 2 (channels 4..7): 73*/ 74#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 75#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 76#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 77#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 78 79static int isa_dmarangecheck __P((caddr_t va, u_int length, int chan)); 80 81static caddr_t dma_bouncebuf[8]; 82static u_int dma_bouncebufsize[8]; 83static u_int8_t dma_bounced = 0; 84static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 85static u_int8_t dma_inuse = 0; /* User for acquire/release */ 86static u_int8_t dma_auto_mode = 0; 87 88#define VALID_DMA_MASK (7) 89 90/* high byte of address is stored in this port for i-th dma channel */ 91static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 92 93/* 94 * Setup a DMA channel's bounce buffer. 95 */ 96void 97isa_dmainit(chan, bouncebufsize) 98 int chan; 99 u_int bouncebufsize; 100{ 101 void *buf; 102 103#ifdef DIAGNOSTIC 104 if (chan & ~VALID_DMA_MASK) 105 panic("isa_dmainit: channel out of range"); 106 107 if (dma_bouncebuf[chan] != NULL) 108 panic("isa_dmainit: impossible request"); 109#endif 110 111 dma_bouncebufsize[chan] = bouncebufsize; 112 113 /* Try malloc() first. It works better if it works. */ 114 buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 115 if (buf != NULL) { 116 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 117 dma_bouncebuf[chan] = buf; 118 return; 119 } 120 free(buf, M_DEVBUF); 121 } 122 buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 123 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 124 if (buf == NULL) 125 printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 126 else 127 dma_bouncebuf[chan] = buf; 128} 129 130/* 131 * Register a DMA channel's usage. Usually called from a device driver 132 * in open() or during its initialization. 133 */ 134int 135isa_dma_acquire(chan) 136 int chan; 137{ 138#ifdef DIAGNOSTIC 139 if (chan & ~VALID_DMA_MASK) 140 panic("isa_dma_acquire: channel out of range"); 141#endif 142 143 if (dma_inuse & (1 << chan)) { 144 printf("isa_dma_acquire: channel %d already in use\n", chan); 145 return (EBUSY); 146 } 147 dma_inuse |= (1 << chan); 148 dma_auto_mode &= ~(1 << chan); 149 150 return (0); 151} 152 153/* 154 * Unregister a DMA channel's usage. Usually called from a device driver 155 * during close() or during its shutdown. 156 */ 157void 158isa_dma_release(chan) 159 int chan; 160{ 161#ifdef DIAGNOSTIC 162 if (chan & ~VALID_DMA_MASK) 163 panic("isa_dma_release: channel out of range"); 164 165 if ((dma_inuse & (1 << chan)) == 0) 166 printf("isa_dma_release: channel %d not in use\n", chan); 167#endif 168 169 if (dma_busy & (1 << chan)) { 170 dma_busy &= ~(1 << chan); 171 /* 172 * XXX We should also do "dma_bounced &= (1 << chan);" 173 * because we are acting on behalf of isa_dmadone() which 174 * was not called to end the last DMA operation. This does 175 * not matter now, but it may in the future. 176 */ 177 } 178 179 dma_inuse &= ~(1 << chan); 180 dma_auto_mode &= ~(1 << chan); 181} 182 183/* 184 * isa_dmacascade(): program 8237 DMA controller channel to accept 185 * external dma control by a board. 186 */ 187void 188isa_dmacascade(chan) 189 int chan; 190{ 191#ifdef DIAGNOSTIC 192 if (chan & ~VALID_DMA_MASK) 193 panic("isa_dmacascade: channel out of range"); 194#endif 195 196 /* set dma channel mode, and set dma channel mode */ 197 if ((chan & 4) == 0) { 198 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 199 outb(DMA1_SMSK, chan); 200 } else { 201 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 202 outb(DMA2_SMSK, chan & 3); 203 } 204} 205 206/* 207 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 208 * problems by using a bounce buffer. 209 */ 210void 211isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 212{ 213 vm_offset_t phys; 214 int waport; 215 caddr_t newaddr; 216 217#ifdef DIAGNOSTIC 218 if (chan & ~VALID_DMA_MASK) 219 panic("isa_dmastart: channel out of range"); 220 221 if ((chan < 4 && nbytes > (1<<16)) 222 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 223 panic("isa_dmastart: impossible request"); 224 225 if ((dma_inuse & (1 << chan)) == 0) 226 printf("isa_dmastart: channel %d not acquired\n", chan); 227#endif 228 229#if 0 230 /* 231 * XXX This should be checked, but drivers like ad1848 only call 232 * isa_dmastart() once because they use Auto DMA mode. If we 233 * leave this in, drivers that do this will print this continuously. 234 */ 235 if (dma_busy & (1 << chan)) 236 printf("isa_dmastart: channel %d busy\n", chan); 237#endif 238 239 dma_busy |= (1 << chan); 240 241 if (isa_dmarangecheck(addr, nbytes, chan)) { 242 if (dma_bouncebuf[chan] == NULL 243 || dma_bouncebufsize[chan] < nbytes) 244 panic("isa_dmastart: bad bounce buffer"); 245 dma_bounced |= (1 << chan); 246 newaddr = dma_bouncebuf[chan]; 247 248 /* copy bounce buffer on write */ 249 if (!(flags & ISADMA_READ)) 250 bcopy(addr, newaddr, nbytes); 251 addr = newaddr; 252 } 253 254 /* translate to physical */ 255 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr); 256 257 if (flags & ISADMA_RAW) { 258 dma_auto_mode |= (1 << chan); 259 } else { 260 dma_auto_mode &= ~(1 << chan); 261 } 262 263 if ((chan & 4) == 0) { 264 /* 265 * Program one of DMA channels 0..3. These are 266 * byte mode channels. 267 */ 268 /* set dma channel mode, and reset address ff */ 269 270 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 271 if (flags & ISADMA_RAW) { 272 if (flags & ISADMA_READ) 273 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 274 else 275 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 276 } 277 else 278 if (flags & ISADMA_READ) 279 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 280 else 281 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 282 outb(DMA1_FFC, 0); 283 284 /* send start address */ 285 waport = DMA1_CHN(chan); 286 outb(waport, phys); 287 outb(waport, phys>>8); 288 outb(dmapageport[chan], phys>>16); 289 290 /* send count */ 291 outb(waport + 1, --nbytes); 292 outb(waport + 1, nbytes>>8); 293 294 /* unmask channel */ 295 outb(DMA1_SMSK, chan); 296 } else { 297 /* 298 * Program one of DMA channels 4..7. These are 299 * word mode channels. 300 */ 301 /* set dma channel mode, and reset address ff */ 302 303 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 304 if (flags & ISADMA_RAW) { 305 if (flags & ISADMA_READ) 306 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 307 else 308 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 309 } 310 else 311 if (flags & ISADMA_READ) 312 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 313 else 314 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 315 outb(DMA2_FFC, 0); 316 317 /* send start address */ 318 waport = DMA2_CHN(chan - 4); 319 outb(waport, phys>>1); 320 outb(waport, phys>>9); 321 outb(dmapageport[chan], phys>>16); 322 323 /* send count */ 324 nbytes >>= 1; 325 outb(waport + 2, --nbytes); 326 outb(waport + 2, nbytes>>8); 327 328 /* unmask channel */ 329 outb(DMA2_SMSK, chan & 3); 330 } 331} 332 333void 334isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 335{ 336#ifdef DIAGNOSTIC 337 if (chan & ~VALID_DMA_MASK) 338 panic("isa_dmadone: channel out of range"); 339 340 if ((dma_inuse & (1 << chan)) == 0) 341 printf("isa_dmadone: channel %d not acquired\n", chan); 342#endif 343 344 if (((dma_busy & (1 << chan)) == 0) && 345 (dma_auto_mode & (1 << chan)) == 0 ) 346 printf("isa_dmadone: channel %d not busy\n", chan); 347 348 if ((dma_auto_mode & (1 << chan)) == 0) 349 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 350 351 if (dma_bounced & (1 << chan)) { 352 /* copy bounce buffer on read */ 353 if (flags & ISADMA_READ) 354 bcopy(dma_bouncebuf[chan], addr, nbytes); 355 356 dma_bounced &= ~(1 << chan); 357 } 358 dma_busy &= ~(1 << chan); 359} 360 361/* 362 * Check for problems with the address range of a DMA transfer 363 * (non-contiguous physical pages, outside of bus address space, 364 * crossing DMA page boundaries). 365 * Return true if special handling needed. 366 */ 367 368static int 369isa_dmarangecheck(caddr_t va, u_int length, int chan) 370{ 371 vm_offset_t phys, priorpage = 0, endva; 372 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 373 374 endva = (vm_offset_t)round_page((vm_offset_t)va + length); 375 for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 376 phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va)); 377#define ISARAM_END RAM_END 378 if (phys == 0) 379 panic("isa_dmacheck: no physical page present"); 380 if (phys >= ISARAM_END) 381 return (1); 382 if (priorpage) { 383 if (priorpage + PAGE_SIZE != phys) 384 return (1); 385 /* check if crossing a DMA page boundary */ 386 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 387 return (1); 388 } 389 priorpage = phys; 390 } 391 return (0); 392} 393 394/* 395 * Query the progress of a transfer on a DMA channel. 396 * 397 * To avoid having to interrupt a transfer in progress, we sample 398 * each of the high and low databytes twice, and apply the following 399 * logic to determine the correct count. 400 * 401 * Reads are performed with interrupts disabled, thus it is to be 402 * expected that the time between reads is very small. At most 403 * one rollover in the low count byte can be expected within the 404 * four reads that are performed. 405 * 406 * There are three gaps in which a rollover can occur : 407 * 408 * - read low1 409 * gap1 410 * - read high1 411 * gap2 412 * - read low2 413 * gap3 414 * - read high2 415 * 416 * If a rollover occurs in gap1 or gap2, the low2 value will be 417 * greater than the low1 value. In this case, low2 and high2 are a 418 * corresponding pair. 419 * 420 * In any other case, low1 and high1 can be considered to be correct. 421 * 422 * The function returns the number of bytes remaining in the transfer, 423 * or -1 if the channel requested is not active. 424 * 425 */ 426int 427isa_dmastatus(int chan) 428{ 429 u_long cnt = 0; 430 int ffport, waport; 431 u_long low1, high1, low2, high2; 432 433 /* channel active? */ 434 if ((dma_inuse & (1 << chan)) == 0) { 435 printf("isa_dmastatus: channel %d not active\n", chan); 436 return(-1); 437 } 438 /* channel busy? */ 439 440 if (((dma_busy & (1 << chan)) == 0) && 441 (dma_auto_mode & (1 << chan)) == 0 ) { 442 printf("chan %d not busy\n", chan); 443 return -2 ; 444 } 445 if (chan < 4) { /* low DMA controller */ 446 ffport = DMA1_FFC; 447 waport = DMA1_CHN(chan) + 1; 448 } else { /* high DMA controller */ 449 ffport = DMA2_FFC; 450 waport = DMA2_CHN(chan - 4) + 2; 451 } 452 453 disable_intr(); /* no interrupts Mr Jones! */ 454 outb(ffport, 0); /* clear register LSB flipflop */ 455 low1 = inb(waport); 456 high1 = inb(waport); 457 outb(ffport, 0); /* clear again */ 458 low2 = inb(waport); 459 high2 = inb(waport); 460 enable_intr(); /* enable interrupts again */ 461 462 /* 463 * Now decide if a wrap has tried to skew our results. 464 * Note that after TC, the count will read 0xffff, while we want 465 * to return zero, so we add and then mask to compensate. 466 */ 467 if (low1 >= low2) { 468 cnt = (low1 + (high1 << 8) + 1) & 0xffff; 469 } else { 470 cnt = (low2 + (high2 << 8) + 1) & 0xffff; 471 } 472 473 if (chan >= 4) /* high channels move words */ 474 cnt *= 2; 475 return(cnt); 476} 477 478/* 479 * Stop a DMA transfer currently in progress. 480 */ 481int 482isa_dmastop(int chan) 483{ 484 if ((dma_inuse & (1 << chan)) == 0) 485 printf("isa_dmastop: channel %d not acquired\n", chan); 486 487 if (((dma_busy & (1 << chan)) == 0) && 488 ((dma_auto_mode & (1 << chan)) == 0)) { 489 printf("chan %d not busy\n", chan); 490 return -2 ; 491 } 492 493 if ((chan & 4) == 0) { 494 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 495 } else { 496 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 497 } 498 return(isa_dmastatus(chan)); 499} 500 501/* 502 * Attach to the ISA PnP descriptor for the AT DMA controller 503 */ 504static struct isa_pnp_id atdma_ids[] = { 505 { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 506 { 0 } 507}; 508 509static int 510atdma_probe(device_t dev) 511{ 512 int result; 513 514 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 515 device_quiet(dev); 516 return(result); 517} 518 519static int 520atdma_attach(device_t dev) 521{ 522 return(0); 523} 524 525static device_method_t atdma_methods[] = { 526 /* Device interface */ 527 DEVMETHOD(device_probe, atdma_probe), 528 DEVMETHOD(device_attach, atdma_attach), 529 DEVMETHOD(device_detach, bus_generic_detach), 530 DEVMETHOD(device_shutdown, bus_generic_shutdown), 531 DEVMETHOD(device_suspend, bus_generic_suspend), 532 DEVMETHOD(device_resume, bus_generic_resume), 533 { 0, 0 } 534}; 535 536static driver_t atdma_driver = { 537 "atdma", 538 atdma_methods, 539 1, /* no softc */ 540}; 541 542static devclass_t atdma_devclass; 543 544DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 545