isa_dma.c revision 50477 
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by the University of
19 *	California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 *    may be used to endorse or promote products derived from this software
22 *    without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
37 * $FreeBSD: head/sys/i386/isa/isa_dma.c 50477 1999-08-28 01:08:13Z peter $
38 */
39
40/*
41 * code to manage AT bus
42 *
43 * 92/08/18  Frank P. MacLachlan (fpm@crash.cts.com):
44 * Fixed uninitialized variable problem and added code to deal
45 * with DMA page boundaries in isa_dmarangecheck().  Fixed word
46 * mode DMA count compution and reorganized DMA setup code in
47 * isa_dmastart()
48 */
49
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/buf.h>		/* B_READ and B_RAW */
53#include <sys/malloc.h>
54#include <vm/vm.h>
55#include <vm/vm_param.h>
56#include <vm/pmap.h>
57#include <i386/isa/isa.h>
58#include <i386/isa/isa_dma.h>
59#include <i386/isa/ic/i8237.h>
60
61/*
62**  Register definitions for DMA controller 1 (channels 0..3):
63*/
64#define	DMA1_CHN(c)	(IO_DMA1 + 1*(2*(c)))	/* addr reg for channel c */
65#define	DMA1_SMSK	(IO_DMA1 + 1*10)	/* single mask register */
66#define	DMA1_MODE	(IO_DMA1 + 1*11)	/* mode register */
67#define	DMA1_FFC	(IO_DMA1 + 1*12)	/* clear first/last FF */
68
69/*
70**  Register definitions for DMA controller 2 (channels 4..7):
71*/
72#define	DMA2_CHN(c)	(IO_DMA2 + 2*(2*(c)))	/* addr reg for channel c */
73#define	DMA2_SMSK	(IO_DMA2 + 2*10)	/* single mask register */
74#define	DMA2_MODE	(IO_DMA2 + 2*11)	/* mode register */
75#define	DMA2_FFC	(IO_DMA2 + 2*12)	/* clear first/last FF */
76
77static int isa_dmarangecheck __P((caddr_t va, u_int length, int chan));
78
79static caddr_t	dma_bouncebuf[8];
80static u_int	dma_bouncebufsize[8];
81static u_int8_t	dma_bounced = 0;
82static u_int8_t	dma_busy = 0;		/* Used in isa_dmastart() */
83static u_int8_t	dma_inuse = 0;		/* User for acquire/release */
84static u_int8_t dma_auto_mode = 0;
85
86#define VALID_DMA_MASK (7)
87
88/* high byte of address is stored in this port for i-th dma channel */
89static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
90
91/*
92 * Setup a DMA channel's bounce buffer.
93 */
94void
95isa_dmainit(chan, bouncebufsize)
96	int chan;
97	u_int bouncebufsize;
98{
99	void *buf;
100
101#ifdef DIAGNOSTIC
102	if (chan & ~VALID_DMA_MASK)
103		panic("isa_dmainit: channel out of range");
104
105	if (dma_bouncebuf[chan] != NULL)
106		panic("isa_dmainit: impossible request");
107#endif
108
109	dma_bouncebufsize[chan] = bouncebufsize;
110
111	/* Try malloc() first.  It works better if it works. */
112	buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT);
113	if (buf != NULL) {
114		if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) {
115			dma_bouncebuf[chan] = buf;
116			return;
117		}
118		free(buf, M_DEVBUF);
119	}
120	buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful,
121			   1ul, chan & 4 ? 0x20000ul : 0x10000ul);
122	if (buf == NULL)
123		printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize);
124	else
125		dma_bouncebuf[chan] = buf;
126}
127
128/*
129 * Register a DMA channel's usage.  Usually called from a device driver
130 * in open() or during its initialization.
131 */
132int
133isa_dma_acquire(chan)
134	int chan;
135{
136#ifdef DIAGNOSTIC
137	if (chan & ~VALID_DMA_MASK)
138		panic("isa_dma_acquire: channel out of range");
139#endif
140
141	if (dma_inuse & (1 << chan)) {
142		printf("isa_dma_acquire: channel %d already in use\n", chan);
143		return (EBUSY);
144	}
145	dma_inuse |= (1 << chan);
146	dma_auto_mode &= ~(1 << chan);
147
148	return (0);
149}
150
151/*
152 * Unregister a DMA channel's usage.  Usually called from a device driver
153 * during close() or during its shutdown.
154 */
155void
156isa_dma_release(chan)
157	int chan;
158{
159#ifdef DIAGNOSTIC
160	if (chan & ~VALID_DMA_MASK)
161		panic("isa_dma_release: channel out of range");
162
163	if ((dma_inuse & (1 << chan)) == 0)
164		printf("isa_dma_release: channel %d not in use\n", chan);
165#endif
166
167	if (dma_busy & (1 << chan)) {
168		dma_busy &= ~(1 << chan);
169		/*
170		 * XXX We should also do "dma_bounced &= (1 << chan);"
171		 * because we are acting on behalf of isa_dmadone() which
172		 * was not called to end the last DMA operation.  This does
173		 * not matter now, but it may in the future.
174		 */
175	}
176
177	dma_inuse &= ~(1 << chan);
178	dma_auto_mode &= ~(1 << chan);
179}
180
181/*
182 * isa_dmacascade(): program 8237 DMA controller channel to accept
183 * external dma control by a board.
184 */
185void
186isa_dmacascade(chan)
187	int chan;
188{
189#ifdef DIAGNOSTIC
190	if (chan & ~VALID_DMA_MASK)
191		panic("isa_dmacascade: channel out of range");
192#endif
193
194	/* set dma channel mode, and set dma channel mode */
195	if ((chan & 4) == 0) {
196		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
197		outb(DMA1_SMSK, chan);
198	} else {
199		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
200		outb(DMA2_SMSK, chan & 3);
201	}
202}
203
204/*
205 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
206 * problems by using a bounce buffer.
207 */
208void
209isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
210{
211	vm_offset_t phys;
212	int waport;
213	caddr_t newaddr;
214
215#ifdef DIAGNOSTIC
216	if (chan & ~VALID_DMA_MASK)
217		panic("isa_dmastart: channel out of range");
218
219	if ((chan < 4 && nbytes > (1<<16))
220	    || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1)))
221		panic("isa_dmastart: impossible request");
222
223	if ((dma_inuse & (1 << chan)) == 0)
224		printf("isa_dmastart: channel %d not acquired\n", chan);
225#endif
226
227#if 0
228	/*
229	 * XXX This should be checked, but drivers like ad1848 only call
230	 * isa_dmastart() once because they use Auto DMA mode.  If we
231	 * leave this in, drivers that do this will print this continuously.
232	 */
233	if (dma_busy & (1 << chan))
234		printf("isa_dmastart: channel %d busy\n", chan);
235#endif
236
237	dma_busy |= (1 << chan);
238
239	if (isa_dmarangecheck(addr, nbytes, chan)) {
240		if (dma_bouncebuf[chan] == NULL
241		    || dma_bouncebufsize[chan] < nbytes)
242			panic("isa_dmastart: bad bounce buffer");
243		dma_bounced |= (1 << chan);
244		newaddr = dma_bouncebuf[chan];
245
246		/* copy bounce buffer on write */
247		if (!(flags & B_READ))
248			bcopy(addr, newaddr, nbytes);
249		addr = newaddr;
250	}
251
252	/* translate to physical */
253	phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
254
255	if (flags & B_RAW) {
256	    dma_auto_mode |= (1 << chan);
257	} else {
258	    dma_auto_mode &= ~(1 << chan);
259	}
260
261	if ((chan & 4) == 0) {
262		/*
263		 * Program one of DMA channels 0..3.  These are
264		 * byte mode channels.
265		 */
266		/* set dma channel mode, and reset address ff */
267
268		/* If B_RAW flag is set, then use autoinitialise mode */
269		if (flags & B_RAW) {
270		  if (flags & B_READ)
271			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
272		  else
273			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
274		}
275		else
276		if (flags & B_READ)
277			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
278		else
279			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
280		outb(DMA1_FFC, 0);
281
282		/* send start address */
283		waport =  DMA1_CHN(chan);
284		outb(waport, phys);
285		outb(waport, phys>>8);
286		outb(dmapageport[chan], phys>>16);
287
288		/* send count */
289		outb(waport + 1, --nbytes);
290		outb(waport + 1, nbytes>>8);
291
292		/* unmask channel */
293		outb(DMA1_SMSK, chan);
294	} else {
295		/*
296		 * Program one of DMA channels 4..7.  These are
297		 * word mode channels.
298		 */
299		/* set dma channel mode, and reset address ff */
300
301		/* If B_RAW flag is set, then use autoinitialise mode */
302		if (flags & B_RAW) {
303		  if (flags & B_READ)
304			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
305		  else
306			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
307		}
308		else
309		if (flags & B_READ)
310			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
311		else
312			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
313		outb(DMA2_FFC, 0);
314
315		/* send start address */
316		waport = DMA2_CHN(chan - 4);
317		outb(waport, phys>>1);
318		outb(waport, phys>>9);
319		outb(dmapageport[chan], phys>>16);
320
321		/* send count */
322		nbytes >>= 1;
323		outb(waport + 2, --nbytes);
324		outb(waport + 2, nbytes>>8);
325
326		/* unmask channel */
327		outb(DMA2_SMSK, chan & 3);
328	}
329}
330
331void
332isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
333{
334#ifdef DIAGNOSTIC
335	if (chan & ~VALID_DMA_MASK)
336		panic("isa_dmadone: channel out of range");
337
338	if ((dma_inuse & (1 << chan)) == 0)
339		printf("isa_dmadone: channel %d not acquired\n", chan);
340#endif
341
342	if (((dma_busy & (1 << chan)) == 0) &&
343	    (dma_auto_mode & (1 << chan)) == 0 )
344		printf("isa_dmadone: channel %d not busy\n", chan);
345
346	if ((dma_auto_mode & (1 << chan)) == 0)
347		outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
348
349	if (dma_bounced & (1 << chan)) {
350		/* copy bounce buffer on read */
351		if (flags & B_READ)
352			bcopy(dma_bouncebuf[chan], addr, nbytes);
353
354		dma_bounced &= ~(1 << chan);
355	}
356	dma_busy &= ~(1 << chan);
357}
358
359/*
360 * Check for problems with the address range of a DMA transfer
361 * (non-contiguous physical pages, outside of bus address space,
362 * crossing DMA page boundaries).
363 * Return true if special handling needed.
364 */
365
366static int
367isa_dmarangecheck(caddr_t va, u_int length, int chan)
368{
369	vm_offset_t phys, priorpage = 0, endva;
370	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
371
372	endva = (vm_offset_t)round_page((vm_offset_t)va + length);
373	for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
374		phys = trunc_page(pmap_extract(pmap_kernel(), (vm_offset_t)va));
375#define ISARAM_END	RAM_END
376		if (phys == 0)
377			panic("isa_dmacheck: no physical page present");
378		if (phys >= ISARAM_END)
379			return (1);
380		if (priorpage) {
381			if (priorpage + PAGE_SIZE != phys)
382				return (1);
383			/* check if crossing a DMA page boundary */
384			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
385				return (1);
386		}
387		priorpage = phys;
388	}
389	return (0);
390}
391
392/*
393 * Query the progress of a transfer on a DMA channel.
394 *
395 * To avoid having to interrupt a transfer in progress, we sample
396 * each of the high and low databytes twice, and apply the following
397 * logic to determine the correct count.
398 *
399 * Reads are performed with interrupts disabled, thus it is to be
400 * expected that the time between reads is very small.  At most
401 * one rollover in the low count byte can be expected within the
402 * four reads that are performed.
403 *
404 * There are three gaps in which a rollover can occur :
405 *
406 * - read low1
407 *              gap1
408 * - read high1
409 *              gap2
410 * - read low2
411 *              gap3
412 * - read high2
413 *
414 * If a rollover occurs in gap1 or gap2, the low2 value will be
415 * greater than the low1 value.  In this case, low2 and high2 are a
416 * corresponding pair.
417 *
418 * In any other case, low1 and high1 can be considered to be correct.
419 *
420 * The function returns the number of bytes remaining in the transfer,
421 * or -1 if the channel requested is not active.
422 *
423 */
424int
425isa_dmastatus(int chan)
426{
427	u_long	cnt = 0;
428	int	ffport, waport;
429	u_long	low1, high1, low2, high2;
430
431	/* channel active? */
432	if ((dma_inuse & (1 << chan)) == 0) {
433		printf("isa_dmastatus: channel %d not active\n", chan);
434		return(-1);
435	}
436	/* channel busy? */
437
438	if (((dma_busy & (1 << chan)) == 0) &&
439	    (dma_auto_mode & (1 << chan)) == 0 ) {
440	    printf("chan %d not busy\n", chan);
441	    return -2 ;
442	}
443	if (chan < 4) {			/* low DMA controller */
444		ffport = DMA1_FFC;
445		waport = DMA1_CHN(chan) + 1;
446	} else {			/* high DMA controller */
447		ffport = DMA2_FFC;
448		waport = DMA2_CHN(chan - 4) + 2;
449	}
450
451	disable_intr();			/* no interrupts Mr Jones! */
452	outb(ffport, 0);		/* clear register LSB flipflop */
453	low1 = inb(waport);
454	high1 = inb(waport);
455	outb(ffport, 0);		/* clear again */
456	low2 = inb(waport);
457	high2 = inb(waport);
458	enable_intr();			/* enable interrupts again */
459
460	/*
461	 * Now decide if a wrap has tried to skew our results.
462	 * Note that after TC, the count will read 0xffff, while we want
463	 * to return zero, so we add and then mask to compensate.
464	 */
465	if (low1 >= low2) {
466		cnt = (low1 + (high1 << 8) + 1) & 0xffff;
467	} else {
468		cnt = (low2 + (high2 << 8) + 1) & 0xffff;
469	}
470
471	if (chan >= 4)			/* high channels move words */
472		cnt *= 2;
473	return(cnt);
474}
475
476/*
477 * Stop a DMA transfer currently in progress.
478 */
479int
480isa_dmastop(int chan)
481{
482	if ((dma_inuse & (1 << chan)) == 0)
483		printf("isa_dmastop: channel %d not acquired\n", chan);
484
485	if (((dma_busy & (1 << chan)) == 0) &&
486	    ((dma_auto_mode & (1 << chan)) == 0)) {
487		printf("chan %d not busy\n", chan);
488		return -2 ;
489	}
490
491	if ((chan & 4) == 0) {
492		outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
493	} else {
494		outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
495	}
496	return(isa_dmastatus(chan));
497}
498