isa_dma.c revision 204309 
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 *	from: @(#)isa.c	7.2 (Berkeley) 5/13/91
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/x86/isa/isa_dma.c 204309 2010-02-25 14:13:39Z attilio $");
37
38/*
39 * code to manage AT bus
40 *
41 * 92/08/18  Frank P. MacLachlan (fpm@crash.cts.com):
42 * Fixed uninitialized variable problem and added code to deal
43 * with DMA page boundaries in isa_dmarangecheck().  Fixed word
44 * mode DMA count compution and reorganized DMA setup code in
45 * isa_dmastart()
46 */
47
48#include <sys/param.h>
49#include <sys/systm.h>
50#include <sys/bus.h>
51#include <sys/kernel.h>
52#include <sys/malloc.h>
53#include <sys/lock.h>
54#include <sys/proc.h>
55#include <sys/mutex.h>
56#include <sys/module.h>
57#include <vm/vm.h>
58#include <vm/vm_param.h>
59#include <vm/pmap.h>
60#include <isa/isareg.h>
61#include <isa/isavar.h>
62#include <isa/isa_dmareg.h>
63
64#define	ISARAM_END	RAM_END
65
66static int isa_dmarangecheck(caddr_t va, u_int length, int chan);
67
68static caddr_t	dma_bouncebuf[8];
69static u_int	dma_bouncebufsize[8];
70static u_int8_t	dma_bounced = 0;
71static u_int8_t	dma_busy = 0;		/* Used in isa_dmastart() */
72static u_int8_t	dma_inuse = 0;		/* User for acquire/release */
73static u_int8_t dma_auto_mode = 0;
74static struct mtx isa_dma_lock;
75MTX_SYSINIT(isa_dma_lock, &isa_dma_lock, "isa DMA lock", MTX_DEF);
76
77#define VALID_DMA_MASK (7)
78
79/* high byte of address is stored in this port for i-th dma channel */
80static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
81
82/*
83 * Setup a DMA channel's bounce buffer.
84 */
85int
86isa_dma_init(int chan, u_int bouncebufsize, int flag)
87{
88	void *buf;
89	int contig;
90
91#ifdef DIAGNOSTIC
92	if (chan & ~VALID_DMA_MASK)
93		panic("isa_dma_init: channel out of range");
94#endif
95
96
97	/* Try malloc() first.  It works better if it works. */
98	buf = malloc(bouncebufsize, M_DEVBUF, flag);
99	if (buf != NULL) {
100		if (isa_dmarangecheck(buf, bouncebufsize, chan) != 0) {
101			free(buf, M_DEVBUF);
102			buf = NULL;
103		}
104		contig = 0;
105	}
106
107	if (buf == NULL) {
108		buf = contigmalloc(bouncebufsize, M_DEVBUF, flag, 0ul, 0xfffffful,
109			   1ul, chan & 4 ? 0x20000ul : 0x10000ul);
110		contig = 1;
111	}
112
113	if (buf == NULL)
114		return (ENOMEM);
115
116	mtx_lock(&isa_dma_lock);
117	/*
118	 * If a DMA channel is shared, both drivers have to call isa_dma_init
119	 * since they don't know that the other driver will do it.
120	 * Just return if we're already set up good.
121	 * XXX: this only works if they agree on the bouncebuf size.  This
122	 * XXX: is typically the case since they are multiple instances of
123	 * XXX: the same driver.
124	 */
125	if (dma_bouncebuf[chan] != NULL) {
126		if (contig)
127			contigfree(buf, bouncebufsize, M_DEVBUF);
128		else
129			free(buf, M_DEVBUF);
130		mtx_unlock(&isa_dma_lock);
131		return (0);
132	}
133
134	dma_bouncebufsize[chan] = bouncebufsize;
135	dma_bouncebuf[chan] = buf;
136
137	mtx_unlock(&isa_dma_lock);
138
139	return (0);
140}
141
142/*
143 * Register a DMA channel's usage.  Usually called from a device driver
144 * in open() or during its initialization.
145 */
146int
147isa_dma_acquire(chan)
148	int chan;
149{
150#ifdef DIAGNOSTIC
151	if (chan & ~VALID_DMA_MASK)
152		panic("isa_dma_acquire: channel out of range");
153#endif
154
155	mtx_lock(&isa_dma_lock);
156	if (dma_inuse & (1 << chan)) {
157		printf("isa_dma_acquire: channel %d already in use\n", chan);
158		mtx_unlock(&isa_dma_lock);
159		return (EBUSY);
160	}
161	dma_inuse |= (1 << chan);
162	dma_auto_mode &= ~(1 << chan);
163	mtx_unlock(&isa_dma_lock);
164
165	return (0);
166}
167
168/*
169 * Unregister a DMA channel's usage.  Usually called from a device driver
170 * during close() or during its shutdown.
171 */
172void
173isa_dma_release(chan)
174	int chan;
175{
176#ifdef DIAGNOSTIC
177	if (chan & ~VALID_DMA_MASK)
178		panic("isa_dma_release: channel out of range");
179
180	mtx_lock(&isa_dma_lock);
181	if ((dma_inuse & (1 << chan)) == 0)
182		printf("isa_dma_release: channel %d not in use\n", chan);
183#else
184	mtx_lock(&isa_dma_lock);
185#endif
186
187	if (dma_busy & (1 << chan)) {
188		dma_busy &= ~(1 << chan);
189		/*
190		 * XXX We should also do "dma_bounced &= (1 << chan);"
191		 * because we are acting on behalf of isa_dmadone() which
192		 * was not called to end the last DMA operation.  This does
193		 * not matter now, but it may in the future.
194		 */
195	}
196
197	dma_inuse &= ~(1 << chan);
198	dma_auto_mode &= ~(1 << chan);
199
200	mtx_unlock(&isa_dma_lock);
201}
202
203/*
204 * isa_dmacascade(): program 8237 DMA controller channel to accept
205 * external dma control by a board.
206 */
207void
208isa_dmacascade(chan)
209	int chan;
210{
211#ifdef DIAGNOSTIC
212	if (chan & ~VALID_DMA_MASK)
213		panic("isa_dmacascade: channel out of range");
214#endif
215
216	mtx_lock(&isa_dma_lock);
217	/* set dma channel mode, and set dma channel mode */
218	if ((chan & 4) == 0) {
219		outb(DMA1_MODE, DMA37MD_CASCADE | chan);
220		outb(DMA1_SMSK, chan);
221	} else {
222		outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
223		outb(DMA2_SMSK, chan & 3);
224	}
225	mtx_unlock(&isa_dma_lock);
226}
227
228/*
229 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
230 * problems by using a bounce buffer.
231 */
232void
233isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
234{
235	vm_paddr_t phys;
236	int waport;
237	caddr_t newaddr;
238	int dma_range_checked;
239
240	/* translate to physical */
241	phys = pmap_extract(kernel_pmap, (vm_offset_t)addr);
242	dma_range_checked = isa_dmarangecheck(addr, nbytes, chan);
243
244#ifdef DIAGNOSTIC
245	if (chan & ~VALID_DMA_MASK)
246		panic("isa_dmastart: channel out of range");
247
248	if ((chan < 4 && nbytes > (1<<16))
249	    || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
250		panic("isa_dmastart: impossible request");
251
252	mtx_lock(&isa_dma_lock);
253	if ((dma_inuse & (1 << chan)) == 0)
254		printf("isa_dmastart: channel %d not acquired\n", chan);
255#else
256	mtx_lock(&isa_dma_lock);
257#endif
258
259#if 0
260	/*
261	 * XXX This should be checked, but drivers like ad1848 only call
262	 * isa_dmastart() once because they use Auto DMA mode.  If we
263	 * leave this in, drivers that do this will print this continuously.
264	 */
265	if (dma_busy & (1 << chan))
266		printf("isa_dmastart: channel %d busy\n", chan);
267#endif
268
269	dma_busy |= (1 << chan);
270
271	if (dma_range_checked) {
272		if (dma_bouncebuf[chan] == NULL
273		    || dma_bouncebufsize[chan] < nbytes)
274			panic("isa_dmastart: bad bounce buffer");
275		dma_bounced |= (1 << chan);
276		newaddr = dma_bouncebuf[chan];
277
278		/* copy bounce buffer on write */
279		if (!(flags & ISADMA_READ))
280			bcopy(addr, newaddr, nbytes);
281		addr = newaddr;
282	}
283
284	if (flags & ISADMA_RAW) {
285	    dma_auto_mode |= (1 << chan);
286	} else {
287	    dma_auto_mode &= ~(1 << chan);
288	}
289
290	if ((chan & 4) == 0) {
291		/*
292		 * Program one of DMA channels 0..3.  These are
293		 * byte mode channels.
294		 */
295		/* set dma channel mode, and reset address ff */
296
297		/* If ISADMA_RAW flag is set, then use autoinitialise mode */
298		if (flags & ISADMA_RAW) {
299		  if (flags & ISADMA_READ)
300			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
301		  else
302			outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
303		}
304		else
305		if (flags & ISADMA_READ)
306			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
307		else
308			outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
309		outb(DMA1_FFC, 0);
310
311		/* send start address */
312		waport =  DMA1_CHN(chan);
313		outb(waport, phys);
314		outb(waport, phys>>8);
315		outb(dmapageport[chan], phys>>16);
316
317		/* send count */
318		outb(waport + 1, --nbytes);
319		outb(waport + 1, nbytes>>8);
320
321		/* unmask channel */
322		outb(DMA1_SMSK, chan);
323	} else {
324		/*
325		 * Program one of DMA channels 4..7.  These are
326		 * word mode channels.
327		 */
328		/* set dma channel mode, and reset address ff */
329
330		/* If ISADMA_RAW flag is set, then use autoinitialise mode */
331		if (flags & ISADMA_RAW) {
332		  if (flags & ISADMA_READ)
333			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
334		  else
335			outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
336		}
337		else
338		if (flags & ISADMA_READ)
339			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
340		else
341			outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
342		outb(DMA2_FFC, 0);
343
344		/* send start address */
345		waport = DMA2_CHN(chan - 4);
346		outb(waport, phys>>1);
347		outb(waport, phys>>9);
348		outb(dmapageport[chan], phys>>16);
349
350		/* send count */
351		nbytes >>= 1;
352		outb(waport + 2, --nbytes);
353		outb(waport + 2, nbytes>>8);
354
355		/* unmask channel */
356		outb(DMA2_SMSK, chan & 3);
357	}
358	mtx_unlock(&isa_dma_lock);
359}
360
361void
362isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
363{
364#ifdef DIAGNOSTIC
365	if (chan & ~VALID_DMA_MASK)
366		panic("isa_dmadone: channel out of range");
367
368	if ((dma_inuse & (1 << chan)) == 0)
369		printf("isa_dmadone: channel %d not acquired\n", chan);
370#endif
371
372	mtx_lock(&isa_dma_lock);
373	if (((dma_busy & (1 << chan)) == 0) &&
374	    (dma_auto_mode & (1 << chan)) == 0 )
375		printf("isa_dmadone: channel %d not busy\n", chan);
376
377	if ((dma_auto_mode & (1 << chan)) == 0)
378		outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
379
380	if (dma_bounced & (1 << chan)) {
381		/* copy bounce buffer on read */
382		if (flags & ISADMA_READ)
383			bcopy(dma_bouncebuf[chan], addr, nbytes);
384
385		dma_bounced &= ~(1 << chan);
386	}
387	dma_busy &= ~(1 << chan);
388	mtx_unlock(&isa_dma_lock);
389}
390
391/*
392 * Check for problems with the address range of a DMA transfer
393 * (non-contiguous physical pages, outside of bus address space,
394 * crossing DMA page boundaries).
395 * Return true if special handling needed.
396 */
397
398static int
399isa_dmarangecheck(caddr_t va, u_int length, int chan)
400{
401	vm_paddr_t phys, priorpage = 0;
402	vm_offset_t endva;
403	u_int dma_pgmsk = (chan & 4) ?  ~(128*1024-1) : ~(64*1024-1);
404
405	endva = (vm_offset_t)round_page((vm_offset_t)va + length);
406	for (; va < (caddr_t) endva ; va += PAGE_SIZE) {
407		phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va));
408		if (phys == 0)
409			panic("isa_dmacheck: no physical page present");
410		if (phys >= ISARAM_END)
411			return (1);
412		if (priorpage) {
413			if (priorpage + PAGE_SIZE != phys)
414				return (1);
415			/* check if crossing a DMA page boundary */
416			if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk)
417				return (1);
418		}
419		priorpage = phys;
420	}
421	return (0);
422}
423
424/*
425 * Query the progress of a transfer on a DMA channel.
426 *
427 * To avoid having to interrupt a transfer in progress, we sample
428 * each of the high and low databytes twice, and apply the following
429 * logic to determine the correct count.
430 *
431 * Reads are performed with interrupts disabled, thus it is to be
432 * expected that the time between reads is very small.  At most
433 * one rollover in the low count byte can be expected within the
434 * four reads that are performed.
435 *
436 * There are three gaps in which a rollover can occur :
437 *
438 * - read low1
439 *              gap1
440 * - read high1
441 *              gap2
442 * - read low2
443 *              gap3
444 * - read high2
445 *
446 * If a rollover occurs in gap1 or gap2, the low2 value will be
447 * greater than the low1 value.  In this case, low2 and high2 are a
448 * corresponding pair.
449 *
450 * In any other case, low1 and high1 can be considered to be correct.
451 *
452 * The function returns the number of bytes remaining in the transfer,
453 * or -1 if the channel requested is not active.
454 *
455 */
456static int
457isa_dmastatus_locked(int chan)
458{
459	u_long	cnt = 0;
460	int	ffport, waport;
461	u_long	low1, high1, low2, high2;
462
463	mtx_assert(&isa_dma_lock, MA_OWNED);
464
465	/* channel active? */
466	if ((dma_inuse & (1 << chan)) == 0) {
467		printf("isa_dmastatus: channel %d not active\n", chan);
468		return(-1);
469	}
470	/* channel busy? */
471
472	if (((dma_busy & (1 << chan)) == 0) &&
473	    (dma_auto_mode & (1 << chan)) == 0 ) {
474	    printf("chan %d not busy\n", chan);
475	    return -2 ;
476	}
477	if (chan < 4) {			/* low DMA controller */
478		ffport = DMA1_FFC;
479		waport = DMA1_CHN(chan) + 1;
480	} else {			/* high DMA controller */
481		ffport = DMA2_FFC;
482		waport = DMA2_CHN(chan - 4) + 2;
483	}
484
485	disable_intr();			/* no interrupts Mr Jones! */
486	outb(ffport, 0);		/* clear register LSB flipflop */
487	low1 = inb(waport);
488	high1 = inb(waport);
489	outb(ffport, 0);		/* clear again */
490	low2 = inb(waport);
491	high2 = inb(waport);
492	enable_intr();			/* enable interrupts again */
493
494	/*
495	 * Now decide if a wrap has tried to skew our results.
496	 * Note that after TC, the count will read 0xffff, while we want
497	 * to return zero, so we add and then mask to compensate.
498	 */
499	if (low1 >= low2) {
500		cnt = (low1 + (high1 << 8) + 1) & 0xffff;
501	} else {
502		cnt = (low2 + (high2 << 8) + 1) & 0xffff;
503	}
504
505	if (chan >= 4)			/* high channels move words */
506		cnt *= 2;
507	return(cnt);
508}
509
510int
511isa_dmastatus(int chan)
512{
513	int status;
514
515	mtx_lock(&isa_dma_lock);
516	status = isa_dmastatus_locked(chan);
517	mtx_unlock(&isa_dma_lock);
518
519	return (status);
520}
521
522/*
523 * Reached terminal count yet ?
524 */
525int
526isa_dmatc(int chan)
527{
528
529	if (chan < 4)
530		return(inb(DMA1_STATUS) & (1 << chan));
531	else
532		return(inb(DMA2_STATUS) & (1 << (chan & 3)));
533}
534
535/*
536 * Stop a DMA transfer currently in progress.
537 */
538int
539isa_dmastop(int chan)
540{
541	int status;
542
543	mtx_lock(&isa_dma_lock);
544	if ((dma_inuse & (1 << chan)) == 0)
545		printf("isa_dmastop: channel %d not acquired\n", chan);
546
547	if (((dma_busy & (1 << chan)) == 0) &&
548	    ((dma_auto_mode & (1 << chan)) == 0)) {
549		printf("chan %d not busy\n", chan);
550		mtx_unlock(&isa_dma_lock);
551		return -2 ;
552	}
553
554	if ((chan & 4) == 0) {
555		outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
556	} else {
557		outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
558	}
559
560	status = isa_dmastatus_locked(chan);
561
562	mtx_unlock(&isa_dma_lock);
563
564	return (status);
565}
566
567/*
568 * Attach to the ISA PnP descriptor for the AT DMA controller
569 */
570static struct isa_pnp_id atdma_ids[] = {
571	{ 0x0002d041 /* PNP0200 */, "AT DMA controller" },
572	{ 0 }
573};
574
575static int
576atdma_probe(device_t dev)
577{
578	int result;
579
580	if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0)
581		device_quiet(dev);
582	return(result);
583}
584
585static int
586atdma_attach(device_t dev)
587{
588	return(0);
589}
590
591static device_method_t atdma_methods[] = {
592	/* Device interface */
593	DEVMETHOD(device_probe,		atdma_probe),
594	DEVMETHOD(device_attach,	atdma_attach),
595	DEVMETHOD(device_detach,	bus_generic_detach),
596	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
597	DEVMETHOD(device_suspend,	bus_generic_suspend),
598	DEVMETHOD(device_resume,	bus_generic_resume),
599	{ 0, 0 }
600};
601
602static driver_t atdma_driver = {
603	"atdma",
604	atdma_methods,
605	1,		/* no softc */
606};
607
608static devclass_t atdma_devclass;
609
610DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0);
611DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0);
612