isa_dma.c revision 128019
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 33 */ 34 35#include <sys/cdefs.h> 36__FBSDID("$FreeBSD: head/sys/i386/isa/isa_dma.c 128019 2004-04-07 20:46:16Z imp $"); 37 38/* 39 * code to manage AT bus 40 * 41 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com): 42 * Fixed uninitialized variable problem and added code to deal 43 * with DMA page boundaries in isa_dmarangecheck(). Fixed word 44 * mode DMA count compution and reorganized DMA setup code in 45 * isa_dmastart() 46 */ 47 48#include <sys/param.h> 49#include <sys/systm.h> 50#include <sys/bus.h> 51#include <sys/kernel.h> 52#include <sys/malloc.h> 53#include <sys/lock.h> 54#include <sys/proc.h> 55#include <sys/mutex.h> 56#include <sys/module.h> 57#include <vm/vm.h> 58#include <vm/vm_param.h> 59#include <vm/pmap.h> 60#include <i386/isa/isa.h> 61#include <dev/ic/i8237.h> 62#include <isa/isavar.h> 63 64/* 65** Register definitions for DMA controller 1 (channels 0..3): 66*/ 67#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */ 68#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */ 69#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */ 70#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */ 71 72/* 73** Register definitions for DMA controller 2 (channels 4..7): 74*/ 75#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */ 76#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */ 77#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */ 78#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */ 79 80static int isa_dmarangecheck(caddr_t va, u_int length, int chan); 81 82static caddr_t dma_bouncebuf[8]; 83static u_int dma_bouncebufsize[8]; 84static u_int8_t dma_bounced = 0; 85static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */ 86static u_int8_t dma_inuse = 0; /* User for acquire/release */ 87static u_int8_t dma_auto_mode = 0; 88 89#define VALID_DMA_MASK (7) 90 91/* high byte of address is stored in this port for i-th dma channel */ 92static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a }; 93 94/* 95 * Setup a DMA channel's bounce buffer. 96 */ 97void 98isa_dmainit(chan, bouncebufsize) 99 int chan; 100 u_int bouncebufsize; 101{ 102 void *buf; 103 104#ifdef DIAGNOSTIC 105 if (chan & ~VALID_DMA_MASK) 106 panic("isa_dmainit: channel out of range"); 107 108 if (dma_bouncebuf[chan] != NULL) 109 panic("isa_dmainit: impossible request"); 110#endif 111 112 dma_bouncebufsize[chan] = bouncebufsize; 113 114 /* Try malloc() first. It works better if it works. */ 115 buf = malloc(bouncebufsize, M_DEVBUF, M_NOWAIT); 116 if (buf != NULL) { 117 if (isa_dmarangecheck(buf, bouncebufsize, chan) == 0) { 118 dma_bouncebuf[chan] = buf; 119 return; 120 } 121 free(buf, M_DEVBUF); 122 } 123 buf = contigmalloc(bouncebufsize, M_DEVBUF, M_NOWAIT, 0ul, 0xfffffful, 124 1ul, chan & 4 ? 0x20000ul : 0x10000ul); 125 if (buf == NULL) 126 printf("isa_dmainit(%d, %d) failed\n", chan, bouncebufsize); 127 else 128 dma_bouncebuf[chan] = buf; 129} 130 131/* 132 * Register a DMA channel's usage. Usually called from a device driver 133 * in open() or during its initialization. 134 */ 135int 136isa_dma_acquire(chan) 137 int chan; 138{ 139#ifdef DIAGNOSTIC 140 if (chan & ~VALID_DMA_MASK) 141 panic("isa_dma_acquire: channel out of range"); 142#endif 143 144 if (dma_inuse & (1 << chan)) { 145 printf("isa_dma_acquire: channel %d already in use\n", chan); 146 return (EBUSY); 147 } 148 dma_inuse |= (1 << chan); 149 dma_auto_mode &= ~(1 << chan); 150 151 return (0); 152} 153 154/* 155 * Unregister a DMA channel's usage. Usually called from a device driver 156 * during close() or during its shutdown. 157 */ 158void 159isa_dma_release(chan) 160 int chan; 161{ 162#ifdef DIAGNOSTIC 163 if (chan & ~VALID_DMA_MASK) 164 panic("isa_dma_release: channel out of range"); 165 166 if ((dma_inuse & (1 << chan)) == 0) 167 printf("isa_dma_release: channel %d not in use\n", chan); 168#endif 169 170 if (dma_busy & (1 << chan)) { 171 dma_busy &= ~(1 << chan); 172 /* 173 * XXX We should also do "dma_bounced &= (1 << chan);" 174 * because we are acting on behalf of isa_dmadone() which 175 * was not called to end the last DMA operation. This does 176 * not matter now, but it may in the future. 177 */ 178 } 179 180 dma_inuse &= ~(1 << chan); 181 dma_auto_mode &= ~(1 << chan); 182} 183 184/* 185 * isa_dmacascade(): program 8237 DMA controller channel to accept 186 * external dma control by a board. 187 */ 188void 189isa_dmacascade(chan) 190 int chan; 191{ 192#ifdef DIAGNOSTIC 193 if (chan & ~VALID_DMA_MASK) 194 panic("isa_dmacascade: channel out of range"); 195#endif 196 197 /* set dma channel mode, and set dma channel mode */ 198 if ((chan & 4) == 0) { 199 outb(DMA1_MODE, DMA37MD_CASCADE | chan); 200 outb(DMA1_SMSK, chan); 201 } else { 202 outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3)); 203 outb(DMA2_SMSK, chan & 3); 204 } 205} 206 207/* 208 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment 209 * problems by using a bounce buffer. 210 */ 211void 212isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan) 213{ 214 vm_paddr_t phys; 215 int waport; 216 caddr_t newaddr; 217 218 GIANT_REQUIRED; 219 220#ifdef DIAGNOSTIC 221 if (chan & ~VALID_DMA_MASK) 222 panic("isa_dmastart: channel out of range"); 223 224 if ((chan < 4 && nbytes > (1<<16)) 225 || (chan >= 4 && (nbytes > (1<<17) || (u_int)addr & 1))) 226 panic("isa_dmastart: impossible request"); 227 228 if ((dma_inuse & (1 << chan)) == 0) 229 printf("isa_dmastart: channel %d not acquired\n", chan); 230#endif 231 232#if 0 233 /* 234 * XXX This should be checked, but drivers like ad1848 only call 235 * isa_dmastart() once because they use Auto DMA mode. If we 236 * leave this in, drivers that do this will print this continuously. 237 */ 238 if (dma_busy & (1 << chan)) 239 printf("isa_dmastart: channel %d busy\n", chan); 240#endif 241 242 dma_busy |= (1 << chan); 243 244 if (isa_dmarangecheck(addr, nbytes, chan)) { 245 if (dma_bouncebuf[chan] == NULL 246 || dma_bouncebufsize[chan] < nbytes) 247 panic("isa_dmastart: bad bounce buffer"); 248 dma_bounced |= (1 << chan); 249 newaddr = dma_bouncebuf[chan]; 250 251 /* copy bounce buffer on write */ 252 if (!(flags & ISADMA_READ)) 253 bcopy(addr, newaddr, nbytes); 254 addr = newaddr; 255 } 256 257 /* translate to physical */ 258 phys = pmap_extract(kernel_pmap, (vm_offset_t)addr); 259 260 if (flags & ISADMA_RAW) { 261 dma_auto_mode |= (1 << chan); 262 } else { 263 dma_auto_mode &= ~(1 << chan); 264 } 265 266 if ((chan & 4) == 0) { 267 /* 268 * Program one of DMA channels 0..3. These are 269 * byte mode channels. 270 */ 271 /* set dma channel mode, and reset address ff */ 272 273 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 274 if (flags & ISADMA_RAW) { 275 if (flags & ISADMA_READ) 276 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan); 277 else 278 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan); 279 } 280 else 281 if (flags & ISADMA_READ) 282 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan); 283 else 284 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan); 285 outb(DMA1_FFC, 0); 286 287 /* send start address */ 288 waport = DMA1_CHN(chan); 289 outb(waport, phys); 290 outb(waport, phys>>8); 291 outb(dmapageport[chan], phys>>16); 292 293 /* send count */ 294 outb(waport + 1, --nbytes); 295 outb(waport + 1, nbytes>>8); 296 297 /* unmask channel */ 298 outb(DMA1_SMSK, chan); 299 } else { 300 /* 301 * Program one of DMA channels 4..7. These are 302 * word mode channels. 303 */ 304 /* set dma channel mode, and reset address ff */ 305 306 /* If ISADMA_RAW flag is set, then use autoinitialise mode */ 307 if (flags & ISADMA_RAW) { 308 if (flags & ISADMA_READ) 309 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3)); 310 else 311 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3)); 312 } 313 else 314 if (flags & ISADMA_READ) 315 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3)); 316 else 317 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3)); 318 outb(DMA2_FFC, 0); 319 320 /* send start address */ 321 waport = DMA2_CHN(chan - 4); 322 outb(waport, phys>>1); 323 outb(waport, phys>>9); 324 outb(dmapageport[chan], phys>>16); 325 326 /* send count */ 327 nbytes >>= 1; 328 outb(waport + 2, --nbytes); 329 outb(waport + 2, nbytes>>8); 330 331 /* unmask channel */ 332 outb(DMA2_SMSK, chan & 3); 333 } 334} 335 336void 337isa_dmadone(int flags, caddr_t addr, int nbytes, int chan) 338{ 339#ifdef DIAGNOSTIC 340 if (chan & ~VALID_DMA_MASK) 341 panic("isa_dmadone: channel out of range"); 342 343 if ((dma_inuse & (1 << chan)) == 0) 344 printf("isa_dmadone: channel %d not acquired\n", chan); 345#endif 346 347 if (((dma_busy & (1 << chan)) == 0) && 348 (dma_auto_mode & (1 << chan)) == 0 ) 349 printf("isa_dmadone: channel %d not busy\n", chan); 350 351 if ((dma_auto_mode & (1 << chan)) == 0) 352 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4); 353 354 if (dma_bounced & (1 << chan)) { 355 /* copy bounce buffer on read */ 356 if (flags & ISADMA_READ) 357 bcopy(dma_bouncebuf[chan], addr, nbytes); 358 359 dma_bounced &= ~(1 << chan); 360 } 361 dma_busy &= ~(1 << chan); 362} 363 364/* 365 * Check for problems with the address range of a DMA transfer 366 * (non-contiguous physical pages, outside of bus address space, 367 * crossing DMA page boundaries). 368 * Return true if special handling needed. 369 */ 370 371static int 372isa_dmarangecheck(caddr_t va, u_int length, int chan) 373{ 374 vm_paddr_t phys, priorpage = 0; 375 vm_offset_t endva; 376 u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1); 377 378 GIANT_REQUIRED; 379 380 endva = (vm_offset_t)round_page((vm_offset_t)va + length); 381 for (; va < (caddr_t) endva ; va += PAGE_SIZE) { 382 phys = trunc_page(pmap_extract(kernel_pmap, (vm_offset_t)va)); 383#define ISARAM_END RAM_END 384 if (phys == 0) 385 panic("isa_dmacheck: no physical page present"); 386 if (phys >= ISARAM_END) 387 return (1); 388 if (priorpage) { 389 if (priorpage + PAGE_SIZE != phys) 390 return (1); 391 /* check if crossing a DMA page boundary */ 392 if (((u_int)priorpage ^ (u_int)phys) & dma_pgmsk) 393 return (1); 394 } 395 priorpage = phys; 396 } 397 return (0); 398} 399 400/* 401 * Query the progress of a transfer on a DMA channel. 402 * 403 * To avoid having to interrupt a transfer in progress, we sample 404 * each of the high and low databytes twice, and apply the following 405 * logic to determine the correct count. 406 * 407 * Reads are performed with interrupts disabled, thus it is to be 408 * expected that the time between reads is very small. At most 409 * one rollover in the low count byte can be expected within the 410 * four reads that are performed. 411 * 412 * There are three gaps in which a rollover can occur : 413 * 414 * - read low1 415 * gap1 416 * - read high1 417 * gap2 418 * - read low2 419 * gap3 420 * - read high2 421 * 422 * If a rollover occurs in gap1 or gap2, the low2 value will be 423 * greater than the low1 value. In this case, low2 and high2 are a 424 * corresponding pair. 425 * 426 * In any other case, low1 and high1 can be considered to be correct. 427 * 428 * The function returns the number of bytes remaining in the transfer, 429 * or -1 if the channel requested is not active. 430 * 431 */ 432int 433isa_dmastatus(int chan) 434{ 435 u_long cnt = 0; 436 int ffport, waport; 437 u_long low1, high1, low2, high2; 438 439 /* channel active? */ 440 if ((dma_inuse & (1 << chan)) == 0) { 441 printf("isa_dmastatus: channel %d not active\n", chan); 442 return(-1); 443 } 444 /* channel busy? */ 445 446 if (((dma_busy & (1 << chan)) == 0) && 447 (dma_auto_mode & (1 << chan)) == 0 ) { 448 printf("chan %d not busy\n", chan); 449 return -2 ; 450 } 451 if (chan < 4) { /* low DMA controller */ 452 ffport = DMA1_FFC; 453 waport = DMA1_CHN(chan) + 1; 454 } else { /* high DMA controller */ 455 ffport = DMA2_FFC; 456 waport = DMA2_CHN(chan - 4) + 2; 457 } 458 459 disable_intr(); /* no interrupts Mr Jones! */ 460 outb(ffport, 0); /* clear register LSB flipflop */ 461 low1 = inb(waport); 462 high1 = inb(waport); 463 outb(ffport, 0); /* clear again */ 464 low2 = inb(waport); 465 high2 = inb(waport); 466 enable_intr(); /* enable interrupts again */ 467 468 /* 469 * Now decide if a wrap has tried to skew our results. 470 * Note that after TC, the count will read 0xffff, while we want 471 * to return zero, so we add and then mask to compensate. 472 */ 473 if (low1 >= low2) { 474 cnt = (low1 + (high1 << 8) + 1) & 0xffff; 475 } else { 476 cnt = (low2 + (high2 << 8) + 1) & 0xffff; 477 } 478 479 if (chan >= 4) /* high channels move words */ 480 cnt *= 2; 481 return(cnt); 482} 483 484/* 485 * Stop a DMA transfer currently in progress. 486 */ 487int 488isa_dmastop(int chan) 489{ 490 if ((dma_inuse & (1 << chan)) == 0) 491 printf("isa_dmastop: channel %d not acquired\n", chan); 492 493 if (((dma_busy & (1 << chan)) == 0) && 494 ((dma_auto_mode & (1 << chan)) == 0)) { 495 printf("chan %d not busy\n", chan); 496 return -2 ; 497 } 498 499 if ((chan & 4) == 0) { 500 outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */); 501 } else { 502 outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */); 503 } 504 return(isa_dmastatus(chan)); 505} 506 507/* 508 * Attach to the ISA PnP descriptor for the AT DMA controller 509 */ 510static struct isa_pnp_id atdma_ids[] = { 511 { 0x0002d041 /* PNP0200 */, "AT DMA controller" }, 512 { 0 } 513}; 514 515static int 516atdma_probe(device_t dev) 517{ 518 int result; 519 520 if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, atdma_ids)) <= 0) 521 device_quiet(dev); 522 return(result); 523} 524 525static int 526atdma_attach(device_t dev) 527{ 528 return(0); 529} 530 531static device_method_t atdma_methods[] = { 532 /* Device interface */ 533 DEVMETHOD(device_probe, atdma_probe), 534 DEVMETHOD(device_attach, atdma_attach), 535 DEVMETHOD(device_detach, bus_generic_detach), 536 DEVMETHOD(device_shutdown, bus_generic_shutdown), 537 DEVMETHOD(device_suspend, bus_generic_suspend), 538 DEVMETHOD(device_resume, bus_generic_resume), 539 { 0, 0 } 540}; 541 542static driver_t atdma_driver = { 543 "atdma", 544 atdma_methods, 545 1, /* no softc */ 546}; 547 548static devclass_t atdma_devclass; 549 550DRIVER_MODULE(atdma, isa, atdma_driver, atdma_devclass, 0, 0); 551DRIVER_MODULE(atdma, acpi, atdma_driver, atdma_devclass, 0, 0); 552