bus_dma.h revision 143655
1/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ 2 3/*- 4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40/*- 41 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 42 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Christopher G. Demetriou 55 * for the NetBSD Project. 56 * 4. The name of the author may not be used to endorse or promote products 57 * derived from this software without specific prior written permission 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70/* $FreeBSD: head/sys/sys/bus_dma.h 143655 2005-03-15 14:57:30Z jmg $ */ 71 72#ifndef _BUS_DMA_H_ 73#define _BUS_DMA_H_ 74 75/* 76 * Machine independent interface for mapping physical addresses to peripheral 77 * bus 'physical' addresses, and assisting with DMA operations. 78 * 79 * XXX This file is always included from <machine/bus_dma.h> and should not 80 * (yet) be included directly. 81 */ 82 83/* 84 * Flags used in various bus DMA methods. 85 */ 86#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */ 87#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */ 88#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */ 89#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */ 90#define BUS_DMA_ZERO 0x08 /* allocate zero'ed memory */ 91#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */ 92#define BUS_DMA_BUS2 0x20 93#define BUS_DMA_BUS3 0x40 94#define BUS_DMA_BUS4 0x80 95 96/* 97 * The following two flags are non-standard or specific to only certain 98 * architectures 99 */ 100#define BUS_DMA_NOWRITE 0x100 101#define BUS_DMA_NOCACHE 0x200 102#define BUS_DMA_ISA 0x400 /* map memory for AXP ISA dma */ 103 104/* Forwards needed by prototypes below. */ 105struct mbuf; 106struct uio; 107 108/* 109 * Operations performed by bus_dmamap_sync(). 110 */ 111typedef int bus_dmasync_op_t; 112#define BUS_DMASYNC_PREREAD 1 113#define BUS_DMASYNC_POSTREAD 2 114#define BUS_DMASYNC_PREWRITE 4 115#define BUS_DMASYNC_POSTWRITE 8 116 117/* 118 * bus_dma_tag_t 119 * 120 * A machine-dependent opaque type describing the characteristics 121 * of how to perform DMA mappings. This structure encapsultes 122 * information concerning address and alignment restrictions, number 123 * of S/G segments, amount of data per S/G segment, etc. 124 */ 125typedef struct bus_dma_tag *bus_dma_tag_t; 126 127/* 128 * bus_dmamap_t 129 * 130 * DMA mapping instance information. 131 */ 132typedef struct bus_dmamap *bus_dmamap_t; 133 134/* 135 * bus_dma_segment_t 136 * 137 * Describes a single contiguous DMA transaction. Values 138 * are suitable for programming into DMA registers. 139 */ 140typedef struct bus_dma_segment { 141 bus_addr_t ds_addr; /* DMA address */ 142 bus_size_t ds_len; /* length of transfer */ 143} bus_dma_segment_t; 144 145/* 146 * A function that returns 1 if the address cannot be accessed by 147 * a device and 0 if it can be. 148 */ 149typedef int bus_dma_filter_t(void *, bus_addr_t); 150 151/* 152 * A function that performs driver-specific synchronization on behalf of 153 * busdma. 154 */ 155typedef enum { 156 BUS_DMA_LOCK = 0x01, 157 BUS_DMA_UNLOCK = 0x02, 158} bus_dma_lock_op_t; 159 160typedef void bus_dma_lock_t(void *, bus_dma_lock_op_t); 161 162/* 163 * Generic helper function for manipulating mutexes. 164 */ 165void busdma_lock_mutex(void *arg, bus_dma_lock_op_t op); 166 167/* 168 * Allocate a device specific dma_tag encapsulating the constraints of 169 * the parent tag in addition to other restrictions specified: 170 * 171 * alignment: Alignment for segments. 172 * boundary: Boundary that segments cannot cross. 173 * lowaddr: Low restricted address that cannot appear in a mapping. 174 * highaddr: High restricted address that cannot appear in a mapping. 175 * filtfunc: An optional function to further test if an address 176 * within the range of lowaddr and highaddr cannot appear 177 * in a mapping. 178 * filtfuncarg: An argument that will be passed to filtfunc in addition 179 * to the address to test. 180 * maxsize: Maximum mapping size supported by this tag. 181 * nsegments: Number of discontinuities allowed in maps. 182 * maxsegsz: Maximum size of a segment in the map. 183 * flags: Bus DMA flags. 184 * lockfunc: An optional function to handle driver-defined lock 185 * operations. 186 * lockfuncarg: An argument that will be passed to lockfunc in addition 187 * to the lock operation. 188 * dmat: A pointer to set to a valid dma tag should the return 189 * value of this function indicate success. 190 */ 191/* XXX Should probably allow specification of alignment */ 192int bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 193 bus_size_t boundary, bus_addr_t lowaddr, 194 bus_addr_t highaddr, bus_dma_filter_t *filtfunc, 195 void *filtfuncarg, bus_size_t maxsize, int nsegments, 196 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 197 void *lockfuncarg, bus_dma_tag_t *dmat); 198 199int bus_dma_tag_destroy(bus_dma_tag_t dmat); 200 201/* 202 * A function that processes a successfully loaded dma map or an error 203 * from a delayed load map. 204 */ 205typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); 206 207/* 208 * Like bus_dmamap_callback but includes map size in bytes. This is 209 * defined as a separate interface to maintain compatibility for users 210 * of bus_dmamap_callback_t--at some point these interfaces should be merged. 211 */ 212typedef void bus_dmamap_callback2_t(void *, bus_dma_segment_t *, int, bus_size_t, int); 213 214/* 215 * XXX sparc64 uses the same interface, but a much different implementation. 216 * <machine/bus_dma.h> for the sparc64 arch contains the equivalent 217 * declarations. 218 */ 219#if !defined(__sparc64__) 220 221/* 222 * Allocate a handle for mapping from kva/uva/physical 223 * address space into bus device space. 224 */ 225int bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp); 226 227/* 228 * Destroy a handle for mapping from kva/uva/physical 229 * address space into bus device space. 230 */ 231int bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map); 232 233/* 234 * Allocate a piece of memory that can be efficiently mapped into 235 * bus device space based on the constraints listed in the dma tag. 236 * A dmamap to for use with dmamap_load is also allocated. 237 */ 238int bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 239 bus_dmamap_t *mapp); 240 241/* 242 * Free a piece of memory and its allocated dmamap, that was allocated 243 * via bus_dmamem_alloc. 244 */ 245void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); 246 247/* 248 * Map the buffer buf into bus space using the dmamap map. 249 */ 250int bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, 251 bus_size_t buflen, bus_dmamap_callback_t *callback, 252 void *callback_arg, int flags); 253 254/* 255 * Like bus_dmamap_load but for mbufs. Note the use of the 256 * bus_dmamap_callback2_t interface. 257 */ 258int bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, 259 struct mbuf *mbuf, 260 bus_dmamap_callback2_t *callback, void *callback_arg, 261 int flags); 262 263int bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map, 264 struct mbuf *mbuf, bus_dma_segment_t *segs, 265 int *nsegs, int flags); 266 267/* 268 * Like bus_dmamap_load but for uios. Note the use of the 269 * bus_dmamap_callback2_t interface. 270 */ 271int bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, 272 struct uio *ui, 273 bus_dmamap_callback2_t *callback, void *callback_arg, 274 int flags); 275 276/* 277 * Perform a synchronization operation on the given map. 278 */ 279void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); 280#define bus_dmamap_sync(dmat, dmamap, op) \ 281 do { \ 282 if ((dmamap) != NULL) \ 283 _bus_dmamap_sync(dmat, dmamap, op); \ 284 } while (0) 285 286/* 287 * Release the mapping held by map. 288 */ 289void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map); 290#define bus_dmamap_unload(dmat, dmamap) \ 291 do { \ 292 if ((dmamap) != NULL) \ 293 _bus_dmamap_unload(dmat, dmamap); \ 294 } while (0) 295 296#endif /* __sparc64__ */ 297 298#endif /* _BUS_DMA_H_ */ 299