1/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ 2 3/*- 4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/*- 34 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 35 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Christopher G. Demetriou 48 * for the NetBSD Project. 49 * 4. The name of the author may not be used to endorse or promote products 50 * derived from this software without specific prior written permission 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 */ 63/* $FreeBSD$ */ 64 65#ifndef _BUS_DMA_H_ 66#define _BUS_DMA_H_ 67 68#include <sys/_bus_dma.h> 69 70/* 71 * Machine independent interface for mapping physical addresses to peripheral 72 * bus 'physical' addresses, and assisting with DMA operations. 73 * 74 * XXX This file is always included from <machine/bus_dma.h> and should not 75 * (yet) be included directly. 76 */ 77 78/* 79 * Flags used in various bus DMA methods. 80 */ 81#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */ 82#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */ 83#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */ 84#define BUS_DMA_COHERENT 0x04 /* hint: map memory in a coherent way */ 85#define BUS_DMA_ZERO 0x08 /* allocate zero'ed memory */ 86#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */ 87#define BUS_DMA_BUS2 0x20 88#define BUS_DMA_BUS3 0x40 89#define BUS_DMA_BUS4 0x80 90 91/* 92 * The following two flags are non-standard or specific to only certain 93 * architectures 94 */ 95#define BUS_DMA_NOWRITE 0x100 96#define BUS_DMA_NOCACHE 0x200 97 98/* 99 * The following flag is a DMA tag hint that the page offset of the 100 * loaded kernel virtual address must be preserved in the first 101 * physical segment address, when the KVA is loaded into DMA. 102 */ 103#define BUS_DMA_KEEP_PG_OFFSET 0x400 104 105#define BUS_DMA_LOAD_MBUF 0x800 106 107/* Forwards needed by prototypes below. */ 108union ccb; 109struct bio; 110struct mbuf; 111struct memdesc; 112struct pmap; 113struct uio; 114 115/* 116 * Operations performed by bus_dmamap_sync(). 117 */ 118#define BUS_DMASYNC_PREREAD 1 119#define BUS_DMASYNC_POSTREAD 2 120#define BUS_DMASYNC_PREWRITE 4 121#define BUS_DMASYNC_POSTWRITE 8 122 123/* 124 * bus_dma_segment_t 125 * 126 * Describes a single contiguous DMA transaction. Values 127 * are suitable for programming into DMA registers. 128 */ 129typedef struct bus_dma_segment { 130 bus_addr_t ds_addr; /* DMA address */ 131 bus_size_t ds_len; /* length of transfer */ 132} bus_dma_segment_t; 133 134/* 135 * A function that returns 1 if the address cannot be accessed by 136 * a device and 0 if it can be. 137 */ 138typedef int bus_dma_filter_t(void *, bus_addr_t); 139 140/* 141 * Generic helper function for manipulating mutexes. 142 */ 143void busdma_lock_mutex(void *arg, bus_dma_lock_op_t op); 144 145/* 146 * Allocate a device specific dma_tag encapsulating the constraints of 147 * the parent tag in addition to other restrictions specified: 148 * 149 * alignment: Alignment for segments. 150 * boundary: Boundary that segments cannot cross. 151 * lowaddr: Low restricted address that cannot appear in a mapping. 152 * highaddr: High restricted address that cannot appear in a mapping. 153 * filtfunc: An optional function to further test if an address 154 * within the range of lowaddr and highaddr cannot appear 155 * in a mapping. 156 * filtfuncarg: An argument that will be passed to filtfunc in addition 157 * to the address to test. 158 * maxsize: Maximum mapping size supported by this tag. 159 * nsegments: Number of discontinuities allowed in maps. 160 * maxsegsz: Maximum size of a segment in the map. 161 * flags: Bus DMA flags. 162 * lockfunc: An optional function to handle driver-defined lock 163 * operations. 164 * lockfuncarg: An argument that will be passed to lockfunc in addition 165 * to the lock operation. 166 * dmat: A pointer to set to a valid dma tag should the return 167 * value of this function indicate success. 168 */ 169/* XXX Should probably allow specification of alignment */ 170int bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, 171 bus_addr_t boundary, bus_addr_t lowaddr, 172 bus_addr_t highaddr, bus_dma_filter_t *filtfunc, 173 void *filtfuncarg, bus_size_t maxsize, int nsegments, 174 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, 175 void *lockfuncarg, bus_dma_tag_t *dmat); 176 177int bus_dma_tag_destroy(bus_dma_tag_t dmat); 178 179/* 180 * A function that processes a successfully loaded dma map or an error 181 * from a delayed load map. 182 */ 183typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); 184 185/* 186 * Like bus_dmamap_callback but includes map size in bytes. This is 187 * defined as a separate interface to maintain compatibility for users 188 * of bus_dmamap_callback_t--at some point these interfaces should be merged. 189 */ 190typedef void bus_dmamap_callback2_t(void *, bus_dma_segment_t *, int, bus_size_t, int); 191 192/* 193 * Map the buffer buf into bus space using the dmamap map. 194 */ 195int bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, 196 bus_size_t buflen, bus_dmamap_callback_t *callback, 197 void *callback_arg, int flags); 198 199/* 200 * Like bus_dmamap_load but for mbufs. Note the use of the 201 * bus_dmamap_callback2_t interface. 202 */ 203int bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, 204 struct mbuf *mbuf, 205 bus_dmamap_callback2_t *callback, void *callback_arg, 206 int flags); 207 208int bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map, 209 struct mbuf *mbuf, bus_dma_segment_t *segs, 210 int *nsegs, int flags); 211 212/* 213 * Like bus_dmamap_load but for uios. Note the use of the 214 * bus_dmamap_callback2_t interface. 215 */ 216int bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, 217 struct uio *ui, 218 bus_dmamap_callback2_t *callback, void *callback_arg, 219 int flags); 220 221/* 222 * Like bus_dmamap_load but for cam control blocks. 223 */ 224int bus_dmamap_load_ccb(bus_dma_tag_t dmat, bus_dmamap_t map, union ccb *ccb, 225 bus_dmamap_callback_t *callback, void *callback_arg, 226 int flags); 227 228/* 229 * Like bus_dmamap_load but for bios. 230 */ 231int bus_dmamap_load_bio(bus_dma_tag_t dmat, bus_dmamap_t map, struct bio *bio, 232 bus_dmamap_callback_t *callback, void *callback_arg, 233 int flags); 234 235/* 236 * Loads any memory descriptor. 237 */ 238int bus_dmamap_load_mem(bus_dma_tag_t dmat, bus_dmamap_t map, 239 struct memdesc *mem, bus_dmamap_callback_t *callback, 240 void *callback_arg, int flags); 241 242/* 243 * Placeholder for use by busdma implementations which do not benefit 244 * from optimized procedure to load an array of vm_page_t. Falls back 245 * to do _bus_dmamap_load_phys() in loop. 246 */ 247int bus_dmamap_load_ma_triv(bus_dma_tag_t dmat, bus_dmamap_t map, 248 struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, 249 bus_dma_segment_t *segs, int *segp); 250 251/* 252 * XXX sparc64 uses the same interface, but a much different implementation. 253 * <machine/bus_dma.h> for the sparc64 arch contains the equivalent 254 * declarations. 255 */ 256#if !defined(__sparc64__) 257 258/* 259 * Allocate a handle for mapping from kva/uva/physical 260 * address space into bus device space. 261 */ 262int bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp); 263 264/* 265 * Destroy a handle for mapping from kva/uva/physical 266 * address space into bus device space. 267 */ 268int bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map); 269 270/* 271 * Allocate a piece of memory that can be efficiently mapped into 272 * bus device space based on the constraints listed in the dma tag. 273 * A dmamap to for use with dmamap_load is also allocated. 274 */ 275int bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, 276 bus_dmamap_t *mapp); 277 278/* 279 * Free a piece of memory and its allocated dmamap, that was allocated 280 * via bus_dmamem_alloc. 281 */ 282void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); 283 284/* 285 * Perform a synchronization operation on the given map. If the map 286 * is NULL we have a fully IO-coherent system. On every ARM architecture 287 * there must be a memory barrier placed to ensure that all data 288 * accesses are visible before going any further. 289 */ 290void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); 291#if defined(__arm__) 292 #define __BUS_DMAMAP_SYNC_DEFAULT mb() 293#elif defined(__aarch64__) 294 #define __BUS_DMAMAP_SYNC_DEFAULT dmb(sy) 295#else 296 #define __BUS_DMAMAP_SYNC_DEFAULT do {} while (0) 297#endif 298#define bus_dmamap_sync(dmat, dmamap, op) \ 299 do { \ 300 if ((dmamap) != NULL) \ 301 _bus_dmamap_sync(dmat, dmamap, op); \ 302 else \ 303 __BUS_DMAMAP_SYNC_DEFAULT; \ 304 } while (0) 305 306/* 307 * Release the mapping held by map. 308 */ 309void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map); 310#define bus_dmamap_unload(dmat, dmamap) \ 311 do { \ 312 if ((dmamap) != NULL) \ 313 _bus_dmamap_unload(dmat, dmamap); \ 314 } while (0) 315 316/* 317 * The following functions define the interface between the MD and MI 318 * busdma layers. These are not intended for consumption by driver 319 * software. 320 */ 321void __bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, 322 struct memdesc *mem, 323 bus_dmamap_callback_t *callback, 324 void *callback_arg); 325 326#define _bus_dmamap_waitok(dmat, map, mem, callback, callback_arg) \ 327 do { \ 328 if ((map) != NULL) \ 329 __bus_dmamap_waitok(dmat, map, mem, callback, \ 330 callback_arg); \ 331 } while (0); 332 333int _bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, 334 void *buf, bus_size_t buflen, struct pmap *pmap, 335 int flags, bus_dma_segment_t *segs, int *segp); 336 337int _bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, 338 vm_paddr_t paddr, bus_size_t buflen, 339 int flags, bus_dma_segment_t *segs, int *segp); 340 341int _bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, 342 struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, 343 bus_dma_segment_t *segs, int *segp); 344 345bus_dma_segment_t *_bus_dmamap_complete(bus_dma_tag_t dmat, 346 bus_dmamap_t map, 347 bus_dma_segment_t *segs, 348 int nsegs, int error); 349 350#endif /* __sparc64__ */ 351 352#endif /* _BUS_DMA_H_ */ 353