bus_dma.h revision 113347
1/*	$NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $	*/
2
3/*-
4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*
41 * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
42 * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 *    notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 *    notice, this list of conditions and the following disclaimer in the
51 *    documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 *    must display the following acknowledgement:
54 *      This product includes software developed by Christopher G. Demetriou
55 *	for the NetBSD Project.
56 * 4. The name of the author may not be used to endorse or promote products
57 *    derived from this software without specific prior written permission
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 */
70/* $FreeBSD: head/sys/sys/bus_dma.h 113347 2003-04-10 23:03:33Z mux $ */
71
72#ifndef _I386_BUS_DMA_H_
73#define _I386_BUS_DMA_H_
74
75/*
76 * Flags used in various bus DMA methods.
77 */
78#define	BUS_DMA_WAITOK		0x00	/* safe to sleep (pseudo-flag) */
79#define	BUS_DMA_NOWAIT		0x01	/* not safe to sleep */
80#define	BUS_DMA_ALLOCNOW	0x02	/* perform resource allocation now */
81#define	BUS_DMAMEM_NOSYNC	0x04	/* map memory to not require sync */
82#define	BUS_DMA_BUS1		0x10	/* placeholders for bus functions... */
83#define	BUS_DMA_BUS2		0x20
84#define	BUS_DMA_BUS3		0x40
85#define	BUS_DMA_BUS4		0x80
86
87/* Forwards needed by prototypes below. */
88struct mbuf;
89struct uio;
90
91/*
92 * Operations performed by bus_dmamap_sync().
93 */
94#define	BUS_DMASYNC_PREREAD	1
95#define	BUS_DMASYNC_POSTREAD	2
96#define	BUS_DMASYNC_PREWRITE	4
97#define	BUS_DMASYNC_POSTWRITE	8
98
99/*
100 *	bus_dma_tag_t
101 *
102 *	A machine-dependent opaque type describing the characteristics
103 *	of how to perform DMA mappings.  This structure encapsultes
104 *	information concerning address and alignment restrictions, number
105 *	of S/G	segments, amount of data per S/G segment, etc.
106 */
107typedef struct bus_dma_tag	*bus_dma_tag_t;
108
109/*
110 *	bus_dmamap_t
111 *
112 *	DMA mapping instance information.
113 */
114typedef struct bus_dmamap	*bus_dmamap_t;
115
116/*
117 *	bus_dma_segment_t
118 *
119 *	Describes a single contiguous DMA transaction.  Values
120 *	are suitable for programming into DMA registers.
121 */
122typedef struct bus_dma_segment {
123	bus_addr_t	ds_addr;	/* DMA address */
124	bus_size_t	ds_len;		/* length of transfer */
125} bus_dma_segment_t;
126
127/*
128 * A function that returns 1 if the address cannot be accessed by
129 * a device and 0 if it can be.
130 */
131typedef int bus_dma_filter_t(void *, bus_addr_t);
132
133/*
134 * Allocate a device specific dma_tag encapsulating the constraints of
135 * the parent tag in addition to other restrictions specified:
136 *
137 *	alignment:	alignment for segments.
138 *	boundary:	Boundary that segments cannot cross.
139 *	lowaddr:	Low restricted address that cannot appear in a mapping.
140 *	highaddr:	High restricted address that cannot appear in a mapping.
141 *	filtfunc:	An optional function to further test if an address
142 *			within the range of lowaddr and highaddr cannot appear
143 *			in a mapping.
144 *	filtfuncarg:	An argument that will be passed to filtfunc in addition
145 *			to the address to test.
146 *	maxsize:	Maximum mapping size supported by this tag.
147 *	nsegments:	Number of discontinuities allowed in maps.
148 *	maxsegsz:	Maximum size of a segment in the map.
149 *	flags:		Bus DMA flags.
150 *	dmat:		A pointer to set to a valid dma tag should the return
151 *			value of this function indicate success.
152 */
153/* XXX Should probably allow specification of alignment */
154int bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
155		       bus_size_t boundary, bus_addr_t lowaddr,
156		       bus_addr_t highaddr, bus_dma_filter_t *filtfunc,
157		       void *filtfuncarg, bus_size_t maxsize, int nsegments,
158		       bus_size_t maxsegsz, int flags, bus_dma_tag_t *dmat);
159
160int bus_dma_tag_destroy(bus_dma_tag_t dmat);
161
162/*
163 * Allocate a handle for mapping from kva/uva/physical
164 * address space into bus device space.
165 */
166int bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp);
167
168/*
169 * Destroy  a handle for mapping from kva/uva/physical
170 * address space into bus device space.
171 */
172int bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map);
173
174/*
175 * Allocate a piece of memory that can be efficiently mapped into
176 * bus device space based on the constraints lited in the dma tag.
177 * A dmamap to for use with dmamap_load is also allocated.
178 */
179int bus_dmamem_alloc_size(bus_dma_tag_t dmat, void** vaddr, int flags,
180			  bus_dmamap_t *mapp, bus_size_t size);
181
182int bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
183		     bus_dmamap_t *mapp);
184
185/*
186 * Free a piece of memory and it's allociated dmamap, that was allocated
187 * via bus_dmamem_alloc.
188 */
189void bus_dmamem_free_size(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map,
190			  bus_size_t size);
191
192void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map);
193
194/*
195 * A function that processes a successfully loaded dma map or an error
196 * from a delayed load map.
197 */
198typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int);
199
200/*
201 * Map the buffer buf into bus space using the dmamap map.
202 */
203int bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
204		    bus_size_t buflen, bus_dmamap_callback_t *callback,
205		    void *callback_arg, int flags);
206
207/*
208 * Like bus_dmamap_callback but includes map size in bytes.  This is
209 * defined as a separate interface to maintain compatiiblity for users
210 * of bus_dmamap_callback_t--at some point these interfaces should be merged.
211 */
212typedef void bus_dmamap_callback2_t(void *, bus_dma_segment_t *, int, bus_size_t, int);
213/*
214 * Like bus_dmamap_load but for mbufs.  Note the use of the
215 * bus_dmamap_callback2_t interface.
216 */
217int bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map,
218			 struct mbuf *mbuf,
219			 bus_dmamap_callback2_t *callback, void *callback_arg,
220			 int flags);
221/*
222 * Like bus_dmamap_load but for uios.  Note the use of the
223 * bus_dmamap_callback2_t interface.
224 */
225int bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map,
226			struct uio *ui,
227			bus_dmamap_callback2_t *callback, void *callback_arg,
228			int flags);
229
230/*
231 * Perform a syncronization operation on the given map.
232 */
233void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, int);
234#define bus_dmamap_sync(dmat, dmamap, op) 		\
235	if ((dmamap) != NULL)				\
236		_bus_dmamap_sync(dmat, dmamap, op)
237
238/*
239 * Release the mapping held by map.
240 */
241void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map);
242#define bus_dmamap_unload(dmat, dmamap) 		\
243	if ((dmamap) != NULL)				\
244		_bus_dmamap_unload(dmat, dmamap)
245
246#endif /* _I386_BUS_DMA_H_ */
247