vmparam.h revision 298627
1292407Sbr/*- 2292407Sbr * Copyright (c) 1990 The Regents of the University of California. 3292407Sbr * All rights reserved. 4292407Sbr * Copyright (c) 1994 John S. Dyson 5292407Sbr * All rights reserved. 6292407Sbr * 7292407Sbr * This code is derived from software contributed to Berkeley by 8292407Sbr * William Jolitz. 9292407Sbr * 10292407Sbr * Redistribution and use in source and binary forms, with or without 11292407Sbr * modification, are permitted provided that the following conditions 12292407Sbr * are met: 13292407Sbr * 1. Redistributions of source code must retain the above copyright 14292407Sbr * notice, this list of conditions and the following disclaimer. 15292407Sbr * 2. Redistributions in binary form must reproduce the above copyright 16292407Sbr * notice, this list of conditions and the following disclaimer in the 17292407Sbr * documentation and/or other materials provided with the distribution. 18292407Sbr * 3. Neither the name of the University nor the names of its contributors 19292407Sbr * may be used to endorse or promote products derived from this software 20292407Sbr * without specific prior written permission. 21292407Sbr * 22292407Sbr * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23292407Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24292407Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25292407Sbr * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26292407Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27292407Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28292407Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29292407Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30292407Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31292407Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32292407Sbr * SUCH DAMAGE. 33292407Sbr * 34292407Sbr * from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91 35292407Sbr * from: FreeBSD: src/sys/i386/include/vmparam.h,v 1.33 2000/03/30 36292407Sbr * $FreeBSD: head/sys/riscv/include/vmparam.h 298627 2016-04-26 11:53:37Z br $ 37292407Sbr */ 38292407Sbr 39292407Sbr#ifndef _MACHINE_VMPARAM_H_ 40292407Sbr#define _MACHINE_VMPARAM_H_ 41292407Sbr 42292407Sbr/* 43292407Sbr * Virtual memory related constants, all in bytes 44292407Sbr */ 45292407Sbr#ifndef MAXTSIZ 46295761Sbr#define MAXTSIZ (1*1024*1024*1024) /* max text size */ 47292407Sbr#endif 48292407Sbr#ifndef DFLDSIZ 49292407Sbr#define DFLDSIZ (128*1024*1024) /* initial data size limit */ 50292407Sbr#endif 51292407Sbr#ifndef MAXDSIZ 52295761Sbr#define MAXDSIZ (1*1024*1024*1024) /* max data size */ 53292407Sbr#endif 54292407Sbr#ifndef DFLSSIZ 55295761Sbr#define DFLSSIZ (128*1024*1024) /* initial stack size limit */ 56292407Sbr#endif 57292407Sbr#ifndef MAXSSIZ 58295761Sbr#define MAXSSIZ (1*1024*1024*1024) /* max stack size */ 59292407Sbr#endif 60292407Sbr#ifndef SGROWSIZ 61292407Sbr#define SGROWSIZ (128*1024) /* amount to grow stack */ 62292407Sbr#endif 63292407Sbr 64292407Sbr/* 65292407Sbr * The physical address space is sparsely populated. 66292407Sbr */ 67292407Sbr#define VM_PHYSSEG_SPARSE 68292407Sbr 69292407Sbr/* 70292407Sbr * The number of PHYSSEG entries must be one greater than the number 71292407Sbr * of phys_avail entries because the phys_avail entry that spans the 72292407Sbr * largest physical address that is accessible by ISA DMA is split 73292407Sbr * into two PHYSSEG entries. 74292407Sbr */ 75292407Sbr#define VM_PHYSSEG_MAX 64 76292407Sbr 77292407Sbr/* 78292407Sbr * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool 79292407Sbr * from which physical pages are allocated and VM_FREEPOOL_DIRECT is 80292407Sbr * the pool from which physical pages for small UMA objects are 81292407Sbr * allocated. 82292407Sbr */ 83292407Sbr#define VM_NFREEPOOL 2 84292407Sbr#define VM_FREEPOOL_DEFAULT 0 85292407Sbr#define VM_FREEPOOL_DIRECT 1 86292407Sbr 87292407Sbr/* 88292407Sbr * Create two free page lists: VM_FREELIST_DEFAULT is for physical 89292407Sbr * pages that are above the largest physical address that is 90292407Sbr * accessible by ISA DMA and VM_FREELIST_ISADMA is for physical pages 91292407Sbr * that are below that address. 92292407Sbr */ 93292407Sbr#define VM_NFREELIST 2 94292407Sbr#define VM_FREELIST_DEFAULT 0 95292407Sbr#define VM_FREELIST_ISADMA 1 96292407Sbr 97292407Sbr/* 98292407Sbr * An allocation size of 16MB is supported in order to optimize the 99292407Sbr * use of the direct map by UMA. Specifically, a cache line contains 100292407Sbr * at most four TTEs, collectively mapping 16MB of physical memory. 101292407Sbr * By reducing the number of distinct 16MB "pages" that are used by UMA, 102292407Sbr * the physical memory allocator reduces the likelihood of both 4MB 103292407Sbr * page TLB misses and cache misses caused by 4MB page TLB misses. 104292407Sbr */ 105292407Sbr#define VM_NFREEORDER 12 106292407Sbr 107292407Sbr/* 108292407Sbr * Enable superpage reservations: 1 level. 109292407Sbr */ 110292407Sbr#ifndef VM_NRESERVLEVEL 111292407Sbr#define VM_NRESERVLEVEL 1 112292407Sbr#endif 113292407Sbr 114292407Sbr/* 115292407Sbr * Level 0 reservations consist of 512 pages. 116292407Sbr */ 117292407Sbr#ifndef VM_LEVEL_0_ORDER 118292407Sbr#define VM_LEVEL_0_ORDER 9 119292407Sbr#endif 120292407Sbr 121292407Sbr/** 122292407Sbr * Address space layout. 123292407Sbr * 124292407Sbr * RISC-V implements up to a 48 bit virtual address space. The address space is 125292407Sbr * split into 2 regions at each end of the 64 bit address space, with an 126292407Sbr * out of range "hole" in the middle. 127292407Sbr * 128292407Sbr * We limit the size of the two spaces to 39 bits each. 129292407Sbr * 130292407Sbr * Upper region: 0xffffffffffffffff 131295761Sbr * 0xffffff8000000000 132292407Sbr * 133295761Sbr * Hole: 0xffffff7fffffffff 134295761Sbr * 0x0000008000000000 135292407Sbr * 136295761Sbr * Lower region: 0x0000007fffffffff 137292407Sbr * 0x0000000000000000 138292407Sbr * 139292407Sbr * We use the upper region for the kernel, and the lower region for userland. 140292407Sbr * 141292407Sbr * We define some interesting address constants: 142292407Sbr * 143292407Sbr * VM_MIN_ADDRESS and VM_MAX_ADDRESS define the start and end of the entire 144292407Sbr * 64 bit address space, mostly just for convenience. 145292407Sbr * 146292407Sbr * VM_MIN_KERNEL_ADDRESS and VM_MAX_KERNEL_ADDRESS define the start and end of 147292407Sbr * mappable kernel virtual address space. 148292407Sbr * 149292407Sbr * VM_MIN_USER_ADDRESS and VM_MAX_USER_ADDRESS define the start and end of the 150292407Sbr * user address space. 151292407Sbr */ 152292407Sbr#define VM_MIN_ADDRESS (0x0000000000000000UL) 153292407Sbr#define VM_MAX_ADDRESS (0xffffffffffffffffUL) 154292407Sbr 155295761Sbr/* 32 GiB of kernel addresses */ 156298580Sbr#define VM_MIN_KERNEL_ADDRESS (0xffffffc000000000UL) 157298580Sbr#define VM_MAX_KERNEL_ADDRESS (0xffffffc800000000UL) 158292407Sbr 159295761Sbr/* Direct Map for 128 GiB of PA: 0x0 - 0x1fffffffff */ 160298580Sbr#define DMAP_MIN_ADDRESS (0xffffffd000000000UL) 161298580Sbr#define DMAP_MAX_ADDRESS (0xffffffefffffffffUL) 162292407Sbr 163292407Sbr#define DMAP_MIN_PHYSADDR (0x0000000000000000UL) 164292407Sbr#define DMAP_MAX_PHYSADDR (DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS) 165292407Sbr 166292407Sbr/* True if pa is in the dmap range */ 167295761Sbr#define PHYS_IN_DMAP(pa) ((pa) >= DMAP_MIN_PHYSADDR && \ 168295761Sbr (pa) <= DMAP_MAX_PHYSADDR) 169292407Sbr/* True if va is in the dmap range */ 170292407Sbr#define VIRT_IN_DMAP(va) ((va) >= DMAP_MIN_ADDRESS && \ 171292407Sbr (va) <= DMAP_MAX_ADDRESS) 172292407Sbr 173292407Sbr#define PHYS_TO_DMAP(pa) \ 174292407Sbr({ \ 175292407Sbr KASSERT(PHYS_IN_DMAP(pa), \ 176292407Sbr ("%s: PA out of range, PA: 0x%lx", __func__, \ 177292407Sbr (vm_paddr_t)(pa))); \ 178292407Sbr (pa) | DMAP_MIN_ADDRESS; \ 179292407Sbr}) 180292407Sbr 181292407Sbr#define DMAP_TO_PHYS(va) \ 182292407Sbr({ \ 183292407Sbr KASSERT(VIRT_IN_DMAP(va), \ 184292407Sbr ("%s: VA out of range, VA: 0x%lx", __func__, \ 185292407Sbr (vm_offset_t)(va))); \ 186292407Sbr (va) & ~DMAP_MIN_ADDRESS; \ 187292407Sbr}) 188292407Sbr 189292407Sbr#define VM_MIN_USER_ADDRESS (0x0000000000000000UL) 190298580Sbr#define VM_MAX_USER_ADDRESS (0x0000004000000000UL) 191292407Sbr 192292407Sbr#define VM_MINUSER_ADDRESS (VM_MIN_USER_ADDRESS) 193292407Sbr#define VM_MAXUSER_ADDRESS (VM_MAX_USER_ADDRESS) 194292407Sbr 195292407Sbr#define KERNBASE (VM_MIN_KERNEL_ADDRESS) 196295761Sbr#define SHAREDPAGE (VM_MAXUSER_ADDRESS - PAGE_SIZE) 197295761Sbr#define USRSTACK SHAREDPAGE 198295761Sbr 199292407Sbr#define KERNENTRY (0x200) 200292407Sbr 201292407Sbr/* 202292407Sbr * How many physical pages per kmem arena virtual page. 203292407Sbr */ 204292407Sbr#ifndef VM_KMEM_SIZE_SCALE 205292407Sbr#define VM_KMEM_SIZE_SCALE (3) 206292407Sbr#endif 207292407Sbr 208292407Sbr/* 209292407Sbr * Optional floor (in bytes) on the size of the kmem arena. 210292407Sbr */ 211292407Sbr#ifndef VM_KMEM_SIZE_MIN 212292407Sbr#define VM_KMEM_SIZE_MIN (16 * 1024 * 1024) 213292407Sbr#endif 214292407Sbr 215292407Sbr/* 216292407Sbr * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the 217292407Sbr * kernel map. 218292407Sbr */ 219292407Sbr#ifndef VM_KMEM_SIZE_MAX 220292407Sbr#define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ 221292407Sbr VM_MIN_KERNEL_ADDRESS + 1) * 3 / 5) 222292407Sbr#endif 223292407Sbr 224292407Sbr/* 225292407Sbr * Initial pagein size of beginning of executable file. 226292407Sbr */ 227292407Sbr#ifndef VM_INITIAL_PAGEIN 228292407Sbr#define VM_INITIAL_PAGEIN 16 229292407Sbr#endif 230292407Sbr 231292407Sbr/* 232292407Sbr * RISCVTODO 233292407Sbr * #define UMA_MD_SMALL_ALLOC 234292407Sbr */ 235292407Sbr 236292407Sbrextern u_int tsb_kernel_ldd_phys; 237292407Sbrextern vm_offset_t vm_max_kernel_address; 238292407Sbrextern vm_offset_t init_pt_va; 239292407Sbr 240292407Sbr#define ZERO_REGION_SIZE (64 * 1024) /* 64KB */ 241292407Sbr 242298627Sbr#define DEVMAP_MAX_VADDR VM_MAX_KERNEL_ADDRESS 243298627Sbr 244292407Sbr#endif /* !_MACHINE_VMPARAM_H_ */ 245