bus_machdep.c revision 191447
1/*- 2 * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com> 3 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * NASA Ames Research Center. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> 40__FBSDID("$FreeBSD: head/sys/powerpc/powerpc/bus_machdep.c 191447 2009-04-24 03:06:32Z marcel $"); 41 42#define KTR_BE_IO 0 43#define KTR_LE_IO 0 44 45#include <sys/param.h> 46#include <sys/systm.h> 47#include <sys/bus.h> 48#include <sys/ktr.h> 49#include <vm/vm.h> 50#include <vm/pmap.h> 51 52#include <machine/bus.h> 53#include <machine/pio.h> 54#include <machine/md_var.h> 55 56#define TODO panic("%s: not implemented", __func__) 57 58#define MAX_EARLYBOOT_MAPPINGS 6 59 60static struct { 61 bus_addr_t addr; 62 bus_size_t size; 63} earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS]; 64static int earlyboot_map_idx = 0; 65 66void bs_remap_earlyboot(void); 67 68static __inline void * 69__ppc_ba(bus_space_handle_t bsh, bus_size_t ofs) 70{ 71 return ((void *)(bsh + ofs)); 72} 73 74static int 75bs_gen_map(bus_addr_t addr, bus_size_t size __unused, int flags __unused, 76 bus_space_handle_t *bshp) 77{ 78 /* 79 * Record what we did if we haven't enabled the MMU yet. We 80 * will need to remap it as soon as the MMU comes up. 81 */ 82 if (!pmap_bootstrapped) { 83 KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS, 84 ("%s: too many early boot mapping requests", __func__)); 85 earlyboot_mappings[earlyboot_map_idx].addr = addr; 86 earlyboot_mappings[earlyboot_map_idx].size = size; 87 earlyboot_map_idx++; 88 *bshp = addr; 89 } else { 90 *bshp = (bus_space_handle_t)pmap_mapdev(addr,size); 91 } 92 93 return (0); 94} 95 96void 97bs_remap_earlyboot(void) 98{ 99 int i; 100 vm_offset_t pa, spa; 101 102 if (hw_direct_map) 103 return; 104 105 for (i = 0; i < earlyboot_map_idx; i++) { 106 spa = earlyboot_mappings[i].addr; 107 108 pa = trunc_page(spa); 109 while (pa < spa + earlyboot_mappings[i].size) { 110 pmap_kenter(pa,pa); 111 pa += PAGE_SIZE; 112 } 113 } 114} 115 116static void 117bs_gen_unmap(bus_size_t size __unused) 118{ 119} 120 121static int 122bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs, 123 bus_size_t size __unused, bus_space_handle_t *nbshp) 124{ 125 *nbshp = bsh + ofs; 126 return (0); 127} 128 129static int 130bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused, 131 bus_size_t size __unused, bus_size_t alignment __unused, 132 bus_size_t boundary __unused, int flags __unused, 133 bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused) 134{ 135 TODO; 136} 137 138static void 139bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused) 140{ 141 TODO; 142} 143 144static void 145bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused, 146 bus_size_t size __unused, int flags __unused) 147{ 148 __asm __volatile("eieio; sync" : : : "memory"); 149} 150 151/* 152 * Big-endian access functions 153 */ 154static uint8_t 155bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs) 156{ 157 volatile uint8_t *addr; 158 uint8_t res; 159 160 addr = __ppc_ba(bsh, ofs); 161 res = *addr; 162 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); 163 return (res); 164} 165 166static uint16_t 167bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs) 168{ 169 volatile uint16_t *addr; 170 uint16_t res; 171 172 addr = __ppc_ba(bsh, ofs); 173 res = *addr; 174 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); 175 return (res); 176} 177 178static uint32_t 179bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs) 180{ 181 volatile uint32_t *addr; 182 uint32_t res; 183 184 addr = __ppc_ba(bsh, ofs); 185 res = *addr; 186 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); 187 return (res); 188} 189 190static uint64_t 191bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs) 192{ 193 TODO; 194} 195 196static void 197bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 198{ 199 ins8(__ppc_ba(bsh, ofs), addr, cnt); 200} 201 202static void 203bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 204{ 205 ins16(__ppc_ba(bsh, ofs), addr, cnt); 206} 207 208static void 209bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 210{ 211 ins32(__ppc_ba(bsh, ofs), addr, cnt); 212} 213 214static void 215bs_be_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt) 216{ 217 TODO; 218} 219 220static void 221bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 222{ 223 volatile uint8_t *s = __ppc_ba(bsh, ofs); 224 225 while (cnt--) 226 *addr++ = *s++; 227 __asm __volatile("eieio; sync"); 228} 229 230static void 231bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 232{ 233 volatile uint16_t *s = __ppc_ba(bsh, ofs); 234 235 while (cnt--) 236 *addr++ = *s++; 237 __asm __volatile("eieio; sync"); 238} 239 240static void 241bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 242{ 243 volatile uint32_t *s = __ppc_ba(bsh, ofs); 244 245 while (cnt--) 246 *addr++ = *s++; 247 __asm __volatile("eieio; sync"); 248} 249 250static void 251bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) 252{ 253 TODO; 254} 255 256static void 257bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) 258{ 259 volatile uint8_t *addr; 260 261 addr = __ppc_ba(bsh, ofs); 262 *addr = val; 263 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); 264} 265 266static void 267bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) 268{ 269 volatile uint16_t *addr; 270 271 addr = __ppc_ba(bsh, ofs); 272 *addr = val; 273 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); 274} 275 276static void 277bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) 278{ 279 volatile uint32_t *addr; 280 281 addr = __ppc_ba(bsh, ofs); 282 *addr = val; 283 CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); 284} 285 286static void 287bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) 288{ 289 TODO; 290} 291 292static void 293bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 294 bus_size_t cnt) 295{ 296 outsb(__ppc_ba(bsh, ofs), addr, cnt); 297} 298 299static void 300bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 301 bus_size_t cnt) 302{ 303 outsw(__ppc_ba(bsh, ofs), addr, cnt); 304} 305 306static void 307bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 308 bus_size_t cnt) 309{ 310 outsl(__ppc_ba(bsh, ofs), addr, cnt); 311} 312 313static void 314bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 315 bus_size_t cnt) 316{ 317 TODO; 318} 319 320static void 321bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 322 size_t cnt) 323{ 324 volatile uint8_t *d = __ppc_ba(bsh, ofs); 325 326 while (cnt--) 327 *d++ = *addr++; 328 __asm __volatile("eieio; sync"); 329} 330 331static void 332bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 333 size_t cnt) 334{ 335 volatile uint16_t *d = __ppc_ba(bsh, ofs); 336 337 while (cnt--) 338 *d++ = *addr++; 339 __asm __volatile("eieio; sync"); 340} 341 342static void 343bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 344 size_t cnt) 345{ 346 volatile uint32_t *d = __ppc_ba(bsh, ofs); 347 348 while (cnt--) 349 *d++ = *addr++; 350 __asm __volatile("eieio; sync"); 351} 352 353static void 354bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 355 size_t cnt) 356{ 357 TODO; 358} 359 360static void 361bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 362{ 363 volatile uint8_t *d = __ppc_ba(bsh, ofs); 364 365 while (cnt--) 366 *d = val; 367 __asm __volatile("eieio; sync"); 368} 369 370static void 371bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 372{ 373 volatile uint16_t *d = __ppc_ba(bsh, ofs); 374 375 while (cnt--) 376 *d = val; 377 __asm __volatile("eieio; sync"); 378} 379 380static void 381bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 382{ 383 volatile uint32_t *d = __ppc_ba(bsh, ofs); 384 385 while (cnt--) 386 *d = val; 387 __asm __volatile("eieio; sync"); 388} 389 390static void 391bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 392{ 393 TODO; 394} 395 396static void 397bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 398{ 399 volatile uint8_t *d = __ppc_ba(bsh, ofs); 400 401 while (cnt--) 402 *d++ = val; 403 __asm __volatile("eieio; sync"); 404} 405 406static void 407bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 408{ 409 volatile uint16_t *d = __ppc_ba(bsh, ofs); 410 411 while (cnt--) 412 *d++ = val; 413 __asm __volatile("eieio; sync"); 414} 415 416static void 417bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 418{ 419 volatile uint32_t *d = __ppc_ba(bsh, ofs); 420 421 while (cnt--) 422 *d++ = val; 423 __asm __volatile("eieio; sync"); 424} 425 426static void 427bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 428{ 429 TODO; 430} 431 432/* 433 * Little-endian access functions 434 */ 435static uint8_t 436bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs) 437{ 438 volatile uint8_t *addr; 439 uint8_t res; 440 441 addr = __ppc_ba(bsh, ofs); 442 res = *addr; 443 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); 444 return (res); 445} 446 447static uint16_t 448bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs) 449{ 450 volatile uint16_t *addr; 451 uint16_t res; 452 453 addr = __ppc_ba(bsh, ofs); 454 __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr)); 455 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); 456 return (res); 457} 458 459static uint32_t 460bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs) 461{ 462 volatile uint32_t *addr; 463 uint32_t res; 464 465 addr = __ppc_ba(bsh, ofs); 466 __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr)); 467 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); 468 return (res); 469} 470 471static uint64_t 472bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs) 473{ 474 TODO; 475} 476 477static void 478bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 479{ 480 ins8(__ppc_ba(bsh, ofs), addr, cnt); 481} 482 483static void 484bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 485{ 486 ins16rb(__ppc_ba(bsh, ofs), addr, cnt); 487} 488 489static void 490bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 491{ 492 ins32rb(__ppc_ba(bsh, ofs), addr, cnt); 493} 494 495static void 496bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt) 497{ 498 TODO; 499} 500 501static void 502bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 503{ 504 volatile uint8_t *s = __ppc_ba(bsh, ofs); 505 506 while (cnt--) 507 *addr++ = *s++; 508 __asm __volatile("eieio; sync"); 509} 510 511static void 512bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 513{ 514 volatile uint16_t *s = __ppc_ba(bsh, ofs); 515 516 while (cnt--) 517 *addr++ = in16rb(s++); 518 __asm __volatile("eieio; sync"); 519} 520 521static void 522bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 523{ 524 volatile uint32_t *s = __ppc_ba(bsh, ofs); 525 526 while (cnt--) 527 *addr++ = in32rb(s++); 528 __asm __volatile("eieio; sync"); 529} 530 531static void 532bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) 533{ 534 TODO; 535} 536 537static void 538bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) 539{ 540 volatile uint8_t *addr; 541 542 addr = __ppc_ba(bsh, ofs); 543 *addr = val; 544 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); 545} 546 547static void 548bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) 549{ 550 volatile uint16_t *addr; 551 552 addr = __ppc_ba(bsh, ofs); 553 __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr)); 554 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); 555} 556 557static void 558bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) 559{ 560 volatile uint32_t *addr; 561 562 addr = __ppc_ba(bsh, ofs); 563 __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr)); 564 CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); 565} 566 567static void 568bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) 569{ 570 TODO; 571} 572 573static void 574bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 575 bus_size_t cnt) 576{ 577 outs8(__ppc_ba(bsh, ofs), addr, cnt); 578} 579 580static void 581bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 582 bus_size_t cnt) 583{ 584 outs16rb(__ppc_ba(bsh, ofs), addr, cnt); 585} 586 587static void 588bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 589 bus_size_t cnt) 590{ 591 outs32rb(__ppc_ba(bsh, ofs), addr, cnt); 592} 593 594static void 595bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 596 bus_size_t cnt) 597{ 598 TODO; 599} 600 601static void 602bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 603 size_t cnt) 604{ 605 volatile uint8_t *d = __ppc_ba(bsh, ofs); 606 607 while (cnt--) 608 *d++ = *addr++; 609 __asm __volatile("eieio; sync"); 610} 611 612static void 613bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 614 size_t cnt) 615{ 616 volatile uint16_t *d = __ppc_ba(bsh, ofs); 617 618 while (cnt--) 619 out16rb(d++, *addr++); 620 __asm __volatile("eieio; sync"); 621} 622 623static void 624bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 625 size_t cnt) 626{ 627 volatile uint32_t *d = __ppc_ba(bsh, ofs); 628 629 while (cnt--) 630 out32rb(d++, *addr++); 631 __asm __volatile("eieio; sync"); 632} 633 634static void 635bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 636 size_t cnt) 637{ 638 TODO; 639} 640 641static void 642bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 643{ 644 volatile uint8_t *d = __ppc_ba(bsh, ofs); 645 646 while (cnt--) 647 *d = val; 648 __asm __volatile("eieio; sync"); 649} 650 651static void 652bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 653{ 654 volatile uint16_t *d = __ppc_ba(bsh, ofs); 655 656 while (cnt--) 657 out16rb(d, val); 658 __asm __volatile("eieio; sync"); 659} 660 661static void 662bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 663{ 664 volatile uint32_t *d = __ppc_ba(bsh, ofs); 665 666 while (cnt--) 667 out32rb(d, val); 668 __asm __volatile("eieio; sync"); 669} 670 671static void 672bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 673{ 674 TODO; 675} 676 677static void 678bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 679{ 680 volatile uint8_t *d = __ppc_ba(bsh, ofs); 681 682 while (cnt--) 683 *d++ = val; 684 __asm __volatile("eieio; sync"); 685} 686 687static void 688bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 689{ 690 volatile uint16_t *d = __ppc_ba(bsh, ofs); 691 692 while (cnt--) 693 out16rb(d++, val); 694 __asm __volatile("eieio; sync"); 695} 696 697static void 698bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 699{ 700 volatile uint32_t *d = __ppc_ba(bsh, ofs); 701 702 while (cnt--) 703 out32rb(d++, val); 704 __asm __volatile("eieio; sync"); 705} 706 707static void 708bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 709{ 710 TODO; 711} 712 713struct bus_space bs_be_tag = { 714 /* mapping/unmapping */ 715 bs_gen_map, 716 bs_gen_unmap, 717 bs_gen_subregion, 718 719 /* allocation/deallocation */ 720 bs_gen_alloc, 721 bs_gen_free, 722 723 /* barrier */ 724 bs_gen_barrier, 725 726 /* read (single) */ 727 bs_be_rs_1, 728 bs_be_rs_2, 729 bs_be_rs_4, 730 bs_be_rs_8, 731 732 bs_be_rs_2, 733 bs_be_rs_4, 734 bs_be_rs_8, 735 736 /* read multiple */ 737 bs_be_rm_1, 738 bs_be_rm_2, 739 bs_be_rm_4, 740 bs_be_rm_8, 741 742 bs_be_rm_2, 743 bs_be_rm_4, 744 bs_be_rm_8, 745 746 /* read region */ 747 bs_be_rr_1, 748 bs_be_rr_2, 749 bs_be_rr_4, 750 bs_be_rr_8, 751 752 bs_be_rr_2, 753 bs_be_rr_4, 754 bs_be_rr_8, 755 756 /* write (single) */ 757 bs_be_ws_1, 758 bs_be_ws_2, 759 bs_be_ws_4, 760 bs_be_ws_8, 761 762 bs_be_ws_2, 763 bs_be_ws_4, 764 bs_be_ws_8, 765 766 /* write multiple */ 767 bs_be_wm_1, 768 bs_be_wm_2, 769 bs_be_wm_4, 770 bs_be_wm_8, 771 772 bs_be_wm_2, 773 bs_be_wm_4, 774 bs_be_wm_8, 775 776 /* write region */ 777 bs_be_wr_1, 778 bs_be_wr_2, 779 bs_be_wr_4, 780 bs_be_wr_8, 781 782 bs_be_wr_2, 783 bs_be_wr_4, 784 bs_be_wr_8, 785 786 /* set multiple */ 787 bs_be_sm_1, 788 bs_be_sm_2, 789 bs_be_sm_4, 790 bs_be_sm_8, 791 792 bs_be_sm_2, 793 bs_be_sm_4, 794 bs_be_sm_8, 795 796 /* set region */ 797 bs_be_sr_1, 798 bs_be_sr_2, 799 bs_be_sr_4, 800 bs_be_sr_8, 801 802 bs_be_sr_2, 803 bs_be_sr_4, 804 bs_be_sr_8, 805}; 806 807struct bus_space bs_le_tag = { 808 /* mapping/unmapping */ 809 bs_gen_map, 810 bs_gen_unmap, 811 bs_gen_subregion, 812 813 /* allocation/deallocation */ 814 bs_gen_alloc, 815 bs_gen_free, 816 817 /* barrier */ 818 bs_gen_barrier, 819 820 /* read (single) */ 821 bs_le_rs_1, 822 bs_le_rs_2, 823 bs_le_rs_4, 824 bs_le_rs_8, 825 826 bs_be_rs_2, 827 bs_be_rs_4, 828 bs_be_rs_8, 829 830 /* read multiple */ 831 bs_le_rm_1, 832 bs_le_rm_2, 833 bs_le_rm_4, 834 bs_le_rm_8, 835 836 bs_be_rm_2, 837 bs_be_rm_4, 838 bs_be_rm_8, 839 840 /* read region */ 841 bs_le_rr_1, 842 bs_le_rr_2, 843 bs_le_rr_4, 844 bs_le_rr_8, 845 846 bs_be_rr_2, 847 bs_be_rr_4, 848 bs_be_rr_8, 849 850 /* write (single) */ 851 bs_le_ws_1, 852 bs_le_ws_2, 853 bs_le_ws_4, 854 bs_le_ws_8, 855 856 bs_be_ws_2, 857 bs_be_ws_4, 858 bs_be_ws_8, 859 860 /* write multiple */ 861 bs_le_wm_1, 862 bs_le_wm_2, 863 bs_le_wm_4, 864 bs_le_wm_8, 865 866 bs_be_wm_2, 867 bs_be_wm_4, 868 bs_be_wm_8, 869 870 /* write region */ 871 bs_le_wr_1, 872 bs_le_wr_2, 873 bs_le_wr_4, 874 bs_le_wr_8, 875 876 bs_be_wr_2, 877 bs_be_wr_4, 878 bs_be_wr_8, 879 880 /* set multiple */ 881 bs_le_sm_1, 882 bs_le_sm_2, 883 bs_le_sm_4, 884 bs_le_sm_8, 885 886 bs_be_sm_2, 887 bs_be_sm_4, 888 bs_be_sm_8, 889 890 /* set region */ 891 bs_le_sr_1, 892 bs_le_sr_2, 893 bs_le_sr_4, 894 bs_le_sr_8, 895 896 bs_be_sr_2, 897 bs_be_sr_4, 898 bs_be_sr_8, 899}; 900