bus_machdep.c revision 174782
1/*- 2 * Copyright (c) 2006 Semihalf, Rafal Jaworowski <raj@semihalf.com> 3 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * NASA Ames Research Center. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> 40__FBSDID("$FreeBSD: head/sys/powerpc/powerpc/bus_machdep.c 174782 2007-12-19 18:00:50Z marcel $"); 41 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/bus.h> 45 46#include <machine/bus.h> 47#include <machine/pio.h> 48 49#define TODO panic("%s: not implemented", __func__) 50 51static __inline void * 52__ppc_ba(bus_space_handle_t bsh, bus_size_t ofs) 53{ 54 return ((void *)(bsh + ofs)); 55} 56 57static int 58bs_gen_map(bus_addr_t addr, bus_size_t size __unused, int flags __unused, 59 bus_space_handle_t *bshp) 60{ 61 *bshp = addr; 62 return (0); 63} 64 65static void 66bs_gen_unmap(bus_size_t size __unused) 67{ 68} 69 70static int 71bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs, 72 bus_size_t size __unused, bus_space_handle_t *nbshp) 73{ 74 *nbshp = bsh + ofs; 75 return (0); 76} 77 78static int 79bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused, 80 bus_size_t size __unused, bus_size_t alignment __unused, 81 bus_size_t boundary __unused, int flags __unused, 82 bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused) 83{ 84 TODO; 85} 86 87static void 88bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused) 89{ 90 TODO; 91} 92 93static void 94bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused, 95 bus_size_t size __unused, int flags __unused) 96{ 97 __asm __volatile("" : : : "memory"); 98} 99 100/* 101 * Big-endian access functions 102 */ 103static uint8_t 104bs_be_rs_1(bus_space_handle_t bsh, bus_size_t ofs) 105{ 106 return (in8(__ppc_ba(bsh, ofs))); 107} 108 109static uint16_t 110bs_be_rs_2(bus_space_handle_t bsh, bus_size_t ofs) 111{ 112 return (in16(__ppc_ba(bsh, ofs))); 113} 114 115static uint32_t 116bs_be_rs_4(bus_space_handle_t bsh, bus_size_t ofs) 117{ 118 return (in32(__ppc_ba(bsh, ofs))); 119} 120 121static uint64_t 122bs_be_rs_8(bus_space_handle_t bsh, bus_size_t ofs) 123{ 124 TODO; 125} 126 127static void 128bs_be_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 129{ 130 ins8(__ppc_ba(bsh, ofs), addr, cnt); 131} 132 133static void 134bs_be_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 135{ 136 ins16(__ppc_ba(bsh, ofs), addr, cnt); 137} 138 139static void 140bs_be_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 141{ 142 ins32(__ppc_ba(bsh, ofs), addr, cnt); 143} 144 145static void 146bs_be_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt) 147{ 148 TODO; 149} 150 151static void 152bs_be_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 153{ 154 volatile uint8_t *s = __ppc_ba(bsh, ofs); 155 156 while (cnt--) 157 *addr++ = *s++; 158 __asm __volatile("eieio; sync"); 159} 160 161static void 162bs_be_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 163{ 164 volatile uint16_t *s = __ppc_ba(bsh, ofs); 165 166 while (cnt--) 167 *addr++ = *s++; 168 __asm __volatile("eieio; sync"); 169} 170 171static void 172bs_be_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 173{ 174 volatile uint32_t *s = __ppc_ba(bsh, ofs); 175 176 while (cnt--) 177 *addr++ = *s++; 178 __asm __volatile("eieio; sync"); 179} 180 181static void 182bs_be_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) 183{ 184 TODO; 185} 186 187static void 188bs_be_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) 189{ 190 out8(__ppc_ba(bsh, ofs), val); 191} 192 193static void 194bs_be_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) 195{ 196 out16(__ppc_ba(bsh, ofs), val); 197} 198 199static void 200bs_be_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) 201{ 202 out32(__ppc_ba(bsh, ofs), val); 203} 204 205static void 206bs_be_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) 207{ 208 TODO; 209} 210 211static void 212bs_be_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 213 bus_size_t cnt) 214{ 215 outsb(__ppc_ba(bsh, ofs), addr, cnt); 216} 217 218static void 219bs_be_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 220 bus_size_t cnt) 221{ 222 outsw(__ppc_ba(bsh, ofs), addr, cnt); 223} 224 225static void 226bs_be_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 227 bus_size_t cnt) 228{ 229 outsl(__ppc_ba(bsh, ofs), addr, cnt); 230} 231 232static void 233bs_be_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 234 bus_size_t cnt) 235{ 236 TODO; 237} 238 239static void 240bs_be_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 241 size_t cnt) 242{ 243 volatile uint8_t *d = __ppc_ba(bsh, ofs); 244 245 while (cnt--) 246 *d++ = *addr++; 247 __asm __volatile("eieio; sync"); 248} 249 250static void 251bs_be_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 252 size_t cnt) 253{ 254 volatile uint16_t *d = __ppc_ba(bsh, ofs); 255 256 while (cnt--) 257 *d++ = *addr++; 258 __asm __volatile("eieio; sync"); 259} 260 261static void 262bs_be_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 263 size_t cnt) 264{ 265 volatile uint32_t *d = __ppc_ba(bsh, ofs); 266 267 while (cnt--) 268 *d++ = *addr++; 269 __asm __volatile("eieio; sync"); 270} 271 272static void 273bs_be_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 274 size_t cnt) 275{ 276 TODO; 277} 278 279static void 280bs_be_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 281{ 282 volatile uint8_t *d = __ppc_ba(bsh, ofs); 283 284 while (cnt--) 285 *d = val; 286 __asm __volatile("eieio; sync"); 287} 288 289static void 290bs_be_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 291{ 292 volatile uint16_t *d = __ppc_ba(bsh, ofs); 293 294 while (cnt--) 295 *d = val; 296 __asm __volatile("eieio; sync"); 297} 298 299static void 300bs_be_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 301{ 302 volatile uint32_t *d = __ppc_ba(bsh, ofs); 303 304 while (cnt--) 305 *d = val; 306 __asm __volatile("eieio; sync"); 307} 308 309static void 310bs_be_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 311{ 312 TODO; 313} 314 315static void 316bs_be_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 317{ 318 volatile uint8_t *d = __ppc_ba(bsh, ofs); 319 320 while (cnt--) 321 *d++ = val; 322 __asm __volatile("eieio; sync"); 323} 324 325static void 326bs_be_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 327{ 328 volatile uint16_t *d = __ppc_ba(bsh, ofs); 329 330 while (cnt--) 331 *d++ = val; 332 __asm __volatile("eieio; sync"); 333} 334 335static void 336bs_be_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 337{ 338 volatile uint32_t *d = __ppc_ba(bsh, ofs); 339 340 while (cnt--) 341 *d++ = val; 342 __asm __volatile("eieio; sync"); 343} 344 345static void 346bs_be_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 347{ 348 TODO; 349} 350 351/* 352 * Little-endian access functions 353 */ 354static uint8_t 355bs_le_rs_1(bus_space_handle_t bsh, bus_size_t ofs) 356{ 357 return (in8(__ppc_ba(bsh, ofs))); 358} 359 360static uint16_t 361bs_le_rs_2(bus_space_handle_t bsh, bus_size_t ofs) 362{ 363 return (in16rb(__ppc_ba(bsh, ofs))); 364} 365 366static uint32_t 367bs_le_rs_4(bus_space_handle_t bsh, bus_size_t ofs) 368{ 369 return (in32rb(__ppc_ba(bsh, ofs))); 370} 371 372static uint64_t 373bs_le_rs_8(bus_space_handle_t bsh, bus_size_t ofs) 374{ 375 TODO; 376} 377 378static void 379bs_le_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 380{ 381 ins8(__ppc_ba(bsh, ofs), addr, cnt); 382} 383 384static void 385bs_le_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 386{ 387 ins16rb(__ppc_ba(bsh, ofs), addr, cnt); 388} 389 390static void 391bs_le_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 392{ 393 ins32rb(__ppc_ba(bsh, ofs), addr, cnt); 394} 395 396static void 397bs_le_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt) 398{ 399 TODO; 400} 401 402static void 403bs_le_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) 404{ 405 volatile uint8_t *s = __ppc_ba(bsh, ofs); 406 407 while (cnt--) 408 *addr++ = *s++; 409 __asm __volatile("eieio; sync"); 410} 411 412static void 413bs_le_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) 414{ 415 volatile uint16_t *s = __ppc_ba(bsh, ofs); 416 417 while (cnt--) 418 *addr++ = in16rb(s++); 419 __asm __volatile("eieio; sync"); 420} 421 422static void 423bs_le_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) 424{ 425 volatile uint32_t *s = __ppc_ba(bsh, ofs); 426 427 while (cnt--) 428 *addr++ = in32rb(s++); 429 __asm __volatile("eieio; sync"); 430} 431 432static void 433bs_le_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) 434{ 435 TODO; 436} 437 438static void 439bs_le_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) 440{ 441 out8(__ppc_ba(bsh, ofs), val); 442} 443 444static void 445bs_le_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) 446{ 447 out16rb(__ppc_ba(bsh, ofs), val); 448} 449 450static void 451bs_le_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) 452{ 453 out32rb(__ppc_ba(bsh, ofs), val); 454} 455 456static void 457bs_le_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) 458{ 459 TODO; 460} 461 462static void 463bs_le_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 464 bus_size_t cnt) 465{ 466 outs8(__ppc_ba(bsh, ofs), addr, cnt); 467} 468 469static void 470bs_le_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 471 bus_size_t cnt) 472{ 473 outs16rb(__ppc_ba(bsh, ofs), addr, cnt); 474} 475 476static void 477bs_le_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 478 bus_size_t cnt) 479{ 480 outs32rb(__ppc_ba(bsh, ofs), addr, cnt); 481} 482 483static void 484bs_le_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 485 bus_size_t cnt) 486{ 487 TODO; 488} 489 490static void 491bs_le_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, 492 size_t cnt) 493{ 494 volatile uint8_t *d = __ppc_ba(bsh, ofs); 495 496 while (cnt--) 497 *d++ = *addr++; 498 __asm __volatile("eieio; sync"); 499} 500 501static void 502bs_le_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, 503 size_t cnt) 504{ 505 volatile uint16_t *d = __ppc_ba(bsh, ofs); 506 507 while (cnt--) 508 out16rb(d++, *addr++); 509 __asm __volatile("eieio; sync"); 510} 511 512static void 513bs_le_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, 514 size_t cnt) 515{ 516 volatile uint32_t *d = __ppc_ba(bsh, ofs); 517 518 while (cnt--) 519 out32rb(d++, *addr++); 520 __asm __volatile("eieio; sync"); 521} 522 523static void 524bs_le_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, 525 size_t cnt) 526{ 527 TODO; 528} 529 530static void 531bs_le_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 532{ 533 volatile uint8_t *d = __ppc_ba(bsh, ofs); 534 535 while (cnt--) 536 *d = val; 537 __asm __volatile("eieio; sync"); 538} 539 540static void 541bs_le_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 542{ 543 volatile uint16_t *d = __ppc_ba(bsh, ofs); 544 545 while (cnt--) 546 out16rb(d, val); 547 __asm __volatile("eieio; sync"); 548} 549 550static void 551bs_le_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 552{ 553 volatile uint32_t *d = __ppc_ba(bsh, ofs); 554 555 while (cnt--) 556 out32rb(d, val); 557 __asm __volatile("eieio; sync"); 558} 559 560static void 561bs_le_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 562{ 563 TODO; 564} 565 566static void 567bs_le_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) 568{ 569 volatile uint8_t *d = __ppc_ba(bsh, ofs); 570 571 while (cnt--) 572 *d++ = val; 573 __asm __volatile("eieio; sync"); 574} 575 576static void 577bs_le_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) 578{ 579 volatile uint16_t *d = __ppc_ba(bsh, ofs); 580 581 while (cnt--) 582 out16rb(d++, val); 583 __asm __volatile("eieio; sync"); 584} 585 586static void 587bs_le_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) 588{ 589 volatile uint32_t *d = __ppc_ba(bsh, ofs); 590 591 while (cnt--) 592 out32rb(d++, val); 593 __asm __volatile("eieio; sync"); 594} 595 596static void 597bs_le_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) 598{ 599 TODO; 600} 601 602struct bus_space bs_be_tag = { 603 /* mapping/unmapping */ 604 bs_gen_map, 605 bs_gen_unmap, 606 bs_gen_subregion, 607 608 /* allocation/deallocation */ 609 bs_gen_alloc, 610 bs_gen_free, 611 612 /* barrier */ 613 bs_gen_barrier, 614 615 /* read (single) */ 616 bs_be_rs_1, 617 bs_be_rs_2, 618 bs_be_rs_4, 619 bs_be_rs_8, 620 621 bs_be_rs_2, 622 bs_be_rs_4, 623 bs_be_rs_8, 624 625 /* read multiple */ 626 bs_be_rm_1, 627 bs_be_rm_2, 628 bs_be_rm_4, 629 bs_be_rm_8, 630 631 bs_be_rm_2, 632 bs_be_rm_4, 633 bs_be_rm_8, 634 635 /* read region */ 636 bs_be_rr_1, 637 bs_be_rr_2, 638 bs_be_rr_4, 639 bs_be_rr_8, 640 641 bs_be_rr_2, 642 bs_be_rr_4, 643 bs_be_rr_8, 644 645 /* write (single) */ 646 bs_be_ws_1, 647 bs_be_ws_2, 648 bs_be_ws_4, 649 bs_be_ws_8, 650 651 bs_be_ws_2, 652 bs_be_ws_4, 653 bs_be_ws_8, 654 655 /* write multiple */ 656 bs_be_wm_1, 657 bs_be_wm_2, 658 bs_be_wm_4, 659 bs_be_wm_8, 660 661 bs_be_wm_2, 662 bs_be_wm_4, 663 bs_be_wm_8, 664 665 /* write region */ 666 bs_be_wr_1, 667 bs_be_wr_2, 668 bs_be_wr_4, 669 bs_be_wr_8, 670 671 bs_be_wr_2, 672 bs_be_wr_4, 673 bs_be_wr_8, 674 675 /* set multiple */ 676 bs_be_sm_1, 677 bs_be_sm_2, 678 bs_be_sm_4, 679 bs_be_sm_8, 680 681 bs_be_sm_2, 682 bs_be_sm_4, 683 bs_be_sm_8, 684 685 /* set region */ 686 bs_be_sr_1, 687 bs_be_sr_2, 688 bs_be_sr_4, 689 bs_be_sr_8, 690 691 bs_be_sr_2, 692 bs_be_sr_4, 693 bs_be_sr_8, 694}; 695 696struct bus_space bs_le_tag = { 697 /* mapping/unmapping */ 698 bs_gen_map, 699 bs_gen_unmap, 700 bs_gen_subregion, 701 702 /* allocation/deallocation */ 703 bs_gen_alloc, 704 bs_gen_free, 705 706 /* barrier */ 707 bs_gen_barrier, 708 709 /* read (single) */ 710 bs_le_rs_1, 711 bs_le_rs_2, 712 bs_le_rs_4, 713 bs_le_rs_8, 714 715 bs_be_rs_2, 716 bs_be_rs_4, 717 bs_be_rs_8, 718 719 /* read multiple */ 720 bs_le_rm_1, 721 bs_le_rm_2, 722 bs_le_rm_4, 723 bs_le_rm_8, 724 725 bs_be_rm_2, 726 bs_be_rm_4, 727 bs_be_rm_8, 728 729 /* read region */ 730 bs_le_rr_1, 731 bs_le_rr_2, 732 bs_le_rr_4, 733 bs_le_rr_8, 734 735 bs_be_rr_2, 736 bs_be_rr_4, 737 bs_be_rr_8, 738 739 /* write (single) */ 740 bs_le_ws_1, 741 bs_le_ws_2, 742 bs_le_ws_4, 743 bs_le_ws_8, 744 745 bs_be_ws_2, 746 bs_be_ws_4, 747 bs_be_ws_8, 748 749 /* write multiple */ 750 bs_le_wm_1, 751 bs_le_wm_2, 752 bs_le_wm_4, 753 bs_le_wm_8, 754 755 bs_be_wm_2, 756 bs_be_wm_4, 757 bs_be_wm_8, 758 759 /* write region */ 760 bs_le_wr_1, 761 bs_le_wr_2, 762 bs_le_wr_4, 763 bs_le_wr_8, 764 765 bs_be_wr_2, 766 bs_be_wr_4, 767 bs_be_wr_8, 768 769 /* set multiple */ 770 bs_le_sm_1, 771 bs_le_sm_2, 772 bs_le_sm_4, 773 bs_le_sm_8, 774 775 bs_be_sm_2, 776 bs_be_sm_4, 777 bs_be_sm_8, 778 779 /* set region */ 780 bs_le_sr_1, 781 bs_le_sr_2, 782 bs_le_sr_4, 783 bs_le_sr_8, 784 785 bs_be_sr_2, 786 bs_be_sr_4, 787 bs_be_sr_8, 788}; 789