1/* $NetBSD: fpu_mul.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ 2 3/* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93 41 */ 42 43/* 44 * Perform an FPU multiply (return x * y). 45 */ 46 47#include <sys/cdefs.h> 48__FBSDID("$FreeBSD$"); 49 50#include <sys/types.h> 51#include <sys/systm.h> 52 53#include <machine/fpu.h> 54#include <machine/reg.h> 55 56#include <powerpc/fpu/fpu_arith.h> 57#include <powerpc/fpu/fpu_emu.h> 58 59/* 60 * The multiplication algorithm for normal numbers is as follows: 61 * 62 * The fraction of the product is built in the usual stepwise fashion. 63 * Each step consists of shifting the accumulator right one bit 64 * (maintaining any guard bits) and, if the next bit in y is set, 65 * adding the multiplicand (x) to the accumulator. Then, in any case, 66 * we advance one bit leftward in y. Algorithmically: 67 * 68 * A = 0; 69 * for (bit = 0; bit < FP_NMANT; bit++) { 70 * sticky |= A & 1, A >>= 1; 71 * if (Y & (1 << bit)) 72 * A += X; 73 * } 74 * 75 * (X and Y here represent the mantissas of x and y respectively.) 76 * The resultant accumulator (A) is the product's mantissa. It may 77 * be as large as 11.11111... in binary and hence may need to be 78 * shifted right, but at most one bit. 79 * 80 * Since we do not have efficient multiword arithmetic, we code the 81 * accumulator as four separate words, just like any other mantissa. 82 * We use local variables in the hope that this is faster than memory. 83 * We keep x->fp_mant in locals for the same reason. 84 * 85 * In the algorithm above, the bits in y are inspected one at a time. 86 * We will pick them up 32 at a time and then deal with those 32, one 87 * at a time. Note, however, that we know several things about y: 88 * 89 * - the guard and round bits at the bottom are sure to be zero; 90 * 91 * - often many low bits are zero (y is often from a single or double 92 * precision source); 93 * 94 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word. 95 * 96 * We can also test for 32-zero-bits swiftly. In this case, the center 97 * part of the loop---setting sticky, shifting A, and not adding---will 98 * run 32 times without adding X to A. We can do a 32-bit shift faster 99 * by simply moving words. Since zeros are common, we optimize this case. 100 * Furthermore, since A is initially zero, we can omit the shift as well 101 * until we reach a nonzero word. 102 */ 103struct fpn * 104fpu_mul(struct fpemu *fe) 105{ 106 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; 107 u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; 108 int sticky; 109 FPU_DECL_CARRY; 110 111 /* 112 * Put the `heavier' operand on the right (see fpu_emu.h). 113 * Then we will have one of the following cases, taken in the 114 * following order: 115 * 116 * - y = NaN. Implied: if only one is a signalling NaN, y is. 117 * The result is y. 118 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 119 * case was taken care of earlier). 120 * If x = 0, the result is NaN. Otherwise the result 121 * is y, with its sign reversed if x is negative. 122 * - x = 0. Implied: y is 0 or number. 123 * The result is 0 (with XORed sign as usual). 124 * - other. Implied: both x and y are numbers. 125 * The result is x * y (XOR sign, multiply bits, add exponents). 126 */ 127 DPRINTF(FPE_REG, ("fpu_mul:\n")); 128 DUMPFPN(FPE_REG, x); 129 DUMPFPN(FPE_REG, y); 130 DPRINTF(FPE_REG, ("=>\n")); 131 132 ORDER(x, y); 133 if (ISNAN(y)) { 134 y->fp_sign ^= x->fp_sign; 135 fe->fe_cx |= FPSCR_VXSNAN; 136 DUMPFPN(FPE_REG, y); 137 return (y); 138 } 139 if (ISINF(y)) { 140 if (ISZERO(x)) { 141 fe->fe_cx |= FPSCR_VXIMZ; 142 return (fpu_newnan(fe)); 143 } 144 y->fp_sign ^= x->fp_sign; 145 DUMPFPN(FPE_REG, y); 146 return (y); 147 } 148 if (ISZERO(x)) { 149 x->fp_sign ^= y->fp_sign; 150 DUMPFPN(FPE_REG, x); 151 return (x); 152 } 153 154 /* 155 * Setup. In the code below, the mask `m' will hold the current 156 * mantissa byte from y. The variable `bit' denotes the bit 157 * within m. We also define some macros to deal with everything. 158 */ 159 x3 = x->fp_mant[3]; 160 x2 = x->fp_mant[2]; 161 x1 = x->fp_mant[1]; 162 x0 = x->fp_mant[0]; 163 sticky = a3 = a2 = a1 = a0 = 0; 164 165#define ADD /* A += X */ \ 166 FPU_ADDS(a3, a3, x3); \ 167 FPU_ADDCS(a2, a2, x2); \ 168 FPU_ADDCS(a1, a1, x1); \ 169 FPU_ADDC(a0, a0, x0) 170 171#define SHR1 /* A >>= 1, with sticky */ \ 172 sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \ 173 a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1 174 175#define SHR32 /* A >>= 32, with sticky */ \ 176 sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0 177 178#define STEP /* each 1-bit step of the multiplication */ \ 179 SHR1; if (bit & m) { ADD; }; bit <<= 1 180 181 /* 182 * We are ready to begin. The multiply loop runs once for each 183 * of the four 32-bit words. Some words, however, are special. 184 * As noted above, the low order bits of Y are often zero. Even 185 * if not, the first loop can certainly skip the guard bits. 186 * The last word of y has its highest 1-bit in position FP_NMANT-1, 187 * so we stop the loop when we move past that bit. 188 */ 189 if ((m = y->fp_mant[3]) == 0) { 190 /* SHR32; */ /* unneeded since A==0 */ 191 } else { 192 bit = 1 << FP_NG; 193 do { 194 STEP; 195 } while (bit != 0); 196 } 197 if ((m = y->fp_mant[2]) == 0) { 198 SHR32; 199 } else { 200 bit = 1; 201 do { 202 STEP; 203 } while (bit != 0); 204 } 205 if ((m = y->fp_mant[1]) == 0) { 206 SHR32; 207 } else { 208 bit = 1; 209 do { 210 STEP; 211 } while (bit != 0); 212 } 213 m = y->fp_mant[0]; /* definitely != 0 */ 214 bit = 1; 215 do { 216 STEP; 217 } while (bit <= m); 218 219 /* 220 * Done with mantissa calculation. Get exponent and handle 221 * 11.111...1 case, then put result in place. We reuse x since 222 * it already has the right class (FP_NUM). 223 */ 224 m = x->fp_exp + y->fp_exp; 225 if (a0 >= FP_2) { 226 SHR1; 227 m++; 228 } 229 x->fp_sign ^= y->fp_sign; 230 x->fp_exp = m; 231 x->fp_sticky = sticky; 232 x->fp_mant[3] = a3; 233 x->fp_mant[2] = a2; 234 x->fp_mant[1] = a1; 235 x->fp_mant[0] = a0; 236 237 DUMPFPN(FPE_REG, x); 238 return (x); 239} 240