1/*	$NetBSD: fpu_div.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */
2
3/*
4 * Copyright (c) 1992, 1993
5 *	The Regents of the University of California.  All rights reserved.
6 *
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
10 *
11 * All advertising materials mentioning features or use of this software
12 * must display the following acknowledgement:
13 *	This product includes software developed by the University of
14 *	California, Lawrence Berkeley Laboratory.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 *    notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 *    notice, this list of conditions and the following disclaimer in the
23 *    documentation and/or other materials provided with the distribution.
24 * 3. Neither the name of the University nor the names of its contributors
25 *    may be used to endorse or promote products derived from this software
26 *    without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 *	@(#)fpu_div.c	8.1 (Berkeley) 6/11/93
41 */
42
43/*
44 * Perform an FPU divide (return x / y).
45 */
46
47#include <sys/cdefs.h>
48__FBSDID("$FreeBSD$");
49
50#include <sys/types.h>
51#include <sys/systm.h>
52
53#include <machine/fpu.h>
54#include <machine/reg.h>
55
56#include <powerpc/fpu/fpu_arith.h>
57#include <powerpc/fpu/fpu_emu.h>
58
59/*
60 * Division of normal numbers is done as follows:
61 *
62 * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e.
63 * If X and Y are the mantissas (1.bbbb's), the quotient is then:
64 *
65 *	q = (X / Y) * 2^((x exponent) - (y exponent))
66 *
67 * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y)
68 * will be in [0.5,2.0).  Moreover, it will be less than 1.0 if and only
69 * if X < Y.  In that case, it will have to be shifted left one bit to
70 * become a normal number, and the exponent decremented.  Thus, the
71 * desired exponent is:
72 *
73 *	left_shift = x->fp_mant < y->fp_mant;
74 *	result_exp = x->fp_exp - y->fp_exp - left_shift;
75 *
76 * The quotient mantissa X/Y can then be computed one bit at a time
77 * using the following algorithm:
78 *
79 *	Q = 0;			-- Initial quotient.
80 *	R = X;			-- Initial remainder,
81 *	if (left_shift)		--   but fixed up in advance.
82 *		R *= 2;
83 *	for (bit = FP_NMANT; --bit >= 0; R *= 2) {
84 *		if (R >= Y) {
85 *			Q |= 1 << bit;
86 *			R -= Y;
87 *		}
88 *	}
89 *
90 * The subtraction R -= Y always removes the uppermost bit from R (and
91 * can sometimes remove additional lower-order 1 bits); this proof is
92 * left to the reader.
93 *
94 * This loop correctly calculates the guard and round bits since they are
95 * included in the expanded internal representation.  The sticky bit
96 * is to be set if and only if any other bits beyond guard and round
97 * would be set.  From the above it is obvious that this is true if and
98 * only if the remainder R is nonzero when the loop terminates.
99 *
100 * Examining the loop above, we can see that the quotient Q is built
101 * one bit at a time ``from the top down''.  This means that we can
102 * dispense with the multi-word arithmetic and just build it one word
103 * at a time, writing each result word when it is done.
104 *
105 * Furthermore, since X and Y are both in [1.0,2.0), we know that,
106 * initially, R >= Y.  (Recall that, if X < Y, R is set to X * 2 and
107 * is therefore at in [2.0,4.0).)  Thus Q is sure to have bit FP_NMANT-1
108 * set, and R can be set initially to either X - Y (when X >= Y) or
109 * 2X - Y (when X < Y).  In addition, comparing R and Y is difficult,
110 * so we will simply calculate R - Y and see if that underflows.
111 * This leads to the following revised version of the algorithm:
112 *
113 *	R = X;
114 *	bit = FP_1;
115 *	D = R - Y;
116 *	if (D >= 0) {
117 *		result_exp = x->fp_exp - y->fp_exp;
118 *		R = D;
119 *		q = bit;
120 *		bit >>= 1;
121 *	} else {
122 *		result_exp = x->fp_exp - y->fp_exp - 1;
123 *		q = 0;
124 *	}
125 *	R <<= 1;
126 *	do  {
127 *		D = R - Y;
128 *		if (D >= 0) {
129 *			q |= bit;
130 *			R = D;
131 *		}
132 *		R <<= 1;
133 *	} while ((bit >>= 1) != 0);
134 *	Q[0] = q;
135 *	for (i = 1; i < 4; i++) {
136 *		q = 0, bit = 1 << 31;
137 *		do {
138 *			D = R - Y;
139 *			if (D >= 0) {
140 *				q |= bit;
141 *				R = D;
142 *			}
143 *			R <<= 1;
144 *		} while ((bit >>= 1) != 0);
145 *		Q[i] = q;
146 *	}
147 *
148 * This can be refined just a bit further by moving the `R <<= 1'
149 * calculations to the front of the do-loops and eliding the first one.
150 * The process can be terminated immediately whenever R becomes 0, but
151 * this is relatively rare, and we do not bother.
152 */
153
154struct fpn *
155fpu_div(struct fpemu *fe)
156{
157	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
158	u_int q, bit;
159	u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
160	FPU_DECL_CARRY
161
162	/*
163	 * Since divide is not commutative, we cannot just use ORDER.
164	 * Check either operand for NaN first; if there is at least one,
165	 * order the signalling one (if only one) onto the right, then
166	 * return it.  Otherwise we have the following cases:
167	 *
168	 *	Inf / Inf = NaN, plus NV exception
169	 *	Inf / num = Inf [i.e., return x]
170	 *	Inf / 0   = Inf [i.e., return x]
171	 *	0 / Inf = 0 [i.e., return x]
172	 *	0 / num = 0 [i.e., return x]
173	 *	0 / 0   = NaN, plus NV exception
174	 *	num / Inf = 0
175	 *	num / num = num (do the divide)
176	 *	num / 0   = Inf, plus DZ exception
177	 */
178	DPRINTF(FPE_REG, ("fpu_div:\n"));
179	DUMPFPN(FPE_REG, x);
180	DUMPFPN(FPE_REG, y);
181	DPRINTF(FPE_REG, ("=>\n"));
182	if (ISNAN(x) || ISNAN(y)) {
183		ORDER(x, y);
184		fe->fe_cx |= FPSCR_VXSNAN;
185		DUMPFPN(FPE_REG, y);
186		return (y);
187	}
188	/*
189	 * Need to split the following out cause they generate different
190	 * exceptions.
191	 */
192	if (ISINF(x)) {
193		if (x->fp_class == y->fp_class) {
194			fe->fe_cx |= FPSCR_VXIDI;
195			return (fpu_newnan(fe));
196		}
197		DUMPFPN(FPE_REG, x);
198		return (x);
199	}
200	if (ISZERO(x)) {
201		fe->fe_cx |= FPSCR_ZX;
202		if (x->fp_class == y->fp_class) {
203			fe->fe_cx |= FPSCR_VXZDZ;
204			return (fpu_newnan(fe));
205		}
206		DUMPFPN(FPE_REG, x);
207		return (x);
208	}
209
210	/* all results at this point use XOR of operand signs */
211	x->fp_sign ^= y->fp_sign;
212	if (ISINF(y)) {
213		x->fp_class = FPC_ZERO;
214		DUMPFPN(FPE_REG, x);
215		return (x);
216	}
217	if (ISZERO(y)) {
218		fe->fe_cx = FPSCR_ZX;
219		x->fp_class = FPC_INF;
220		DUMPFPN(FPE_REG, x);
221		return (x);
222	}
223
224	/*
225	 * Macros for the divide.  See comments at top for algorithm.
226	 * Note that we expand R, D, and Y here.
227	 */
228
229#define	SUBTRACT		/* D = R - Y */ \
230	FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \
231	FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0)
232
233#define	NONNEGATIVE		/* D >= 0 */ \
234	((int)d0 >= 0)
235
236#ifdef FPU_SHL1_BY_ADD
237#define	SHL1			/* R <<= 1 */ \
238	FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \
239	FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0)
240#else
241#define	SHL1 \
242	r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \
243	r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1
244#endif
245
246#define	LOOP			/* do ... while (bit >>= 1) */ \
247	do { \
248		SHL1; \
249		SUBTRACT; \
250		if (NONNEGATIVE) { \
251			q |= bit; \
252			r0 = d0, r1 = d1, r2 = d2, r3 = d3; \
253		} \
254	} while ((bit >>= 1) != 0)
255
256#define	WORD(r, i)			/* calculate r->fp_mant[i] */ \
257	q = 0; \
258	bit = 1 << 31; \
259	LOOP; \
260	(x)->fp_mant[i] = q
261
262	/* Setup.  Note that we put our result in x. */
263	r0 = x->fp_mant[0];
264	r1 = x->fp_mant[1];
265	r2 = x->fp_mant[2];
266	r3 = x->fp_mant[3];
267	y0 = y->fp_mant[0];
268	y1 = y->fp_mant[1];
269	y2 = y->fp_mant[2];
270	y3 = y->fp_mant[3];
271
272	bit = FP_1;
273	SUBTRACT;
274	if (NONNEGATIVE) {
275		x->fp_exp -= y->fp_exp;
276		r0 = d0, r1 = d1, r2 = d2, r3 = d3;
277		q = bit;
278		bit >>= 1;
279	} else {
280		x->fp_exp -= y->fp_exp + 1;
281		q = 0;
282	}
283	LOOP;
284	x->fp_mant[0] = q;
285	WORD(x, 1);
286	WORD(x, 2);
287	WORD(x, 3);
288	x->fp_sticky = r0 | r1 | r2 | r3;
289
290	DUMPFPN(FPE_REG, x);
291	return (x);
292}
293