1/*-
2 * Copyright (c) KATO Takenori, 1999.
3 *
4 * All rights reserved.  Unpublished rights reserved under the copyright
5 * laws of Japan.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer as
13 *    the first lines of this file unmodified.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $FreeBSD$
32 */
33
34/*	$NecBSD: busio.h,v 3.25.4.2.2.1 2000/06/12 03:53:08 honda Exp $	*/
35/*	$NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $	*/
36
37/*-
38 * [NetBSD for NEC PC-98 series]
39 *  Copyright (c) 1997, 1998
40 *	NetBSD/pc98 porting staff. All rights reserved.
41 *
42 * [Ported for FreeBSD]
43 *  Copyright (c) 2001
44 *	TAKAHASHI Yoshihiro. All rights reserved.
45 *
46 *  Redistribution and use in source and binary forms, with or without
47 *  modification, are permitted provided that the following conditions
48 *  are met:
49 *  1. Redistributions of source code must retain the above copyright
50 *     notice, this list of conditions and the following disclaimer.
51 *  2. Redistributions in binary form must reproduce the above copyright
52 *     notice, this list of conditions and the following disclaimer in the
53 *     documentation and/or other materials provided with the distribution.
54 *  3. The name of the author may not be used to endorse or promote products
55 *     derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
59 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
61 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
63 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
65 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
66 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70/*
71 * Copyright (c) 1997, 1998
72 *	Naofumi HONDA.  All rights reserved.
73 *
74 * This module support generic bus address relocation mechanism.
75 * To reduce a function call overhead, we employ pascal call methods.
76 */
77
78#ifndef _PC98_BUS_H_
79#define _PC98_BUS_H_
80
81#ifdef _KERNEL
82#include <sys/systm.h>
83#endif /* _KERNEL */
84
85#include <machine/_bus.h>
86#include <machine/cpufunc.h>
87
88#define BUS_SPACE_MAXSIZE_24BIT	0xFFFFFF
89#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
90#define BUS_SPACE_MAXSIZE	0xFFFFFFFF
91#define BUS_SPACE_MAXADDR_24BIT	0xFFFFFF
92#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
93#define BUS_SPACE_MAXADDR	0xFFFFFFFF
94
95#define BUS_SPACE_UNRESTRICTED	(~0)
96
97#ifdef _KERNEL
98
99/*
100 * address relocation table
101 */
102#define BUS_SPACE_IAT_MAXSIZE	33
103typedef bus_addr_t *bus_space_iat_t;
104
105#define BUS_SPACE_IAT_SZ(IOTARRAY) (sizeof(IOTARRAY)/sizeof(bus_addr_t))
106
107/*
108 * Access methods for bus resources and address space.
109 */
110struct resource;
111
112/*
113 * bus space tag
114 */
115#define	_PASCAL_CALL	(void)
116
117#define	_BUS_SPACE_CALL_FUNCS_TAB(NAME,TYPE,BWN) \
118	NAME##_space_read_##BWN, 				\
119	NAME##_space_read_multi_##BWN, 				\
120	NAME##_space_read_region_##BWN,				\
121	NAME##_space_write_##BWN, 				\
122	NAME##_space_write_multi_##BWN, 			\
123	NAME##_space_write_region_##BWN,			\
124	NAME##_space_set_multi_##BWN,				\
125	NAME##_space_set_region_##BWN,				\
126	NAME##_space_copy_region_##BWN
127
128#define	_BUS_SPACE_CALL_FUNCS_PROTO(NAME,TYPE,BWN) \
129	TYPE NAME##_space_read_##BWN _PASCAL_CALL;		\
130	void NAME##_space_read_multi_##BWN _PASCAL_CALL;	\
131	void NAME##_space_read_region_##BWN _PASCAL_CALL;	\
132	void NAME##_space_write_##BWN _PASCAL_CALL;		\
133	void NAME##_space_write_multi_##BWN _PASCAL_CALL;	\
134	void NAME##_space_write_region_##BWN _PASCAL_CALL;	\
135	void NAME##_space_set_multi_##BWN _PASCAL_CALL;		\
136	void NAME##_space_set_region_##BWN _PASCAL_CALL;	\
137	void NAME##_space_copy_region_##BWN _PASCAL_CALL;
138
139#define	_BUS_SPACE_CALL_FUNCS(NAME,TYPE,BWN) \
140	TYPE (* NAME##_read_##BWN) _PASCAL_CALL;		\
141	void (* NAME##_read_multi_##BWN) _PASCAL_CALL;		\
142	void (* NAME##_read_region_##BWN) _PASCAL_CALL;		\
143	void (* NAME##_write_##BWN) _PASCAL_CALL;		\
144	void (* NAME##_write_multi_##BWN) _PASCAL_CALL;		\
145	void (* NAME##_write_region_##BWN) _PASCAL_CALL;	\
146	void (* NAME##_set_multi_##BWN) _PASCAL_CALL;		\
147	void (* NAME##_set_region_##BWN) _PASCAL_CALL;		\
148	void (* NAME##_copy_region_##BWN) _PASCAL_CALL;
149
150struct bus_space_access_methods {
151	/* 8 bits access methods */
152	_BUS_SPACE_CALL_FUNCS(bs,u_int8_t,1)
153
154	/* 16 bits access methods */
155	_BUS_SPACE_CALL_FUNCS(bs,u_int16_t,2)
156
157	/* 32 bits access methods */
158	_BUS_SPACE_CALL_FUNCS(bs,u_int32_t,4)
159};
160
161/*
162 * Access methods for bus resources and address space.
163 */
164struct bus_space_tag {
165#define	BUS_SPACE_TAG_IO	0
166#define	BUS_SPACE_TAG_MEM	1
167	u_int	bs_tag;			/* bus space flags */
168
169	struct bus_space_access_methods bs_da;	/* direct access */
170	struct bus_space_access_methods bs_ra;	/* relocate access */
171#if	0
172	struct bus_space_access_methods bs_ida;	/* indexed direct access */
173#endif
174};
175
176/*
177 * bus space handle
178 */
179struct bus_space_handle {
180	bus_addr_t	bsh_base;
181	size_t		bsh_sz;
182
183	bus_addr_t	bsh_iat[BUS_SPACE_IAT_MAXSIZE];
184	size_t		bsh_maxiatsz;
185	size_t		bsh_iatsz;
186
187	struct resource	**bsh_res;
188	size_t		bsh_ressz;
189
190	struct bus_space_access_methods bsh_bam;
191};
192
193/*
194 * Values for the pc98 bus space tag, not to be used directly by MI code.
195 */
196extern struct bus_space_tag SBUS_io_space_tag;
197extern struct bus_space_tag SBUS_mem_space_tag;
198
199#define X86_BUS_SPACE_IO	(&SBUS_io_space_tag)
200#define X86_BUS_SPACE_MEM	(&SBUS_mem_space_tag)
201
202/*
203 * Allocate/Free bus_space_handle
204 */
205int i386_bus_space_handle_alloc(bus_space_tag_t t, bus_addr_t bpa,
206				bus_size_t size, bus_space_handle_t *bshp);
207void i386_bus_space_handle_free(bus_space_tag_t t, bus_space_handle_t bsh,
208				size_t size);
209
210/*
211 *      int bus_space_map (bus_space_tag_t t, bus_addr_t addr,
212 *          bus_size_t size, int flag, bus_space_handle_t *bshp);
213 *
214 * Map a region of bus space.
215 */
216
217int i386_memio_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
218		   int flag, bus_space_handle_t *bshp);
219
220#define bus_space_map(t, a, s, f, hp)					\
221	i386_memio_map((t), (a), (s), (f), (hp))
222
223/*
224 *      int bus_space_unmap (bus_space_tag_t t,
225 *          bus_space_handle_t bsh, bus_size_t size);
226 *
227 * Unmap a region of bus space.
228 */
229
230void i386_memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
231		       bus_size_t size);
232
233#define bus_space_unmap(t, h, s)					\
234	i386_memio_unmap((t), (h), (s))
235
236/*
237 *      int bus_space_map_load (bus_space_tag_t t, bus_space_handle_t bsh,
238 *          bus_size_t size, bus_space_iat_t iat, u_int flags);
239 *
240 * Load I/O address table of bus space.
241 */
242
243int i386_memio_map_load(bus_space_tag_t t, bus_space_handle_t bsh,
244			bus_size_t size, bus_space_iat_t iat, u_int flags);
245
246#define bus_space_map_load(t, h, s, iat, f)				\
247	i386_memio_map_load((t), (h), (s), (iat), (f))
248
249/*
250 *      int bus_space_subregion (bus_space_tag_t t,
251 *          bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
252 *          bus_space_handle_t *nbshp);
253 *
254 * Get a new handle for a subregion of an already-mapped area of bus space.
255 */
256
257int i386_memio_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
258			 bus_size_t offset, bus_size_t size,
259			 bus_space_handle_t *nbshp);
260
261#define bus_space_subregion(t, h, o, s, nhp)				\
262	i386_memio_subregion((t), (h), (o), (s), (nhp))
263
264/*
265 *      int bus_space_free (bus_space_tag_t t,
266 *          bus_space_handle_t bsh, bus_size_t size);
267 *
268 * Free a region of bus space.
269 */
270
271void i386_memio_free(bus_space_tag_t t, bus_space_handle_t bsh,
272		     bus_size_t size);
273
274#define bus_space_free(t, h, s)						\
275	i386_memio_free((t), (h), (s))
276
277/*
278 *      int bus_space_compare (bus_space_tag_t t1, bus_space_handle_t bsh1,
279 *          bus_space_tag_t t2, bus_space_handle_t bsh2);
280 *
281 * Compare two resources.
282 */
283int i386_memio_compare(bus_space_tag_t t1, bus_space_handle_t bsh1,
284		       bus_space_tag_t t2, bus_space_handle_t bsh2);
285
286#define bus_space_compare(t1, h1, t2, h2)				\
287	i386_memio_compare((t1), (h1), (t2), (h2))
288
289/*
290 * Access methods for bus resources and address space.
291 */
292#define	_BUS_ACCESS_METHODS_PROTO(TYPE,BWN) \
293	static __inline TYPE bus_space_read_##BWN 			\
294	(bus_space_tag_t, bus_space_handle_t, bus_size_t offset);	\
295	static __inline void bus_space_read_multi_##BWN			\
296	(bus_space_tag_t, bus_space_handle_t,				\
297	     bus_size_t, TYPE *, size_t);				\
298	static __inline void bus_space_read_region_##BWN		\
299	(bus_space_tag_t, bus_space_handle_t,				\
300	     bus_size_t, TYPE *, size_t);				\
301	static __inline void bus_space_write_##BWN			\
302	(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE);	\
303	static __inline void bus_space_write_multi_##BWN		\
304	(bus_space_tag_t, bus_space_handle_t,				\
305	     bus_size_t, const TYPE *, size_t);				\
306	static __inline void bus_space_write_region_##BWN		\
307	(bus_space_tag_t, bus_space_handle_t,				\
308	     bus_size_t, const TYPE *, size_t);				\
309	static __inline void bus_space_set_multi_##BWN			\
310	(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
311	static __inline void bus_space_set_region_##BWN			\
312	(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
313	static __inline void bus_space_copy_region_##BWN		\
314	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
315	     bus_space_handle_t, bus_size_t, size_t);
316
317_BUS_ACCESS_METHODS_PROTO(u_int8_t,1)
318_BUS_ACCESS_METHODS_PROTO(u_int16_t,2)
319_BUS_ACCESS_METHODS_PROTO(u_int32_t,4)
320
321/*
322 * read methods
323 */
324#define	_BUS_SPACE_READ(TYPE,BWN)					\
325static __inline TYPE							\
326bus_space_read_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh,	\
327	bus_size_t offset)						\
328{									\
329	register TYPE result;						\
330									\
331	__asm __volatile("call *%2"  					\
332			:"=a" (result),					\
333			 "=d" (offset)					\
334			:"o" (bsh->bsh_bam.bs_read_##BWN),		\
335			 "b" (bsh),					\
336			 "1" (offset)					\
337			);						\
338									\
339	return result;							\
340}
341
342_BUS_SPACE_READ(u_int8_t,1)
343_BUS_SPACE_READ(u_int16_t,2)
344_BUS_SPACE_READ(u_int32_t,4)
345
346/*
347 * write methods
348 */
349#define	_BUS_SPACE_WRITE(TYPE,BWN)					\
350static __inline void							\
351bus_space_write_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh,	\
352	bus_size_t offset, TYPE  val)					\
353{									\
354									\
355	__asm __volatile("call *%1"					\
356			:"=d" (offset)					\
357			:"o" (bsh->bsh_bam.bs_write_##BWN),		\
358			 "a" (val),					\
359			 "b" (bsh),					\
360			 "0" (offset)					\
361			);						\
362}
363
364_BUS_SPACE_WRITE(u_int8_t,1)
365_BUS_SPACE_WRITE(u_int16_t,2)
366_BUS_SPACE_WRITE(u_int32_t,4)
367
368/*
369 * multi read
370 */
371#define	_BUS_SPACE_READ_MULTI(TYPE,BWN)					\
372static __inline void							\
373bus_space_read_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
374	bus_size_t offset, TYPE *buf, size_t cnt) 			\
375{									\
376									\
377	__asm __volatile("call *%3"					\
378			:"=c" (cnt),					\
379			 "=d" (offset),					\
380			 "=D" (buf)					\
381			:"o" (bsh->bsh_bam.bs_read_multi_##BWN),	\
382			 "b" (bsh),					\
383			 "0" (cnt),					\
384			 "1" (offset),					\
385			 "2" (buf)					\
386			:"memory");					\
387}
388
389_BUS_SPACE_READ_MULTI(u_int8_t,1)
390_BUS_SPACE_READ_MULTI(u_int16_t,2)
391_BUS_SPACE_READ_MULTI(u_int32_t,4)
392
393/*
394 * multi write
395 */
396#define	_BUS_SPACE_WRITE_MULTI(TYPE,BWN)				\
397static __inline void							\
398bus_space_write_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
399	bus_size_t offset, const TYPE *buf, size_t cnt) 		\
400{									\
401									\
402	__asm __volatile("call *%3"					\
403			:"=c" (cnt),					\
404			 "=d" (offset),					\
405			 "=S" (buf)					\
406			:"o" (bsh->bsh_bam.bs_write_multi_##BWN),	\
407			 "b" (bsh),					\
408			 "0" (cnt),					\
409			 "1" (offset),					\
410			 "2" (buf)					\
411			);						\
412}
413
414_BUS_SPACE_WRITE_MULTI(u_int8_t,1)
415_BUS_SPACE_WRITE_MULTI(u_int16_t,2)
416_BUS_SPACE_WRITE_MULTI(u_int32_t,4)
417
418/*
419 * region read
420 */
421#define	_BUS_SPACE_READ_REGION(TYPE,BWN)				\
422static __inline void							\
423bus_space_read_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
424	bus_size_t offset, TYPE *buf, size_t cnt) 			\
425{									\
426									\
427	__asm __volatile("call *%3"					\
428			:"=c" (cnt),					\
429			 "=d" (offset),					\
430			 "=D" (buf)					\
431			:"o" (bsh->bsh_bam.bs_read_region_##BWN),	\
432			 "b" (bsh),					\
433			 "0" (cnt),					\
434			 "1" (offset),					\
435			 "2" (buf)					\
436			:"memory");					\
437}
438
439_BUS_SPACE_READ_REGION(u_int8_t,1)
440_BUS_SPACE_READ_REGION(u_int16_t,2)
441_BUS_SPACE_READ_REGION(u_int32_t,4)
442
443/*
444 * region write
445 */
446#define	_BUS_SPACE_WRITE_REGION(TYPE,BWN)				\
447static __inline void							\
448bus_space_write_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
449	bus_size_t offset, const TYPE *buf, size_t cnt) 		\
450{									\
451									\
452	__asm __volatile("call *%3"					\
453			:"=c" (cnt),					\
454			 "=d" (offset),					\
455			 "=S" (buf)					\
456			:"o" (bsh->bsh_bam.bs_write_region_##BWN),	\
457			 "b" (bsh),					\
458			 "0" (cnt),					\
459			 "1" (offset),					\
460			 "2" (buf)					\
461			);						\
462}
463
464_BUS_SPACE_WRITE_REGION(u_int8_t,1)
465_BUS_SPACE_WRITE_REGION(u_int16_t,2)
466_BUS_SPACE_WRITE_REGION(u_int32_t,4)
467
468/*
469 * multi set
470 */
471#define	_BUS_SPACE_SET_MULTI(TYPE,BWN)					\
472static __inline void							\
473bus_space_set_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh,	\
474	bus_size_t offset, TYPE val, size_t cnt)	 		\
475{									\
476									\
477	__asm __volatile("call *%2"					\
478			:"=c" (cnt),					\
479			 "=d" (offset)					\
480			:"o" (bsh->bsh_bam.bs_set_multi_##BWN),		\
481			 "a" (val),					\
482			 "b" (bsh),					\
483			 "0" (cnt),					\
484			 "1" (offset)					\
485			);						\
486}
487
488_BUS_SPACE_SET_MULTI(u_int8_t,1)
489_BUS_SPACE_SET_MULTI(u_int16_t,2)
490_BUS_SPACE_SET_MULTI(u_int32_t,4)
491
492/*
493 * region set
494 */
495#define	_BUS_SPACE_SET_REGION(TYPE,BWN)					\
496static __inline void							\
497bus_space_set_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
498	bus_size_t offset, TYPE val, size_t cnt) 			\
499{									\
500									\
501	__asm __volatile("call *%2"					\
502			:"=c" (cnt),					\
503			 "=d" (offset)					\
504			:"o" (bsh->bsh_bam.bs_set_region_##BWN),	\
505			 "a" (val),					\
506			 "b" (bsh),					\
507			 "0" (cnt),					\
508			 "1" (offset)					\
509			);						\
510}
511
512_BUS_SPACE_SET_REGION(u_int8_t,1)
513_BUS_SPACE_SET_REGION(u_int16_t,2)
514_BUS_SPACE_SET_REGION(u_int32_t,4)
515
516/*
517 * copy
518 */
519#define	_BUS_SPACE_COPY_REGION(BWN)					\
520static __inline void							\
521bus_space_copy_region_##BWN (bus_space_tag_t tag, bus_space_handle_t sbsh, \
522	bus_size_t src, bus_space_handle_t dbsh, bus_size_t dst, size_t cnt) \
523{									\
524									\
525	if (dbsh->bsh_bam.bs_copy_region_1 != sbsh->bsh_bam.bs_copy_region_1) \
526		panic("bus_space_copy_region: funcs mismatch (ENOSUPPORT)");\
527									\
528	__asm __volatile("call *%3"					\
529			:"=c" (cnt),					\
530			 "=S" (src),					\
531			 "=D" (dst)					\
532			:"o" (dbsh->bsh_bam.bs_copy_region_##BWN),	\
533			 "a" (sbsh),					\
534			 "b" (dbsh),					\
535			 "0" (cnt),					\
536			 "1" (src),					\
537			 "2" (dst)					\
538			);						\
539}
540
541_BUS_SPACE_COPY_REGION(1)
542_BUS_SPACE_COPY_REGION(2)
543_BUS_SPACE_COPY_REGION(4)
544
545/*
546 * Bus read/write barrier methods.
547 *
548 *	void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
549 *			       bus_size_t offset, bus_size_t len, int flags);
550 *
551 *
552 * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than
553 * prevent reordering by the compiler; all Intel x86 processors currently
554 * retire operations outside the CPU in program order.
555 */
556#define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
557#define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
558
559static __inline void
560bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
561		  bus_size_t offset, bus_size_t len, int flags)
562{
563	if (flags & BUS_SPACE_BARRIER_READ)
564		__asm __volatile("lock; addl $0,0(%%esp)" : : : "memory");
565	else
566		__compiler_membar();
567}
568
569#ifdef BUS_SPACE_NO_LEGACY
570#undef inb
571#undef outb
572#define inb(a) compiler_error
573#define inw(a) compiler_error
574#define inl(a) compiler_error
575#define outb(a, b) compiler_error
576#define outw(a, b) compiler_error
577#define outl(a, b) compiler_error
578#endif
579
580#include <machine/bus_dma.h>
581
582/*
583 * Stream accesses are the same as normal accesses on i386/pc98; there are no
584 * supported bus systems with an endianess different from the host one.
585 */
586#define	bus_space_read_stream_1(t, h, o)	bus_space_read_1((t), (h), (o))
587#define	bus_space_read_stream_2(t, h, o)	bus_space_read_2((t), (h), (o))
588#define	bus_space_read_stream_4(t, h, o)	bus_space_read_4((t), (h), (o))
589
590#define	bus_space_read_multi_stream_1(t, h, o, a, c) \
591	bus_space_read_multi_1((t), (h), (o), (a), (c))
592#define	bus_space_read_multi_stream_2(t, h, o, a, c) \
593	bus_space_read_multi_2((t), (h), (o), (a), (c))
594#define	bus_space_read_multi_stream_4(t, h, o, a, c) \
595	bus_space_read_multi_4((t), (h), (o), (a), (c))
596
597#define	bus_space_write_stream_1(t, h, o, v) \
598	bus_space_write_1((t), (h), (o), (v))
599#define	bus_space_write_stream_2(t, h, o, v) \
600	bus_space_write_2((t), (h), (o), (v))
601#define	bus_space_write_stream_4(t, h, o, v) \
602	bus_space_write_4((t), (h), (o), (v))
603
604#define	bus_space_write_multi_stream_1(t, h, o, a, c) \
605	bus_space_write_multi_1((t), (h), (o), (a), (c))
606#define	bus_space_write_multi_stream_2(t, h, o, a, c) \
607	bus_space_write_multi_2((t), (h), (o), (a), (c))
608#define	bus_space_write_multi_stream_4(t, h, o, a, c) \
609	bus_space_write_multi_4((t), (h), (o), (a), (c))
610
611#define	bus_space_set_multi_stream_1(t, h, o, v, c) \
612	bus_space_set_multi_1((t), (h), (o), (v), (c))
613#define	bus_space_set_multi_stream_2(t, h, o, v, c) \
614	bus_space_set_multi_2((t), (h), (o), (v), (c))
615#define	bus_space_set_multi_stream_4(t, h, o, v, c) \
616	bus_space_set_multi_4((t), (h), (o), (v), (c))
617
618#define	bus_space_read_region_stream_1(t, h, o, a, c) \
619	bus_space_read_region_1((t), (h), (o), (a), (c))
620#define	bus_space_read_region_stream_2(t, h, o, a, c) \
621	bus_space_read_region_2((t), (h), (o), (a), (c))
622#define	bus_space_read_region_stream_4(t, h, o, a, c) \
623	bus_space_read_region_4((t), (h), (o), (a), (c))
624
625#define	bus_space_write_region_stream_1(t, h, o, a, c) \
626	bus_space_write_region_1((t), (h), (o), (a), (c))
627#define	bus_space_write_region_stream_2(t, h, o, a, c) \
628	bus_space_write_region_2((t), (h), (o), (a), (c))
629#define	bus_space_write_region_stream_4(t, h, o, a, c) \
630	bus_space_write_region_4((t), (h), (o), (a), (c))
631
632#define	bus_space_set_region_stream_1(t, h, o, v, c) \
633	bus_space_set_region_1((t), (h), (o), (v), (c))
634#define	bus_space_set_region_stream_2(t, h, o, v, c) \
635	bus_space_set_region_2((t), (h), (o), (v), (c))
636#define	bus_space_set_region_stream_4(t, h, o, v, c) \
637	bus_space_set_region_4((t), (h), (o), (v), (c))
638
639#define	bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
640	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
641#define	bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
642	bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
643#define	bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
644	bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
645
646#endif /* _KERNEL */
647
648#endif /* _PC98_BUS_H_ */
649