sys.h revision 224110 
1/*-
2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
3 * reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in
13 *    the documentation and/or other materials provided with the
14 *    distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/mips/nlm/hal/sys.h 224110 2011-07-16 19:35:44Z jchandra $
29 * NETLOGIC_BSD */
30
31#ifndef __NLM_SYS_H__
32#define __NLM_SYS_H__
33
34/**
35* @file_name sys.h
36* @author Netlogic Microsystems
37* @brief HAL for System configuration registers
38*/
39#define	XLP_SYS_CHIP_RESET_REG			0x40
40#define	XLP_SYS_POWER_ON_RESET_REG		0x41
41#define	XLP_SYS_EFUSE_DEVICE_CFG_STATUS0_REG	0x42
42#define	XLP_SYS_EFUSE_DEVICE_CFG_STATUS1_REG	0x43
43#define	XLP_SYS_EFUSE_DEVICE_CFG_STATUS2_REG	0x44
44#define	XLP_SYS_EFUSE_DEVICE_CFG3_REG		0x45
45#define	XLP_SYS_EFUSE_DEVICE_CFG4_REG		0x46
46#define	XLP_SYS_EFUSE_DEVICE_CFG5_REG		0x47
47#define	XLP_SYS_EFUSE_DEVICE_CFG6_REG		0x48
48#define	XLP_SYS_EFUSE_DEVICE_CFG7_REG		0x49
49#define	XLP_SYS_PLL_CTRL_REG			0x4a
50#define	XLP_SYS_CPU_RESET_REG			0x4b
51#define	XLP_SYS_CPU_NONCOHERENT_MODE_REG	0x4d
52#define	XLP_SYS_CORE_DFS_DIS_CTRL_REG		0x4e
53#define	XLP_SYS_CORE_DFS_RST_CTRL_REG		0x4f
54#define	XLP_SYS_CORE_DFS_BYP_CTRL_REG		0x50
55#define	XLP_SYS_CORE_DFS_PHA_CTRL_REG		0x51
56#define	XLP_SYS_CORE_DFS_DIV_INC_CTRL_REG	0x52
57#define	XLP_SYS_CORE_DFS_DIV_DEC_CTRL_REG	0x53
58#define	XLP_SYS_CORE_DFS_DIV_VALUE_REG		0x54
59#define	XLP_SYS_RESET_REG			0x55
60#define	XLP_SYS_DFS_DIS_CTRL_REG		0x56
61#define	XLP_SYS_DFS_RST_CTRL_REG		0x57
62#define	XLP_SYS_DFS_BYP_CTRL_REG		0x58
63#define	XLP_SYS_DFS_DIV_INC_CTRL_REG		0x59
64#define	XLP_SYS_DFS_DIV_DEC_CTRL_REG		0x5a
65#define	XLP_SYS_DFS_DIV_VALUE0_REG		0x5b
66#define	XLP_SYS_DFS_DIV_VALUE1_REG		0x5c
67#define	XLP_SYS_SENSE_AMP_DLY_REG		0x5d
68#define	XLP_SYS_SOC_SENSE_AMP_DLY_REG		0x5e
69#define	XLP_SYS_CTRL0_REG			0x5f
70#define	XLP_SYS_CTRL1_REG			0x60
71#define	XLP_SYS_TIMEOUT_BS1_REG			0x61
72#define	XLP_SYS_BYTE_SWAP_REG			0x62
73#define	XLP_SYS_VRM_VID_REG			0x63
74#define	XLP_SYS_PWR_RAM_CMD_REG			0x64
75#define	XLP_SYS_PWR_RAM_ADDR_REG		0x65
76#define	XLP_SYS_PWR_RAM_DATA0_REG		0x66
77#define	XLP_SYS_PWR_RAM_DATA1_REG		0x67
78#define	XLP_SYS_PWR_RAM_DATA2_REG		0x68
79#define	XLP_SYS_PWR_UCODE_REG			0x69
80#define	XLP_SYS_CPU0_PWR_STATUS_REG		0x6a
81#define	XLP_SYS_CPU1_PWR_STATUS_REG		0x6b
82#define	XLP_SYS_CPU2_PWR_STATUS_REG		0x6c
83#define	XLP_SYS_CPU3_PWR_STATUS_REG		0x6d
84#define	XLP_SYS_CPU4_PWR_STATUS_REG		0x6e
85#define	XLP_SYS_CPU5_PWR_STATUS_REG		0x6f
86#define	XLP_SYS_CPU6_PWR_STATUS_REG		0x70
87#define	XLP_SYS_CPU7_PWR_STATUS_REG		0x71
88#define	XLP_SYS_STATUS_REG			0x72
89#define	XLP_SYS_INT_POL_REG			0x73
90#define	XLP_SYS_INT_TYPE_REG			0x74
91#define	XLP_SYS_INT_STATUS_REG			0x75
92#define	XLP_SYS_INT_MASK0_REG			0x76
93#define	XLP_SYS_INT_MASK1_REG			0x77
94#define	XLP_SYS_UCO_S_ECC_REG			0x78
95#define	XLP_SYS_UCO_M_ECC_REG			0x79
96#define	XLP_SYS_UCO_ADDR_REG			0x7a
97#define	XLP_SYS_UCO_INSTR_REG			0x7b
98#define	XLP_SYS_MEM_BIST0_REG			0x7c
99#define	XLP_SYS_MEM_BIST1_REG			0x7d
100#define	XLP_SYS_MEM_BIST2_REG			0x7e
101#define	XLP_SYS_MEM_BIST3_REG			0x7f
102#define	XLP_SYS_MEM_BIST4_REG			0x80
103#define	XLP_SYS_MEM_BIST5_REG			0x81
104#define	XLP_SYS_MEM_BIST6_REG			0x82
105#define	XLP_SYS_MEM_BIST7_REG			0x83
106#define	XLP_SYS_MEM_BIST8_REG			0x84
107#define	XLP_SYS_MEM_BIST9_REG			0x85
108#define	XLP_SYS_MEM_BIST10_REG			0x86
109#define	XLP_SYS_MEM_BIST11_REG			0x87
110#define	XLP_SYS_MEM_BIST12_REG			0x88
111#define	XLP_SYS_SCRTCH0_REG			0x89
112#define	XLP_SYS_SCRTCH1_REG			0x8a
113#define	XLP_SYS_SCRTCH2_REG			0x8b
114#define	XLP_SYS_SCRTCH3_REG			0x8c
115
116#if !defined(LOCORE) && !defined(__ASSEMBLY__)
117
118#define	nlm_rdreg_sys(b, r)		nlm_read_reg_kseg(b,r)
119#define	nlm_wreg_sys(b, r, v)		nlm_write_reg_kseg(b,r,v)
120#define	nlm_pcibase_sys(node)		nlm_pcicfg_base(XLP_IO_SYS_OFFSET(node))
121#define	nlm_regbase_sys(node)		nlm_pcibase_sys(node)
122
123#endif
124
125#endif
126