mpboot.S revision 206721
1/*- 2 * Copyright (c) 2010 Neelkanth Natu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/mips/mips/mpboot.S 206721 2010-04-17 03:08:13Z jmallett $ 27 */ 28 29#include <machine/asm.h> 30#include <machine/cpu.h> 31#include <machine/cpuregs.h> 32 33#include "assym.s" 34 35 .text 36 .set noat 37 .set noreorder 38 39#ifdef TARGET_OCTEON 40#define CLEAR_STATUS \ 41 mfc0 a0, COP_0_STATUS_REG ;\ 42 li a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \ 43 or a0, a0, a2 ; \ 44 li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | SR_KSU_USER | MIPS_SR_BEV) ; \ 45 and a0, a0, a2 ; \ 46 mtc0 a0, COP_0_STATUS_REG 47#else 48#define CLEAR_STATUS \ 49 mtc0 zero, COP_0_STATUS_REG 50#endif 51 52GLOBAL(mpentry) 53 CLEAR_STATUS /* disable interrupts */ 54 55 mtc0 zero, COP_0_CAUSE_REG /* clear soft interrupts */ 56 57 li t0, CFG_K0_CACHED /* make sure kseg0 is cached */ 58 mtc0 t0, MIPS_COP_0_CONFIG 59 COP0_SYNC 60 61 jal platform_processor_id /* get the processor number */ 62 nop 63 move s0, v0 64 65 /* 66 * Initialize stack and call machine startup 67 */ 68 PTR_LA sp, _C_LABEL(pcpu_space) 69 addiu sp, (NBPG * 2) - CALLFRAME_SIZ 70 sll t0, s0, PAGE_SHIFT + 1 71 addu sp, sp, t0 72 73 /* Zero out old ra and old fp for debugger */ 74 sw zero, CALLFRAME_SIZ - 4(sp) 75 sw zero, CALLFRAME_SIZ - 8(sp) 76 77 PTR_LA gp, _C_LABEL(_gp) 78 79 jal platform_init_ap 80 move a0, s0 81 82 jal smp_init_secondary 83 move a0, s0 84 85 PANIC("AP startup failed!") 86