1/*-
2 * Copyright (c) 2010 Neelkanth Natu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29#include <machine/asm.h>
30#include <machine/cpu.h>
31#include <machine/cpuregs.h>
32
33#include "assym.s"
34
35	.text
36	.set	noat
37	.set	noreorder
38
39/* XXX move this to a header file */
40#if defined(CPU_CNMIPS)
41#define CLEAR_STATUS \
42	mfc0    a0, MIPS_COP_0_STATUS   ;\
43	li      a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \
44	or      a0, a0, a2	        ; \
45	li      a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER | MIPS_SR_BEV) ; \
46	and     a0, a0, a2              ; \
47        mtc0    a0, MIPS_COP_0_STATUS
48#elif defined(__mips_n64)
49#define CLEAR_STATUS \
50	li	a0, (MIPS_SR_KX | MIPS_SR_UX) ; \
51	mtc0	a0, MIPS_COP_0_STATUS
52#else
53#define CLEAR_STATUS \
54	mtc0	zero, MIPS_COP_0_STATUS
55#endif
56
57GLOBAL(mpentry)
58	CLEAR_STATUS			/* disable interrupts */
59
60	mtc0	zero, MIPS_COP_0_CAUSE	/* clear soft interrupts */
61
62	li	t0, MIPS_CCA_CACHED	/* make sure kseg0 is cached */
63	mtc0	t0, MIPS_COP_0_CONFIG
64	COP0_SYNC
65
66	jal	platform_processor_id	/* get the processor number */
67	nop
68	move	s0, v0
69
70	/*
71	 * Initialize stack and call machine startup
72	 */
73	PTR_LA	sp, _C_LABEL(pcpu_space)
74	addiu	sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
75	sll	t0, s0, PAGE_SHIFT + 1
76	addu	sp, sp, t0
77
78	/* Zero out old ra and old fp for debugger */
79	sw      zero, CALLFRAME_SIZ - 4(sp)
80	sw      zero, CALLFRAME_SIZ - 8(sp)
81
82	PTR_LA	gp, _C_LABEL(_gp)
83
84	jal	platform_init_ap
85	move	a0, s0
86	jal	smp_init_secondary
87	move	a0, s0
88
89	PANIC("AP startup failed!")
90