1/*-
2 * This file is in the public domain.
3 *
4 *	from: src/sys/alpha/include/pmc_mdep.h,v 1.2 2005/06/09 19:45:06 jkoshy
5 * $FreeBSD$
6 */
7
8#ifndef _MACHINE_PMC_MDEP_H_
9#define	_MACHINE_PMC_MDEP_H_
10
11#define	PMC_MDEP_CLASS_INDEX_MIPS	1
12
13union pmc_md_op_pmcallocate {
14	uint64_t	__pad[4];
15};
16
17/* Logging */
18#if defined(__mips_n64)
19#define	PMCLOG_READADDR		PMCLOG_READ64
20#define	PMCLOG_EMITADDR		PMCLOG_EMIT64
21#else
22#define	PMCLOG_READADDR		PMCLOG_READ32
23#define	PMCLOG_EMITADDR		PMCLOG_EMIT32
24#endif
25
26#if	_KERNEL
27
28/*
29 * MIPS event codes are encoded with a select bit.  The
30 * select bit is used when writing to CP0 so that we
31 * can select either counter 0/2 or 1/3.  The cycle
32 * and instruction counters are special in that they
33 * can be counted on either 0/2 or 1/3.
34 */
35
36#define MIPS_CTR_ALL	255 /* Count events in any counter. */
37#define MIPS_CTR_0	0 /* Counter 0 Event */
38#define MIPS_CTR_1	1 /* Counter 1 Event */
39
40struct mips_event_code_map {
41	uint32_t	pe_ev;       /* enum value */
42	uint8_t         pe_counter;  /* Which counter this can be counted in. */
43	uint8_t		pe_code;     /* numeric code */
44};
45
46struct mips_pmc_spec {
47	uint32_t	ps_cpuclass;
48	uint32_t	ps_cputype;
49	uint32_t	ps_capabilities;
50	int		ps_counter_width;
51};
52
53union pmc_md_pmc {
54	uint32_t	pm_mips_evsel;
55};
56
57#define	PMC_TRAPFRAME_TO_PC(TF)	((TF)->pc)
58
59extern const struct mips_event_code_map mips_event_codes[];
60extern const int mips_event_codes_size;
61extern int mips_npmcs;
62extern struct mips_pmc_spec mips_pmc_spec;
63
64/*
65 * Prototypes
66 */
67struct pmc_mdep *pmc_mips_initialize(void);
68void		pmc_mips_finalize(struct pmc_mdep *_md);
69
70/*
71 * CPU-specific functions
72 */
73
74uint32_t	mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps);
75uint64_t	mips_pmcn_read(unsigned int pmc);
76uint64_t	mips_pmcn_write(unsigned int pmc, uint64_t v);
77
78#endif /* _KERNEL */
79
80#endif /* !_MACHINE_PMC_MDEP_H_ */
81