1/*-
2 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $Id$
27 */
28/*
29 * Skeleton of this file was based on respective code for ARM
30 * code written by Olivier Houchard.
31 */
32/*
33 * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
34 * experimental and was written for MIPS32 port.
35 */
36#include "opt_uart.h"
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD$");
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/bus.h>
44#include <sys/cons.h>
45
46#include <machine/bus.h>
47
48#include <dev/uart/uart.h>
49#include <dev/uart/uart_cpu.h>
50
51extern struct uart_class uart_rc32434_uart_class;
52bus_space_tag_t uart_bus_space_io;
53bus_space_tag_t uart_bus_space_mem;
54
55int
56uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
57{
58
59	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
60}
61
62int
63uart_cpu_getdev(int devtype, struct uart_devinfo *di)
64{
65	uint32_t maddr;
66
67	if (resource_int_value("uart", 0, "maddr", &maddr) != 0 ||
68	    maddr == 0)
69		return (ENXIO);
70
71	/* Got it. Fill in the instance and return it. */
72	di->ops = uart_getops(&uart_ns8250_class);
73	di->bas.chan = 0;
74	di->bas.bst = mips_bus_space_generic;
75	di->bas.regshft = 2;
76	di->bas.rclk = 330000000UL/2; /* IPbus clock */
77	di->baudrate = 115200;
78	di->databits = 8;
79	di->stopbits = 1;
80	di->parity = UART_PARITY_NONE;
81	uart_bus_space_io = 0;
82	uart_bus_space_mem = mips_bus_space_generic;
83	di->bas.bsh = MIPS_PHYS_TO_KSEG1(maddr);
84	return (0);
85}
86