1# The TP-Link 1043NDv2 is based on the AP135 with a couple of minor 2# differences - well, besides having no 11ac. 3 4# $FreeBSD$ 5 6# QCA955X_ETH_CFG_RGMII_EN (1 << 0) 7hint.qca955x_gmac.0.gmac_cfg=0x1 8 9# Use base mac address for wifi; +1 and +2 for arge0/arge1. 10hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00 11hint.ar71xx.0.eeprom_mac_isascii=0 12 13hint.ar71xx_mac_map.0.devid=ath 14hint.ar71xx_mac_map.0.unitid=0 15hint.ar71xx_mac_map.0.offset=0 16hint.ar71xx_mac_map.0.is_local=0 17 18hint.ar71xx_mac_map.1.devid=arge 19hint.ar71xx_mac_map.1.unitid=0 20hint.ar71xx_mac_map.1.offset=1 21hint.ar71xx_mac_map.1.is_local=0 22 23hint.ar71xx_mac_map.2.devid=arge 24hint.ar71xx_mac_map.2.unitid=1 25hint.ar71xx_mac_map.2.offset=2 26hint.ar71xx_mac_map.2.is_local=0 27 28# mdiobus0 on arge0 29hint.argemdio.0.at="nexus0" 30hint.argemdio.0.maddr=0x19000000 31hint.argemdio.0.msize=0x1000 32hint.argemdio.0.order=0 33 34# mdiobus1 on arge1 - required to bring up arge1? 35hint.argemdio.1.at="nexus0" 36hint.argemdio.1.maddr=0x1a000000 37hint.argemdio.1.msize=0x1000 38hint.argemdio.1.order=0 39 40# AR8327 - connected via mdiobus0 on arge0 41hint.arswitch.0.at="mdio0" 42hint.arswitch.0.is_7240=0 # definitely not the internal switch! 43hint.arswitch.0.is_9340=0 # not the internal switch! 44hint.arswitch.0.numphys=5 # all ports are PHYs 45hint.arswitch.0.phy4cpu=0 46hint.arswitch.0.is_rgmii=0 # not needed 47hint.arswitch.0.is_gmii=0 # not needed 48 49# This is where it gets a bit odd. port 0 and port 6 are CPU ports. 50# The current code only supports one CPU port. So hm, what should 51# we do to hook PAD6 up to be RGMII but a PHY, not a MAC? 52 53# The other trick - how do we get arge1 (hooked up to GMAC0) to work? 54# That's currently supposed to be hooked up to CPU port 0. 55 56# Other AR8327 configuration parameters 57 58# AP136-020 parameters 59 60# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII 61 62# AR8327_PAD_MAC_SGMII 63hint.arswitch.0.pad.0.mode=3 64#hint.arswitch.0.pad.0.rxclk_delay_sel=0 65hint.arswitch.0.pad.0.sgmii_delay_en=1 66 67# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII 68 69# AR8327_PAD_MAC_RGMII 70hint.arswitch.0.pad.6.mode=6 71hint.arswitch.0.pad.6.txclk_delay_en=1 72hint.arswitch.0.pad.6.rxclk_delay_en=1 73# AR8327_CLK_DELAY_SEL1 74hint.arswitch.0.pad.6.txclk_delay_sel=1 75# AR8327_CLK_DELAY_SEL2 76hint.arswitch.0.pad.6.rxclk_delay_sel=2 77 78hint.arswitch.0.led.ctrl0=0xcc35cc35 79hint.arswitch.0.led.ctrl1=0xca35ca35 80hint.arswitch.0.led.ctrl2=0xc935c935 81hint.arswitch.0.led.ctrl3=0x03ffff00 82int.arswitch.0.led.open_drain=1 83 84# force_link=1 is required for the rest of the parameters 85# to be configured. 86hint.arswitch.0.port.0.force_link=1 87hint.arswitch.0.port.0.speed=1000 88hint.arswitch.0.port.0.duplex=1 89hint.arswitch.0.port.0.txpause=1 90hint.arswitch.0.port.0.rxpause=1 91 92# force_link=1 is required for the rest of the parameters 93# to be configured. 94hint.arswitch.0.port.6.force_link=1 95hint.arswitch.0.port.6.speed=1000 96hint.arswitch.0.port.6.duplex=1 97hint.arswitch.0.port.6.txpause=1 98hint.arswitch.0.port.6.rxpause=1 99 100# arge0 - hooked up to AR8327 GMAC6, RGMII 101# set at 1000/full to the switch. 102# so, lock both sides of this connect up to 1000/full; 103# if_arge thus wont change the PLL configuration 104# upon a link status change. 105hint.arge.0.phymask=0x0 106hint.arge.0.miimode=3 # RGMII 107hint.arge.0.media=1000 108hint.arge.0.fduplex=1 109hint.arge.0.pll_1000=0x56000000 110 111# arge1 - lock up to 1000/full 112hint.arge.1.phymask=0x0 113hint.arge.1.media=1000 114hint.arge.1.fduplex=1 115hint.arge.1.miimode=5 # SGMII 116hint.arge.1.pll_1000=0x03000101 117 118# hint.arge.1.eeprommac=0x1f01fc06 119 120# ath0: Where the ART is - last 64k in the flash 121hint.ath.0.eepromaddr=0x1fff0000 122hint.ath.0.eepromsize=16384 123 124# 128 KiB u-boot 125hint.map.0.at="flash/spi0" 126hint.map.0.start=0x00000000 127hint.map.0.end=0x00020000 # 128k u-boot 128hint.map.0.name="u-boot" 129hint.map.0.readonly=1 130 131# The TP-Link firmware will put the kernel first (variable size); 132# then the rootfs will be placed hopefully at a 64KiB alignment 133# by whatever calls mktplinkfw. 134 135hint.map.1.at="flash/spi0" 136hint.map.1.start=0x00020000 137hint.map.1.end="search:0x00020000:0x10000:.!/bin/sh" 138hint.map.1.name="kernel" 139hint.map.1.readonly=1 140 141hint.map.2.at="flash/spi0" 142hint.map.2.start="search:0x00020000:0x10000:.!/bin/sh" 143hint.map.2.end=0x007d0000 144hint.map.2.name="rootfs" 145hint.map.2.readonly=1 146 147# 64KiB cfg 148hint.map.3.at="flash/spi0" 149hint.map.3.start=0x007d0000 150hint.map.3.end=0x007e0000 151hint.map.3.name="cfg" 152hint.map.3.readonly=0 153 154# 64KiB mib0 155hint.map.4.at="flash/spi0" 156hint.map.4.start=0x007e0000 157hint.map.4.end=0x007f0000 158hint.map.4.name="mib0" 159hint.map.4.readonly=1 160 161# 64KiB ART 162hint.map.5.at="flash/spi0" 163hint.map.5.start=0x007f0000 164hint.map.5.end=0x00800000 # 64k ART 165hint.map.5.name="ART" 166hint.map.5.readonly=1 167