1/*- 2 * Copyright (c) 2007 Bruce M. Simpson. 3 * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com> 4 * 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD$"); 31 32#include "opt_ddb.h" 33 34#include <sys/param.h> 35#include <sys/conf.h> 36#include <sys/kernel.h> 37#include <sys/systm.h> 38#include <sys/imgact.h> 39#include <sys/bio.h> 40#include <sys/buf.h> 41#include <sys/bus.h> 42#include <sys/cpu.h> 43#include <sys/cons.h> 44#include <sys/exec.h> 45#include <sys/ucontext.h> 46#include <sys/proc.h> 47#include <sys/kdb.h> 48#include <sys/ptrace.h> 49#include <sys/reboot.h> 50#include <sys/signalvar.h> 51#include <sys/sysent.h> 52#include <sys/sysproto.h> 53#include <sys/user.h> 54 55#include <vm/vm.h> 56#include <vm/vm_object.h> 57#include <vm/vm_page.h> 58 59#include <machine/cache.h> 60#include <machine/clock.h> 61#include <machine/cpu.h> 62#include <machine/cpuinfo.h> 63#include <machine/cpufunc.h> 64#include <machine/cpuregs.h> 65#include <machine/hwfunc.h> 66#include <machine/intr_machdep.h> 67#include <machine/locore.h> 68#include <machine/md_var.h> 69#include <machine/pte.h> 70#include <machine/sigframe.h> 71#include <machine/trap.h> 72#include <machine/vmparam.h> 73 74#include "bcm_socinfo.h" 75 76#ifdef CFE 77#include <dev/cfe/cfe_api.h> 78#endif 79 80#if 0 81#define BCM_TRACE(_fmt, ...) printf(_fmt, ##__VA_ARGS__) 82#else 83#define BCM_TRACE(_fmt, ...) 84#endif 85 86extern int *edata; 87extern int *end; 88 89void 90platform_cpu_init() 91{ 92 /* Nothing special */ 93} 94 95static void 96mips_init(void) 97{ 98 int i, j; 99 100 printf("entry: mips_init()\n"); 101 102#ifdef CFE 103 /* 104 * Query DRAM memory map from CFE. 105 */ 106 physmem = 0; 107 for (i = 0; i < 10; i += 2) { 108 int result; 109 uint64_t addr, len, type; 110 111 result = cfe_enummem(i / 2, 0, &addr, &len, &type); 112 if (result < 0) { 113 BCM_TRACE("There is no phys memory for: %d\n", i); 114 phys_avail[i] = phys_avail[i + 1] = 0; 115 break; 116 } 117 if (type != CFE_MI_AVAILABLE) { 118 BCM_TRACE("phys memory is not available: %d\n", i); 119 continue; 120 } 121 122 phys_avail[i] = addr; 123 if (i == 0 && addr == 0) { 124 /* 125 * If this is the first physical memory segment probed 126 * from CFE, omit the region at the start of physical 127 * memory where the kernel has been loaded. 128 */ 129 phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); 130 } 131 132 BCM_TRACE("phys memory is available for: %d\n", i); 133 BCM_TRACE(" => addr = %jx\n", addr); 134 BCM_TRACE(" => len = %jd\n", len); 135 136 phys_avail[i + 1] = addr + len; 137 physmem += len; 138 } 139 140 BCM_TRACE("Total phys memory is : %ld\n", physmem); 141 realmem = btoc(physmem); 142#endif 143 144 for (j = 0; j < i; j++) 145 dump_avail[j] = phys_avail[j]; 146 147 physmem = realmem; 148 149 init_param1(); 150 init_param2(physmem); 151 mips_cpu_init(); 152 pmap_bootstrap(); 153 mips_proc0_init(); 154 mutex_init(); 155 kdb_init(); 156#ifdef KDB 157 if (boothowto & RB_KDB) 158 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 159#endif 160} 161 162void 163platform_reset(void) 164{ 165 printf("bcm::platform_reset()\n"); 166 intr_disable(); 167 168#if defined(CFE) 169 cfe_exit(0, 0); 170#else 171 /* PMU watchdog reset */ 172 BCM_WRITE_REG32(BCM_REG_CHIPC_PMUWD_OFFS, 2); /* PMU watchdog */ 173#endif 174 175#if 0 176 /* Non-PMU reset 177 * XXX: Need chipc capability flags */ 178 *((volatile uint8_t *)MIPS_PHYS_TO_KSEG1(SENTRY5_EXTIFADR)) = 0x80; 179#endif 180 181 for (;;); 182} 183 184void 185platform_start(__register_t a0, __register_t a1, __register_t a2, 186 __register_t a3) 187{ 188 vm_offset_t kernend; 189 uint64_t platform_counter_freq; 190 struct bcm_socinfo *socinfo; 191 192 /* clear the BSS and SBSS segments */ 193 kernend = (vm_offset_t)&end; 194 memset(&edata, 0, kernend - (vm_offset_t)(&edata)); 195 196 mips_postboot_fixup(); 197 198 /* Initialize pcpu stuff */ 199 mips_pcpu0_init(); 200 201#if 0 202 /* 203 * Probe the Broadcom on-chip PLL clock registers 204 * and discover the CPU pipeline clock and bus clock 205 * multipliers from this. 206 * XXX: Wrong place. You have to ask the ChipCommon 207 * or External Interface cores on the SiBa. 208 */ 209 uint32_t busmult, cpumult, refclock, clkcfg1; 210#define S5_CLKCFG1_REFCLOCK_MASK 0x0000001F 211#define S5_CLKCFG1_BUSMULT_MASK 0x000003E0 212#define S5_CLKCFG1_BUSMULT_SHIFT 5 213#define S5_CLKCFG1_CPUMULT_MASK 0xFFFFFC00 214#define S5_CLKCFG1_CPUMULT_SHIFT 10 215 216 counter_freq = 100000000; /* XXX */ 217 218 clkcfg1 = s5_rd_clkcfg1(); 219 printf("clkcfg1 = 0x%08x\n", clkcfg1); 220 221 refclock = clkcfg1 & 0x1F; 222 busmult = ((clkcfg1 & 0x000003E0) >> 5) + 1; 223 cpumult = ((clkcfg1 & 0xFFFFFC00) >> 10) + 1; 224 225 printf("refclock = %u\n", refclock); 226 printf("busmult = %u\n", busmult); 227 printf("cpumult = %u\n", cpumult); 228 229 counter_freq = cpumult * refclock; 230#endif 231 232 socinfo = bcm_get_socinfo(); 233 platform_counter_freq = socinfo->cpurate * 1000 * 1000; /* BCM4718 is 480MHz */ 234 235 mips_timer_early_init(platform_counter_freq); 236 237#ifdef CFE 238 /* 239 * Initialize CFE firmware trampolines before 240 * we initialize the low-level console. 241 * 242 * CFE passes the following values in registers: 243 * a0: firmware handle 244 * a2: firmware entry point 245 * a3: entry point seal 246 */ 247 if (a3 == CFE_EPTSEAL) 248 cfe_init(a0, a2); 249#endif 250 251 cninit(); 252 253 mips_init(); 254 255 mips_timer_init_params(platform_counter_freq, socinfo->double_count); 256} 257