pmc_mdep.h revision 183033
1/*-
2 * Copyright (c) 2003-2005,2008 Joseph Koshy
3 * Copyright (c) 2007 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Portions of this software were developed by A. Joseph Koshy under
7 * sponsorship from the FreeBSD Foundation and Google, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: head/sys/i386/include/pmc_mdep.h 183033 2008-09-15 06:47:52Z jkoshy $
31 */
32
33#ifndef _MACHINE_PMC_MDEP_H
34#define	_MACHINE_PMC_MDEP_H 1
35
36/*
37 * On the i386 platform we support the following PMCs.
38 *
39 * K7		AMD Athlon XP/MP and other 32 bit processors.
40 * K8		AMD Athlon64 and Opteron PMCs in 32 bit mode.
41 * PIV		Intel P4/HTT and P4/EMT64
42 * PPRO		Intel Pentium Pro, Pentium-II, Pentium-III, Celeron and
43 *		Pentium-M processors
44 * PENTIUM	Intel Pentium MMX.
45 */
46
47#include <dev/hwpmc/hwpmc_amd.h> /* K7 and K8 */
48#include <dev/hwpmc/hwpmc_piv.h>
49#include <dev/hwpmc/hwpmc_ppro.h>
50#include <dev/hwpmc/hwpmc_pentium.h>
51
52/*
53 * Architecture specific extensions to <sys/pmc.h> structures.
54 */
55
56union pmc_md_op_pmcallocate  {
57	struct pmc_md_amd_op_pmcallocate	pm_amd;
58 	struct pmc_md_ppro_op_pmcallocate	pm_ppro;
59	struct pmc_md_pentium_op_pmcallocate	pm_pentium;
60	struct pmc_md_p4_op_pmcallocate		pm_p4;
61	uint64_t				__pad[4];
62};
63
64/* Logging */
65#define	PMCLOG_READADDR		PMCLOG_READ32
66#define	PMCLOG_EMITADDR		PMCLOG_EMIT32
67
68#ifdef _KERNEL
69
70/* MD extension for 'struct pmc' */
71union pmc_md_pmc  {
72	struct pmc_md_amd_pmc	pm_amd;
73	struct pmc_md_ppro_pmc	pm_ppro;
74	struct pmc_md_pentium_pmc pm_pentium;
75	struct pmc_md_p4_pmc	pm_p4;
76};
77
78struct pmc;
79
80#define	PMC_TRAPFRAME_TO_PC(TF)	((TF)->tf_eip)
81#define	PMC_TRAPFRAME_TO_FP(TF)	((TF)->tf_ebp)
82
83/*
84 * The layout of the stack frame on entry into the NMI handler depends on
85 * whether a privilege level change (and consequent stack switch) was
86 * required for entry.
87 *
88 * When processing an interrupt when in user mode, the processor switches
89 * stacks, and saves the user mode stack pointer on the kernel stack.  The
90 * user mode stack pointer is then available to the interrupt handler
91 * at frame->tf_esp.
92 *
93 * When processing an interrupt while in kernel mode, the processor
94 * continues to use the existing (kernel) stack.  Therefore we determine
95 * the stack pointer for the interrupted kernel procedure by adding an
96 * offset to the current frame pointer.
97 */
98
99#define	PMC_TRAPFRAME_TO_USER_SP(TF)	((TF)->tf_esp)
100#define	PMC_TRAPFRAME_TO_KERNEL_SP(TF)	((uintptr_t) &((TF)->tf_esp))
101
102#define	PMC_IN_KERNEL_STACK(S,START,END)		\
103	((S) >= (START) && (S) < (END))
104#define	PMC_IN_KERNEL(va) (((va) >= USRSTACK) &&	\
105	((va) < VM_MAX_KERNEL_ADDRESS))
106
107#define	PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
108
109#define	PMC_IN_TRAP_HANDLER(PC) 			\
110	((PC) >= (uintptr_t) start_exceptions &&	\
111	 (PC) < (uintptr_t) end_exceptions)
112
113#define	PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I)		\
114	(((I) & 0x00ffffff) == 0xe58955) /* pushl %ebp; movl %esp,%ebp */
115#define	PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I)		\
116	(((I) & 0x0000ffff) == 0xe589)	/* movl %esp,%ebp */
117#define	PMC_AT_FUNCTION_EPILOGUE_RET(I)			\
118	(((I) & 0xFF) == 0xC3)		   /* ret */
119
120/*
121 * Prototypes
122 */
123
124void	start_exceptions(void), end_exceptions(void);
125void	pmc_x86_lapic_enable_pmc_interrupt(void);
126
127#endif /* _KERNEL */
128#endif /* _MACHINE_PMC_MDEP_H */
129