1/*
2 * This header provides macros for at91 dma bindings.
3 *
4 * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
5 *
6 * GPLv2 only
7 */
8
9#ifndef __DT_BINDINGS_AT91_DMA_H__
10#define __DT_BINDINGS_AT91_DMA_H__
11
12/* ---------- HDMAC ---------- */
13
14/*
15 * Source and/or destination peripheral ID
16 */
17#define AT91_DMA_CFG_PER_ID_MASK	(0xff)
18#define AT91_DMA_CFG_PER_ID(id)		(id & AT91_DMA_CFG_PER_ID_MASK)
19
20/*
21 * FIFO configuration: it defines when a request is serviced.
22 */
23#define AT91_DMA_CFG_FIFOCFG_OFFSET	(8)
24#define AT91_DMA_CFG_FIFOCFG_MASK	(0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
25#define AT91_DMA_CFG_FIFOCFG_HALF	(0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET)	/* half FIFO (default behavior) */
26#define AT91_DMA_CFG_FIFOCFG_ALAP	(0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET)	/* largest defined AHB burst */
27#define AT91_DMA_CFG_FIFOCFG_ASAP	(0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET)	/* single AHB access */
28
29
30/* ---------- XDMAC ---------- */
31#define AT91_XDMAC_DT_MEM_IF_MASK	(0x1)
32#define AT91_XDMAC_DT_MEM_IF_OFFSET	(13)
33#define AT91_XDMAC_DT_MEM_IF(mem_if)	(((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \
34					<< AT91_XDMAC_DT_MEM_IF_OFFSET)
35#define AT91_XDMAC_DT_GET_MEM_IF(cfg)	(((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
36					& AT91_XDMAC_DT_MEM_IF_MASK)
37
38#define AT91_XDMAC_DT_PER_IF_MASK	(0x1)
39#define AT91_XDMAC_DT_PER_IF_OFFSET	(14)
40#define AT91_XDMAC_DT_PER_IF(per_if)	(((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \
41					<< AT91_XDMAC_DT_PER_IF_OFFSET)
42#define AT91_XDMAC_DT_GET_PER_IF(cfg)	(((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
43					& AT91_XDMAC_DT_PER_IF_MASK)
44
45#define AT91_XDMAC_DT_PERID_MASK	(0x7f)
46#define AT91_XDMAC_DT_PERID_OFFSET	(24)
47#define AT91_XDMAC_DT_PERID(perid)	(((perid) & AT91_XDMAC_DT_PERID_MASK) \
48					<< AT91_XDMAC_DT_PERID_OFFSET)
49#define AT91_XDMAC_DT_GET_PERID(cfg)	(((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
50					& AT91_XDMAC_DT_PERID_MASK)
51
52#endif /* __DT_BINDINGS_AT91_DMA_H__ */
53