1/*-
2 * Copyright (c) 2010-2011 Monthadar Al Jaberi, TerraNet AB
3 * All rights reserved.
4 *
5 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer,
13 *    without modification.
14 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
16 *    redistribution must be conditioned upon including a substantially
17 *    similar Disclaimer requirement for further binary redistribution.
18 *
19 * NO WARRANTY
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
23 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
24 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
28 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGES.
31 *
32 * $FreeBSD: stable/11/sys/dev/wtap/if_wtapioctl.h 345636 2019-03-28 09:50:25Z avos $
33 */
34
35/*
36 * Ioctl-related defintions for the Wireless TAP
37 * based on Atheros Wireless LAN controller driver.
38 */
39
40#ifndef _DEV_WTAP_WTAPIOCTL_H
41#define _DEV_WTAP_WTAPIOCTL_H
42
43#include <sys/param.h>
44#include <net80211/ieee80211_radiotap.h>
45
46#define	SIOCGATHSTATS	_IOWR('i', 137, struct ifreq)
47#define	SIOCZATHSTATS	_IOWR('i', 139, struct ifreq)
48
49#define WTAPIOCTLCRT	_IOW('W', 1, int)
50#define WTAPIOCTLDEL	_IOW('W', 2, int)
51
52struct wtap_stats {
53	u_int32_t	ast_watchdog;	/* device reset by watchdog */
54	u_int32_t	ast_hardware;	/* fatal hardware error interrupts */
55	u_int32_t	ast_bmiss;	/* beacon miss interrupts */
56	u_int32_t	ast_bmiss_phantom;/* beacon miss interrupts */
57	u_int32_t	ast_bstuck;	/* beacon stuck interrupts */
58	u_int32_t	ast_rxorn;	/* rx overrun interrupts */
59	u_int32_t	ast_rxeol;	/* rx eol interrupts */
60	u_int32_t	ast_txurn;	/* tx underrun interrupts */
61	u_int32_t	ast_mib;	/* mib interrupts */
62	u_int32_t	ast_intrcoal;	/* interrupts coalesced */
63	u_int32_t	ast_tx_packets;	/* packet sent on the interface */
64	u_int32_t	ast_tx_mgmt;	/* management frames transmitted */
65	u_int32_t	ast_tx_discard;	/* frames discarded prior to assoc */
66	u_int32_t	ast_tx_qstop;	/* output stopped 'cuz no buffer */
67	u_int32_t	ast_tx_encap;	/* tx encapsulation failed */
68	u_int32_t	ast_tx_nonode;	/* tx failed 'cuz no node */
69	u_int32_t	ast_tx_nombuf;	/* tx failed 'cuz no mbuf */
70	u_int32_t	ast_tx_nomcl;	/* tx failed 'cuz no cluster */
71	u_int32_t	ast_tx_linear;	/* tx linearized to cluster */
72	u_int32_t	ast_tx_nodata;	/* tx discarded empty frame */
73	u_int32_t	ast_tx_busdma;	/* tx failed for dma resrcs */
74	u_int32_t	ast_tx_xretries;/* tx failed 'cuz too many retries */
75	u_int32_t	ast_tx_fifoerr;	/* tx failed 'cuz FIFO underrun */
76	u_int32_t	ast_tx_filtered;/* tx failed 'cuz xmit filtered */
77	u_int32_t	ast_tx_shortretry;/* tx on-chip retries (short) */
78	u_int32_t	ast_tx_longretry;/* tx on-chip retries (long) */
79	u_int32_t	ast_tx_badrate;	/* tx failed 'cuz bogus xmit rate */
80	u_int32_t	ast_tx_noack;	/* tx frames with no ack marked */
81	u_int32_t	ast_tx_rts;	/* tx frames with rts enabled */
82	u_int32_t	ast_tx_cts;	/* tx frames with cts enabled */
83	u_int32_t	ast_tx_shortpre;/* tx frames with short preamble */
84	u_int32_t	ast_tx_altrate;	/* tx frames with alternate rate */
85	u_int32_t	ast_tx_protect;	/* tx frames with protection */
86	u_int32_t	ast_tx_ctsburst;/* tx frames with cts and bursting */
87	u_int32_t	ast_tx_ctsext;	/* tx frames with cts extension */
88	u_int32_t	ast_rx_nombuf;	/* rx setup failed 'cuz no mbuf */
89	u_int32_t	ast_rx_busdma;	/* rx setup failed for dma resrcs */
90	u_int32_t	ast_rx_orn;	/* rx failed 'cuz of desc overrun */
91	u_int32_t	ast_rx_crcerr;	/* rx failed 'cuz of bad CRC */
92	u_int32_t	ast_rx_fifoerr;	/* rx failed 'cuz of FIFO overrun */
93	u_int32_t	ast_rx_badcrypt;/* rx failed 'cuz decryption */
94	u_int32_t	ast_rx_badmic;	/* rx failed 'cuz MIC failure */
95	u_int32_t	ast_rx_phyerr;	/* rx failed 'cuz of PHY err */
96	u_int32_t	ast_rx_phy[32];	/* rx PHY error per-code counts */
97	u_int32_t	ast_rx_tooshort;/* rx discarded 'cuz frame too short */
98	u_int32_t	ast_rx_toobig;	/* rx discarded 'cuz frame too large */
99	u_int32_t	ast_rx_packets;	/* packet recv on the interface */
100	u_int32_t	ast_rx_mgt;	/* management frames received */
101	u_int32_t	ast_rx_ctl;	/* rx discarded 'cuz ctl frame */
102	int8_t		ast_tx_rssi;	/* tx rssi of last ack */
103	int8_t		ast_rx_rssi;	/* rx rssi from histogram */
104	u_int8_t	ast_tx_rate;	/* IEEE rate of last unicast tx */
105	u_int32_t	ast_be_xmit;	/* beacons transmitted */
106	u_int32_t	ast_be_nombuf;	/* beacon setup failed 'cuz no mbuf */
107	u_int32_t	ast_per_cal;	/* periodic calibration calls */
108	u_int32_t	ast_per_calfail;/* periodic calibration failed */
109	u_int32_t	ast_per_rfgain;	/* periodic calibration rfgain reset */
110	u_int32_t	ast_rate_calls;	/* rate control checks */
111	u_int32_t	ast_rate_raise;	/* rate control raised xmit rate */
112	u_int32_t	ast_rate_drop;	/* rate control dropped xmit rate */
113	u_int32_t	ast_ant_defswitch;/* rx/default antenna switches */
114	u_int32_t	ast_ant_txswitch;/* tx antenna switches */
115	u_int32_t	ast_ant_rx[8];	/* rx frames with antenna */
116	u_int32_t	ast_ant_tx[8];	/* tx frames with antenna */
117	u_int32_t	ast_cabq_xmit;	/* cabq frames transmitted */
118	u_int32_t	ast_cabq_busy;	/* cabq found busy */
119	u_int32_t	ast_tx_raw;	/* tx frames through raw api */
120	u_int32_t	ast_ff_txok;	/* fast frames tx'd successfully */
121	u_int32_t	ast_ff_txerr;	/* fast frames tx'd w/ error */
122	u_int32_t	ast_ff_rx;	/* fast frames rx'd */
123	u_int32_t	ast_ff_flush;	/* fast frames flushed from staging q */
124	u_int32_t	ast_tx_qfull;	/* tx dropped 'cuz of queue limit */
125	int8_t		ast_rx_noise;	/* rx noise floor */
126	u_int32_t	ast_tx_nobuf;	/* tx dropped 'cuz no ath buffer */
127	u_int32_t	ast_tdma_update;/* TDMA slot timing updates */
128	u_int32_t	ast_tdma_timers;/* TDMA slot update set beacon timers */
129	u_int32_t	ast_tdma_tsf;	/* TDMA slot update set TSF */
130	u_int16_t	ast_tdma_tsfadjp;/* TDMA slot adjust+ (usec, smoothed)*/
131	u_int16_t	ast_tdma_tsfadjm;/* TDMA slot adjust- (usec, smoothed)*/
132	u_int32_t	ast_tdma_ack;	/* TDMA tx failed 'cuz ACK required */
133	u_int32_t	ast_tx_raw_fail;/* raw tx failed 'cuz h/w down */
134	u_int32_t	ast_tx_nofrag;	/* tx dropped 'cuz no ath frag buffer */
135	u_int32_t	ast_be_missed;	/* missed beacons */
136	u_int32_t	ast_pad[13];
137};
138
139/*
140 * Radio capture format.
141 */
142#define WTAP_RX_RADIOTAP_PRESENT (		\
143	0)
144
145struct wtap_rx_radiotap_header {
146	struct ieee80211_radiotap_header wr_ihdr;
147#if 0
148	u_int64_t	wr_tsf;
149	u_int8_t	wr_flags;
150	u_int8_t	wr_rate;
151	int8_t		wr_antsignal;
152	int8_t		wr_antnoise;
153	u_int8_t	wr_antenna;
154	u_int8_t	wr_pad[3];
155	u_int32_t	wr_chan_flags;
156	u_int16_t	wr_chan_freq;
157	u_int8_t	wr_chan_ieee;
158	int8_t		wr_chan_maxpow;
159#endif
160} __packed __aligned(8);
161
162#define WTAP_TX_RADIOTAP_PRESENT (		\
163	0)
164
165struct wtap_tx_radiotap_header {
166	struct ieee80211_radiotap_header wt_ihdr;
167#if 0
168	u_int8_t	wt_flags;
169	u_int8_t	wt_rate;
170	u_int8_t	wt_txpower;
171	u_int8_t	wt_antenna;
172	u_int32_t	wt_chan_flags;
173	u_int16_t	wt_chan_freq;
174	u_int8_t	wt_chan_ieee;
175	int8_t		wt_chan_maxpow;
176#endif
177} __packed;
178
179#endif
180