1184610Salfred/* $FreeBSD: stable/11/sys/dev/usb/wlan/if_ural.c 343976 2019-02-10 21:00:02Z avos $ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 5184610Salfred * Damien Bergamini <damien.bergamini@free.fr> 6184610Salfred * 7184610Salfred * Copyright (c) 2006, 2008 8189002Sed * Hans Petter Selasky <hselasky@FreeBSD.org> 9184610Salfred * 10184610Salfred * Permission to use, copy, modify, and distribute this software for any 11184610Salfred * purpose with or without fee is hereby granted, provided that the above 12184610Salfred * copyright notice and this permission notice appear in all copies. 13184610Salfred * 14184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21184610Salfred */ 22184610Salfred 23184610Salfred#include <sys/cdefs.h> 24184610Salfred__FBSDID("$FreeBSD: stable/11/sys/dev/usb/wlan/if_ural.c 343976 2019-02-10 21:00:02Z avos $"); 25184610Salfred 26184610Salfred/*- 27184610Salfred * Ralink Technology RT2500USB chipset driver 28184610Salfred * http://www.ralinktech.com/ 29184610Salfred */ 30184610Salfred 31191746Sthompsa#include <sys/param.h> 32191746Sthompsa#include <sys/sockio.h> 33191746Sthompsa#include <sys/sysctl.h> 34191746Sthompsa#include <sys/lock.h> 35191746Sthompsa#include <sys/mutex.h> 36191746Sthompsa#include <sys/mbuf.h> 37191746Sthompsa#include <sys/kernel.h> 38191746Sthompsa#include <sys/socket.h> 39191746Sthompsa#include <sys/systm.h> 40191746Sthompsa#include <sys/malloc.h> 41191746Sthompsa#include <sys/module.h> 42191746Sthompsa#include <sys/bus.h> 43191746Sthompsa#include <sys/endian.h> 44191746Sthompsa#include <sys/kdb.h> 45184610Salfred 46191746Sthompsa#include <net/bpf.h> 47191746Sthompsa#include <net/if.h> 48257176Sglebius#include <net/if_var.h> 49191746Sthompsa#include <net/if_arp.h> 50191746Sthompsa#include <net/ethernet.h> 51191746Sthompsa#include <net/if_dl.h> 52191746Sthompsa#include <net/if_media.h> 53191746Sthompsa#include <net/if_types.h> 54191746Sthompsa 55191746Sthompsa#ifdef INET 56191746Sthompsa#include <netinet/in.h> 57191746Sthompsa#include <netinet/in_systm.h> 58191746Sthompsa#include <netinet/in_var.h> 59191746Sthompsa#include <netinet/if_ether.h> 60191746Sthompsa#include <netinet/ip.h> 61191746Sthompsa#endif 62191746Sthompsa 63191746Sthompsa#include <net80211/ieee80211_var.h> 64191746Sthompsa#include <net80211/ieee80211_regdomain.h> 65191746Sthompsa#include <net80211/ieee80211_radiotap.h> 66206358Srpaulo#include <net80211/ieee80211_ratectl.h> 67191746Sthompsa 68191746Sthompsa#include <dev/usb/usb.h> 69194677Sthompsa#include <dev/usb/usbdi.h> 70191746Sthompsa#include "usbdevs.h" 71184610Salfred 72194677Sthompsa#define USB_DEBUG_VAR ural_debug 73194677Sthompsa#include <dev/usb/usb_debug.h> 74191746Sthompsa 75188942Sthompsa#include <dev/usb/wlan/if_uralreg.h> 76188942Sthompsa#include <dev/usb/wlan/if_uralvar.h> 77184610Salfred 78207077Sthompsa#ifdef USB_DEBUG 79184610Salfredstatic int ural_debug = 0; 80184610Salfred 81227309Sedstatic SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural"); 82276701ShselaskySYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RWTUN, &ural_debug, 0, 83184610Salfred "Debug level"); 84184610Salfred#endif 85184610Salfred 86188417Sthompsa#define URAL_RSSI(rssi) \ 87188417Sthompsa ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \ 88188417Sthompsa ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0) 89184610Salfred 90188417Sthompsa/* various supported device vendors/products */ 91223486Shselaskystatic const STRUCT_USB_HOST_ID ural_devs[] = { 92201028Sthompsa#define URAL_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 93201028Sthompsa URAL_DEV(ASUS, WL167G), 94201028Sthompsa URAL_DEV(ASUS, RT2570), 95201028Sthompsa URAL_DEV(BELKIN, F5D7050), 96201028Sthompsa URAL_DEV(BELKIN, F5D7051), 97201028Sthompsa URAL_DEV(CISCOLINKSYS, HU200TS), 98201028Sthompsa URAL_DEV(CISCOLINKSYS, WUSB54G), 99201028Sthompsa URAL_DEV(CISCOLINKSYS, WUSB54GP), 100201028Sthompsa URAL_DEV(CONCEPTRONIC2, C54RU), 101201028Sthompsa URAL_DEV(DLINK, DWLG122), 102201028Sthompsa URAL_DEV(GIGABYTE, GN54G), 103201028Sthompsa URAL_DEV(GIGABYTE, GNWBKG), 104201028Sthompsa URAL_DEV(GUILLEMOT, HWGUSB254), 105201028Sthompsa URAL_DEV(MELCO, KG54), 106201028Sthompsa URAL_DEV(MELCO, KG54AI), 107201028Sthompsa URAL_DEV(MELCO, KG54YB), 108201028Sthompsa URAL_DEV(MELCO, NINWIFI), 109201028Sthompsa URAL_DEV(MSI, RT2570), 110201028Sthompsa URAL_DEV(MSI, RT2570_2), 111201028Sthompsa URAL_DEV(MSI, RT2570_3), 112201028Sthompsa URAL_DEV(NOVATECH, NV902), 113201028Sthompsa URAL_DEV(RALINK, RT2570), 114201028Sthompsa URAL_DEV(RALINK, RT2570_2), 115201028Sthompsa URAL_DEV(RALINK, RT2570_3), 116201028Sthompsa URAL_DEV(SIEMENS2, WL54G), 117201028Sthompsa URAL_DEV(SMC, 2862WG), 118201028Sthompsa URAL_DEV(SPHAIRON, UB801R), 119201028Sthompsa URAL_DEV(SURECOM, RT2570), 120201028Sthompsa URAL_DEV(VTECH, RT2570), 121201028Sthompsa URAL_DEV(ZINWELL, RT2570), 122201028Sthompsa#undef URAL_DEV 123188417Sthompsa}; 124184610Salfred 125193045Sthompsastatic usb_callback_t ural_bulk_read_callback; 126193045Sthompsastatic usb_callback_t ural_bulk_write_callback; 127184610Salfred 128193045Sthompsastatic usb_error_t ural_do_request(struct ural_softc *sc, 129192984Sthompsa struct usb_device_request *req, void *data); 130185948Sthompsastatic struct ieee80211vap *ural_vap_create(struct ieee80211com *, 131228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, 132228621Sbschmidt int, const uint8_t [IEEE80211_ADDR_LEN], 133228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 134188417Sthompsastatic void ural_vap_delete(struct ieee80211vap *); 135188417Sthompsastatic void ural_tx_free(struct ural_tx_data *, int); 136188419Sthompsastatic void ural_setup_tx_list(struct ural_softc *); 137188419Sthompsastatic void ural_unsetup_tx_list(struct ural_softc *); 138188417Sthompsastatic int ural_newstate(struct ieee80211vap *, 139188417Sthompsa enum ieee80211_state, int); 140188417Sthompsastatic void ural_setup_tx_desc(struct ural_softc *, 141188417Sthompsa struct ural_tx_desc *, uint32_t, int, int); 142188417Sthompsastatic int ural_tx_bcn(struct ural_softc *, struct mbuf *, 143188417Sthompsa struct ieee80211_node *); 144188417Sthompsastatic int ural_tx_mgt(struct ural_softc *, struct mbuf *, 145188417Sthompsa struct ieee80211_node *); 146188417Sthompsastatic int ural_tx_data(struct ural_softc *, struct mbuf *, 147188417Sthompsa struct ieee80211_node *); 148287197Sglebiusstatic int ural_transmit(struct ieee80211com *, struct mbuf *); 149287197Sglebiusstatic void ural_start(struct ural_softc *); 150287197Sglebiusstatic void ural_parent(struct ieee80211com *); 151188417Sthompsastatic void ural_set_testmode(struct ural_softc *); 152188417Sthompsastatic void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 153188417Sthompsa int); 154188417Sthompsastatic uint16_t ural_read(struct ural_softc *, uint16_t); 155188417Sthompsastatic void ural_read_multi(struct ural_softc *, uint16_t, void *, 156188417Sthompsa int); 157188417Sthompsastatic void ural_write(struct ural_softc *, uint16_t, uint16_t); 158188417Sthompsastatic void ural_write_multi(struct ural_softc *, uint16_t, void *, 159188417Sthompsa int) __unused; 160188417Sthompsastatic void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 161188417Sthompsastatic uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 162188417Sthompsastatic void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 163188417Sthompsastatic void ural_scan_start(struct ieee80211com *); 164188417Sthompsastatic void ural_scan_end(struct ieee80211com *); 165300749Savosstatic void ural_getradiocaps(struct ieee80211com *, int, int *, 166300749Savos struct ieee80211_channel[]); 167188417Sthompsastatic void ural_set_channel(struct ieee80211com *); 168188417Sthompsastatic void ural_set_chan(struct ural_softc *, 169188417Sthompsa struct ieee80211_channel *); 170188417Sthompsastatic void ural_disable_rf_tune(struct ural_softc *); 171188417Sthompsastatic void ural_enable_tsf_sync(struct ural_softc *); 172192468Ssamstatic void ural_enable_tsf(struct ural_softc *); 173287197Sglebiusstatic void ural_update_slot(struct ural_softc *); 174188417Sthompsastatic void ural_set_txpreamble(struct ural_softc *); 175188417Sthompsastatic void ural_set_basicrates(struct ural_softc *, 176188417Sthompsa const struct ieee80211_channel *); 177188417Sthompsastatic void ural_set_bssid(struct ural_softc *, const uint8_t *); 178287197Sglebiusstatic void ural_set_macaddr(struct ural_softc *, const uint8_t *); 179283540Sglebiusstatic void ural_update_promisc(struct ieee80211com *); 180191746Sthompsastatic void ural_setpromisc(struct ural_softc *); 181188417Sthompsastatic const char *ural_get_rf(int); 182188417Sthompsastatic void ural_read_eeprom(struct ural_softc *); 183188417Sthompsastatic int ural_bbp_init(struct ural_softc *); 184188417Sthompsastatic void ural_set_txantenna(struct ural_softc *, int); 185188417Sthompsastatic void ural_set_rxantenna(struct ural_softc *, int); 186287197Sglebiusstatic void ural_init(struct ural_softc *); 187191746Sthompsastatic void ural_stop(struct ural_softc *); 188188417Sthompsastatic int ural_raw_xmit(struct ieee80211_node *, struct mbuf *, 189188417Sthompsa const struct ieee80211_bpf_params *); 190206358Srpaulostatic void ural_ratectl_start(struct ural_softc *, 191188417Sthompsa struct ieee80211_node *); 192206358Srpaulostatic void ural_ratectl_timeout(void *); 193206358Srpaulostatic void ural_ratectl_task(void *, int); 194188619Sthompsastatic int ural_pause(struct ural_softc *sc, int timeout); 195184610Salfred 196184610Salfred/* 197188417Sthompsa * Default values for MAC registers; values taken from the reference driver. 198184610Salfred */ 199188417Sthompsastatic const struct { 200188417Sthompsa uint16_t reg; 201188417Sthompsa uint16_t val; 202188417Sthompsa} ural_def_mac[] = { 203188417Sthompsa { RAL_TXRX_CSR5, 0x8c8d }, 204188417Sthompsa { RAL_TXRX_CSR6, 0x8b8a }, 205188417Sthompsa { RAL_TXRX_CSR7, 0x8687 }, 206188417Sthompsa { RAL_TXRX_CSR8, 0x0085 }, 207188417Sthompsa { RAL_MAC_CSR13, 0x1111 }, 208188417Sthompsa { RAL_MAC_CSR14, 0x1e11 }, 209188417Sthompsa { RAL_TXRX_CSR21, 0xe78f }, 210188417Sthompsa { RAL_MAC_CSR9, 0xff1d }, 211188417Sthompsa { RAL_MAC_CSR11, 0x0002 }, 212188417Sthompsa { RAL_MAC_CSR22, 0x0053 }, 213188417Sthompsa { RAL_MAC_CSR15, 0x0000 }, 214188417Sthompsa { RAL_MAC_CSR8, RAL_FRAME_SIZE }, 215188417Sthompsa { RAL_TXRX_CSR19, 0x0000 }, 216188417Sthompsa { RAL_TXRX_CSR18, 0x005a }, 217188417Sthompsa { RAL_PHY_CSR2, 0x0000 }, 218188417Sthompsa { RAL_TXRX_CSR0, 0x1ec0 }, 219188417Sthompsa { RAL_PHY_CSR4, 0x000f } 220184610Salfred}; 221184610Salfred 222184610Salfred/* 223184610Salfred * Default values for BBP registers; values taken from the reference driver. 224184610Salfred */ 225188417Sthompsastatic const struct { 226184610Salfred uint8_t reg; 227184610Salfred uint8_t val; 228188417Sthompsa} ural_def_bbp[] = { 229188417Sthompsa { 3, 0x02 }, 230188417Sthompsa { 4, 0x19 }, 231188417Sthompsa { 14, 0x1c }, 232188417Sthompsa { 15, 0x30 }, 233188417Sthompsa { 16, 0xac }, 234188417Sthompsa { 17, 0x48 }, 235188417Sthompsa { 18, 0x18 }, 236188417Sthompsa { 19, 0xff }, 237188417Sthompsa { 20, 0x1e }, 238188417Sthompsa { 21, 0x08 }, 239188417Sthompsa { 22, 0x08 }, 240188417Sthompsa { 23, 0x08 }, 241188417Sthompsa { 24, 0x80 }, 242188417Sthompsa { 25, 0x50 }, 243188417Sthompsa { 26, 0x08 }, 244188417Sthompsa { 27, 0x23 }, 245188417Sthompsa { 30, 0x10 }, 246188417Sthompsa { 31, 0x2b }, 247188417Sthompsa { 32, 0xb9 }, 248188417Sthompsa { 34, 0x12 }, 249188417Sthompsa { 35, 0x50 }, 250188417Sthompsa { 39, 0xc4 }, 251188417Sthompsa { 40, 0x02 }, 252188417Sthompsa { 41, 0x60 }, 253188417Sthompsa { 53, 0x10 }, 254188417Sthompsa { 54, 0x18 }, 255188417Sthompsa { 56, 0x08 }, 256188417Sthompsa { 57, 0x10 }, 257188417Sthompsa { 58, 0x08 }, 258188417Sthompsa { 61, 0x60 }, 259188417Sthompsa { 62, 0x10 }, 260188417Sthompsa { 75, 0xff } 261184610Salfred}; 262184610Salfred 263184610Salfred/* 264184610Salfred * Default values for RF register R2 indexed by channel numbers. 265184610Salfred */ 266184610Salfredstatic const uint32_t ural_rf2522_r2[] = { 267184610Salfred 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 268184610Salfred 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 269184610Salfred}; 270184610Salfred 271184610Salfredstatic const uint32_t ural_rf2523_r2[] = { 272184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 273184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 274184610Salfred}; 275184610Salfred 276184610Salfredstatic const uint32_t ural_rf2524_r2[] = { 277184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 278184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 279184610Salfred}; 280184610Salfred 281184610Salfredstatic const uint32_t ural_rf2525_r2[] = { 282184610Salfred 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 283184610Salfred 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 284184610Salfred}; 285184610Salfred 286184610Salfredstatic const uint32_t ural_rf2525_hi_r2[] = { 287184610Salfred 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 288184610Salfred 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 289184610Salfred}; 290184610Salfred 291184610Salfredstatic const uint32_t ural_rf2525e_r2[] = { 292184610Salfred 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 293184610Salfred 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 294184610Salfred}; 295184610Salfred 296184610Salfredstatic const uint32_t ural_rf2526_hi_r2[] = { 297184610Salfred 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 298184610Salfred 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 299184610Salfred}; 300184610Salfred 301184610Salfredstatic const uint32_t ural_rf2526_r2[] = { 302184610Salfred 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 303184610Salfred 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 304184610Salfred}; 305184610Salfred 306184610Salfred/* 307184610Salfred * For dual-band RF, RF registers R1 and R4 also depend on channel number; 308184610Salfred * values taken from the reference driver. 309184610Salfred */ 310188417Sthompsastatic const struct { 311188417Sthompsa uint8_t chan; 312188417Sthompsa uint32_t r1; 313188417Sthompsa uint32_t r2; 314188417Sthompsa uint32_t r4; 315188417Sthompsa} ural_rf5222[] = { 316188417Sthompsa { 1, 0x08808, 0x0044d, 0x00282 }, 317188417Sthompsa { 2, 0x08808, 0x0044e, 0x00282 }, 318188417Sthompsa { 3, 0x08808, 0x0044f, 0x00282 }, 319188417Sthompsa { 4, 0x08808, 0x00460, 0x00282 }, 320188417Sthompsa { 5, 0x08808, 0x00461, 0x00282 }, 321188417Sthompsa { 6, 0x08808, 0x00462, 0x00282 }, 322188417Sthompsa { 7, 0x08808, 0x00463, 0x00282 }, 323188417Sthompsa { 8, 0x08808, 0x00464, 0x00282 }, 324188417Sthompsa { 9, 0x08808, 0x00465, 0x00282 }, 325188417Sthompsa { 10, 0x08808, 0x00466, 0x00282 }, 326188417Sthompsa { 11, 0x08808, 0x00467, 0x00282 }, 327188417Sthompsa { 12, 0x08808, 0x00468, 0x00282 }, 328188417Sthompsa { 13, 0x08808, 0x00469, 0x00282 }, 329188417Sthompsa { 14, 0x08808, 0x0046b, 0x00286 }, 330184610Salfred 331188417Sthompsa { 36, 0x08804, 0x06225, 0x00287 }, 332188417Sthompsa { 40, 0x08804, 0x06226, 0x00287 }, 333188417Sthompsa { 44, 0x08804, 0x06227, 0x00287 }, 334188417Sthompsa { 48, 0x08804, 0x06228, 0x00287 }, 335188417Sthompsa { 52, 0x08804, 0x06229, 0x00287 }, 336188417Sthompsa { 56, 0x08804, 0x0622a, 0x00287 }, 337188417Sthompsa { 60, 0x08804, 0x0622b, 0x00287 }, 338188417Sthompsa { 64, 0x08804, 0x0622c, 0x00287 }, 339184610Salfred 340188417Sthompsa { 100, 0x08804, 0x02200, 0x00283 }, 341188417Sthompsa { 104, 0x08804, 0x02201, 0x00283 }, 342188417Sthompsa { 108, 0x08804, 0x02202, 0x00283 }, 343188417Sthompsa { 112, 0x08804, 0x02203, 0x00283 }, 344188417Sthompsa { 116, 0x08804, 0x02204, 0x00283 }, 345188417Sthompsa { 120, 0x08804, 0x02205, 0x00283 }, 346188417Sthompsa { 124, 0x08804, 0x02206, 0x00283 }, 347188417Sthompsa { 128, 0x08804, 0x02207, 0x00283 }, 348188417Sthompsa { 132, 0x08804, 0x02208, 0x00283 }, 349188417Sthompsa { 136, 0x08804, 0x02209, 0x00283 }, 350188417Sthompsa { 140, 0x08804, 0x0220a, 0x00283 }, 351184610Salfred 352188417Sthompsa { 149, 0x08808, 0x02429, 0x00281 }, 353188417Sthompsa { 153, 0x08808, 0x0242b, 0x00281 }, 354188417Sthompsa { 157, 0x08808, 0x0242d, 0x00281 }, 355188417Sthompsa { 161, 0x08808, 0x0242f, 0x00281 } 356184610Salfred}; 357184610Salfred 358300749Savosstatic const uint8_t ural_chan_5ghz[] = 359300749Savos { 36, 40, 44, 48, 52, 56, 60, 64, 360300749Savos 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 361300749Savos 149, 153, 157, 161 }; 362300749Savos 363192984Sthompsastatic const struct usb_config ural_config[URAL_N_TRANSFER] = { 364188417Sthompsa [URAL_BULK_WR] = { 365184610Salfred .type = UE_BULK, 366184610Salfred .endpoint = UE_ADDR_ANY, 367184610Salfred .direction = UE_DIR_OUT, 368190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4), 369190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 370190734Sthompsa .callback = ural_bulk_write_callback, 371190734Sthompsa .timeout = 5000, /* ms */ 372184610Salfred }, 373188417Sthompsa [URAL_BULK_RD] = { 374184610Salfred .type = UE_BULK, 375184610Salfred .endpoint = UE_ADDR_ANY, 376184610Salfred .direction = UE_DIR_IN, 377190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE), 378190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 379190734Sthompsa .callback = ural_bulk_read_callback, 380184610Salfred }, 381184610Salfred}; 382184610Salfred 383188417Sthompsastatic device_probe_t ural_match; 384188417Sthompsastatic device_attach_t ural_attach; 385188417Sthompsastatic device_detach_t ural_detach; 386184610Salfred 387184610Salfredstatic device_method_t ural_methods[] = { 388188417Sthompsa /* Device interface */ 389188417Sthompsa DEVMETHOD(device_probe, ural_match), 390188417Sthompsa DEVMETHOD(device_attach, ural_attach), 391188417Sthompsa DEVMETHOD(device_detach, ural_detach), 392246614Shselasky DEVMETHOD_END 393184610Salfred}; 394184610Salfred 395184610Salfredstatic driver_t ural_driver = { 396184610Salfred .name = "ural", 397184610Salfred .methods = ural_methods, 398184610Salfred .size = sizeof(struct ural_softc), 399184610Salfred}; 400184610Salfred 401188417Sthompsastatic devclass_t ural_devclass; 402188417Sthompsa 403189275SthompsaDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0); 404188942SthompsaMODULE_DEPEND(ural, usb, 1, 1, 1); 405184610SalfredMODULE_DEPEND(ural, wlan, 1, 1, 1); 406212122SthompsaMODULE_VERSION(ural, 1); 407292080SimpUSB_PNP_HOST_INFO(ural_devs); 408184610Salfred 409184610Salfredstatic int 410188417Sthompsaural_match(device_t self) 411184610Salfred{ 412192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(self); 413184610Salfred 414192499Sthompsa if (uaa->usb_mode != USB_MODE_HOST) 415184610Salfred return (ENXIO); 416188417Sthompsa if (uaa->info.bConfigIndex != 0) 417184610Salfred return (ENXIO); 418188417Sthompsa if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX) 419184610Salfred return (ENXIO); 420188417Sthompsa 421194228Sthompsa return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa)); 422184610Salfred} 423184610Salfred 424184610Salfredstatic int 425188417Sthompsaural_attach(device_t self) 426184610Salfred{ 427192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(self); 428188417Sthompsa struct ural_softc *sc = device_get_softc(self); 429287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 430293339Savos uint8_t iface_index; 431184610Salfred int error; 432184610Salfred 433194228Sthompsa device_set_usb_desc(self); 434184610Salfred sc->sc_udev = uaa->device; 435188417Sthompsa sc->sc_dev = self; 436184610Salfred 437188417Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(self), 438188417Sthompsa MTX_NETWORK_LOCK, MTX_DEF); 439287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 440184610Salfred 441184610Salfred iface_index = RAL_IFACE_INDEX; 442194228Sthompsa error = usbd_transfer_setup(uaa->device, 443184610Salfred &iface_index, sc->sc_xfer, ural_config, 444184610Salfred URAL_N_TRANSFER, sc, &sc->sc_mtx); 445184610Salfred if (error) { 446188417Sthompsa device_printf(self, "could not allocate USB transfers, " 447194228Sthompsa "err=%s\n", usbd_errstr(error)); 448184610Salfred goto detach; 449184610Salfred } 450184610Salfred 451188419Sthompsa RAL_LOCK(sc); 452188417Sthompsa /* retrieve RT2570 rev. no */ 453188417Sthompsa sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 454184610Salfred 455188417Sthompsa /* retrieve MAC address and various other things from EEPROM */ 456188417Sthompsa ural_read_eeprom(sc); 457188417Sthompsa RAL_UNLOCK(sc); 458184610Salfred 459191746Sthompsa device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 460188417Sthompsa sc->asic_rev, ural_get_rf(sc->rf_rev)); 461184610Salfred 462283537Sglebius ic->ic_softc = sc; 463283527Sglebius ic->ic_name = device_get_nameunit(self); 464188417Sthompsa ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 465184610Salfred 466188417Sthompsa /* set device capabilities */ 467188417Sthompsa ic->ic_caps = 468188417Sthompsa IEEE80211_C_STA /* station mode supported */ 469188417Sthompsa | IEEE80211_C_IBSS /* IBSS mode supported */ 470188417Sthompsa | IEEE80211_C_MONITOR /* monitor mode supported */ 471188417Sthompsa | IEEE80211_C_HOSTAP /* HostAp mode supported */ 472188417Sthompsa | IEEE80211_C_TXPMGT /* tx power management */ 473188417Sthompsa | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 474188417Sthompsa | IEEE80211_C_SHSLOT /* short slot time supported */ 475188417Sthompsa | IEEE80211_C_BGSCAN /* bg scanning supported */ 476188417Sthompsa | IEEE80211_C_WPA /* 802.11i */ 477188417Sthompsa ; 478184610Salfred 479300749Savos ural_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 480300749Savos ic->ic_channels); 481184610Salfred 482287197Sglebius ieee80211_ifattach(ic); 483189123Sthompsa ic->ic_update_promisc = ural_update_promisc; 484188417Sthompsa ic->ic_raw_xmit = ural_raw_xmit; 485188417Sthompsa ic->ic_scan_start = ural_scan_start; 486188417Sthompsa ic->ic_scan_end = ural_scan_end; 487300749Savos ic->ic_getradiocaps = ural_getradiocaps; 488188417Sthompsa ic->ic_set_channel = ural_set_channel; 489287197Sglebius ic->ic_parent = ural_parent; 490287197Sglebius ic->ic_transmit = ural_transmit; 491188417Sthompsa ic->ic_vap_create = ural_vap_create; 492188417Sthompsa ic->ic_vap_delete = ural_vap_delete; 493184610Salfred 494192468Ssam ieee80211_radiotap_attach(ic, 495192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 496192468Ssam RAL_TX_RADIOTAP_PRESENT, 497192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 498192468Ssam RAL_RX_RADIOTAP_PRESENT); 499184610Salfred 500188417Sthompsa if (bootverbose) 501188417Sthompsa ieee80211_announce(ic); 502184610Salfred 503191746Sthompsa return (0); 504191746Sthompsa 505191746Sthompsadetach: 506191746Sthompsa ural_detach(self); 507191746Sthompsa return (ENXIO); /* failure */ 508188417Sthompsa} 509184610Salfred 510188417Sthompsastatic int 511188417Sthompsaural_detach(device_t self) 512188417Sthompsa{ 513188417Sthompsa struct ural_softc *sc = device_get_softc(self); 514287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 515184610Salfred 516246614Shselasky /* prevent further ioctls */ 517246614Shselasky RAL_LOCK(sc); 518246614Shselasky sc->sc_detached = 1; 519246614Shselasky RAL_UNLOCK(sc); 520246614Shselasky 521188419Sthompsa /* stop all USB transfers */ 522194228Sthompsa usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER); 523184610Salfred 524188419Sthompsa /* free TX list, if any */ 525188419Sthompsa RAL_LOCK(sc); 526188419Sthompsa ural_unsetup_tx_list(sc); 527188419Sthompsa RAL_UNLOCK(sc); 528188419Sthompsa 529287197Sglebius if (ic->ic_softc == sc) 530188417Sthompsa ieee80211_ifdetach(ic); 531287197Sglebius mbufq_drain(&sc->sc_snd); 532188417Sthompsa mtx_destroy(&sc->sc_mtx); 533184610Salfred 534188417Sthompsa return (0); 535184610Salfred} 536184610Salfred 537193045Sthompsastatic usb_error_t 538189123Sthompsaural_do_request(struct ural_softc *sc, 539192984Sthompsa struct usb_device_request *req, void *data) 540189123Sthompsa{ 541193045Sthompsa usb_error_t err; 542189123Sthompsa int ntries = 10; 543189123Sthompsa 544189123Sthompsa while (ntries--) { 545194228Sthompsa err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 546189123Sthompsa req, data, 0, NULL, 250 /* ms */); 547189123Sthompsa if (err == 0) 548189123Sthompsa break; 549189123Sthompsa 550189123Sthompsa DPRINTFN(1, "Control request failed, %s (retrying)\n", 551194228Sthompsa usbd_errstr(err)); 552189123Sthompsa if (ural_pause(sc, hz / 100)) 553189123Sthompsa break; 554189123Sthompsa } 555189123Sthompsa return (err); 556189123Sthompsa} 557189123Sthompsa 558188417Sthompsastatic struct ieee80211vap * 559228621Sbschmidtural_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 560228621Sbschmidt enum ieee80211_opmode opmode, int flags, 561228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 562228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 563184610Salfred{ 564286950Sadrian struct ural_softc *sc = ic->ic_softc; 565188417Sthompsa struct ural_vap *uvp; 566188417Sthompsa struct ieee80211vap *vap; 567184610Salfred 568188417Sthompsa if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 569188417Sthompsa return NULL; 570287854Skevlo uvp = malloc(sizeof(struct ural_vap), M_80211_VAP, M_WAITOK | M_ZERO); 571188417Sthompsa vap = &uvp->vap; 572188417Sthompsa /* enable s/w bmiss handling for sta mode */ 573184610Salfred 574257743Shselasky if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 575287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 576257743Shselasky /* out of memory */ 577257743Shselasky free(uvp, M_80211_VAP); 578257743Shselasky return (NULL); 579257743Shselasky } 580257743Shselasky 581188417Sthompsa /* override state transition machine */ 582188417Sthompsa uvp->newstate = vap->iv_newstate; 583188417Sthompsa vap->iv_newstate = ural_newstate; 584184610Salfred 585206358Srpaulo usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0); 586206358Srpaulo TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp); 587206358Srpaulo ieee80211_ratectl_init(vap); 588206358Srpaulo ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */); 589184610Salfred 590188417Sthompsa /* complete setup */ 591287197Sglebius ieee80211_vap_attach(vap, ieee80211_media_change, 592287197Sglebius ieee80211_media_status, mac); 593188417Sthompsa ic->ic_opmode = opmode; 594188417Sthompsa return vap; 595184610Salfred} 596184610Salfred 597184610Salfredstatic void 598188417Sthompsaural_vap_delete(struct ieee80211vap *vap) 599184610Salfred{ 600188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 601191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 602184610Salfred 603206358Srpaulo usb_callout_drain(&uvp->ratectl_ch); 604206358Srpaulo ieee80211_draintask(ic, &uvp->ratectl_task); 605206358Srpaulo ieee80211_ratectl_deinit(vap); 606188417Sthompsa ieee80211_vap_detach(vap); 607188417Sthompsa free(uvp, M_80211_VAP); 608184610Salfred} 609184610Salfred 610184610Salfredstatic void 611188417Sthompsaural_tx_free(struct ural_tx_data *data, int txerr) 612184610Salfred{ 613188417Sthompsa struct ural_softc *sc = data->sc; 614184610Salfred 615188417Sthompsa if (data->m != NULL) { 616287197Sglebius ieee80211_tx_complete(data->ni, data->m, txerr); 617188417Sthompsa data->m = NULL; 618188417Sthompsa data->ni = NULL; 619188417Sthompsa } 620188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 621188417Sthompsa sc->tx_nfree++; 622184610Salfred} 623184610Salfred 624188419Sthompsastatic void 625188419Sthompsaural_setup_tx_list(struct ural_softc *sc) 626184610Salfred{ 627188417Sthompsa struct ural_tx_data *data; 628188417Sthompsa int i; 629184610Salfred 630188417Sthompsa sc->tx_nfree = 0; 631188417Sthompsa STAILQ_INIT(&sc->tx_q); 632188417Sthompsa STAILQ_INIT(&sc->tx_free); 633184610Salfred 634188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 635188417Sthompsa data = &sc->tx_data[i]; 636184610Salfred 637188417Sthompsa data->sc = sc; 638188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 639188417Sthompsa sc->tx_nfree++; 640184610Salfred } 641184610Salfred} 642184610Salfred 643184610Salfredstatic void 644188419Sthompsaural_unsetup_tx_list(struct ural_softc *sc) 645184610Salfred{ 646188417Sthompsa struct ural_tx_data *data; 647188417Sthompsa int i; 648184610Salfred 649188419Sthompsa /* make sure any subsequent use of the queues will fail */ 650188419Sthompsa sc->tx_nfree = 0; 651188419Sthompsa STAILQ_INIT(&sc->tx_q); 652188419Sthompsa STAILQ_INIT(&sc->tx_free); 653184610Salfred 654188419Sthompsa /* free up all node references and mbufs */ 655188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 656188417Sthompsa data = &sc->tx_data[i]; 657184610Salfred 658188417Sthompsa if (data->m != NULL) { 659188417Sthompsa m_freem(data->m); 660188417Sthompsa data->m = NULL; 661188417Sthompsa } 662188417Sthompsa if (data->ni != NULL) { 663188417Sthompsa ieee80211_free_node(data->ni); 664188417Sthompsa data->ni = NULL; 665188417Sthompsa } 666184610Salfred } 667184610Salfred} 668184610Salfred 669191746Sthompsastatic int 670191746Sthompsaural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 671184610Salfred{ 672188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 673191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 674286950Sadrian struct ural_softc *sc = ic->ic_softc; 675188417Sthompsa const struct ieee80211_txparam *tp; 676188417Sthompsa struct ieee80211_node *ni; 677188417Sthompsa struct mbuf *m; 678184610Salfred 679191746Sthompsa DPRINTF("%s -> %s\n", 680191746Sthompsa ieee80211_state_name[vap->iv_state], 681191746Sthompsa ieee80211_state_name[nstate]); 682184610Salfred 683191746Sthompsa IEEE80211_UNLOCK(ic); 684191746Sthompsa RAL_LOCK(sc); 685206358Srpaulo usb_callout_stop(&uvp->ratectl_ch); 686191746Sthompsa 687191746Sthompsa switch (nstate) { 688188417Sthompsa case IEEE80211_S_INIT: 689191746Sthompsa if (vap->iv_state == IEEE80211_S_RUN) { 690188417Sthompsa /* abort TSF synchronization */ 691188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 692184610Salfred 693188417Sthompsa /* force tx led to stop blinking */ 694188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 0); 695188417Sthompsa } 696188417Sthompsa break; 697184610Salfred 698188417Sthompsa case IEEE80211_S_RUN: 699212127Sthompsa ni = ieee80211_ref_node(vap->iv_bss); 700188417Sthompsa 701188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) { 702288533Sadrian if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) 703288533Sadrian goto fail; 704288533Sadrian 705287197Sglebius ural_update_slot(sc); 706188417Sthompsa ural_set_txpreamble(sc); 707188417Sthompsa ural_set_basicrates(sc, ic->ic_bsschan); 708296356Savos IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid); 709296356Savos ural_set_bssid(sc, sc->sc_bssid); 710188417Sthompsa } 711188417Sthompsa 712188417Sthompsa if (vap->iv_opmode == IEEE80211_M_HOSTAP || 713188417Sthompsa vap->iv_opmode == IEEE80211_M_IBSS) { 714288636Sadrian m = ieee80211_beacon_alloc(ni); 715188417Sthompsa if (m == NULL) { 716188417Sthompsa device_printf(sc->sc_dev, 717188417Sthompsa "could not allocate beacon\n"); 718288533Sadrian goto fail; 719184610Salfred } 720191710Sthompsa ieee80211_ref_node(ni); 721188417Sthompsa if (ural_tx_bcn(sc, m, ni) != 0) { 722188417Sthompsa device_printf(sc->sc_dev, 723188417Sthompsa "could not send beacon\n"); 724288533Sadrian goto fail; 725184610Salfred } 726184610Salfred } 727184610Salfred 728188417Sthompsa /* make tx led blink on tx (controlled by ASIC) */ 729188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 1); 730184610Salfred 731188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) 732188417Sthompsa ural_enable_tsf_sync(sc); 733192468Ssam else 734192468Ssam ural_enable_tsf(sc); 735184610Salfred 736188417Sthompsa /* enable automatic rate adaptation */ 737192468Ssam /* XXX should use ic_bsschan but not valid until after newstate call below */ 738192468Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 739188417Sthompsa if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) 740206358Srpaulo ural_ratectl_start(sc, ni); 741212127Sthompsa ieee80211_free_node(ni); 742188417Sthompsa break; 743184610Salfred 744188417Sthompsa default: 745188417Sthompsa break; 746188417Sthompsa } 747188417Sthompsa RAL_UNLOCK(sc); 748188417Sthompsa IEEE80211_LOCK(ic); 749191746Sthompsa return (uvp->newstate(vap, nstate, arg)); 750288533Sadrian 751288533Sadrianfail: 752288533Sadrian RAL_UNLOCK(sc); 753288533Sadrian IEEE80211_LOCK(ic); 754288533Sadrian ieee80211_free_node(ni); 755288533Sadrian return (-1); 756188417Sthompsa} 757184610Salfred 758184610Salfred 759188417Sthompsastatic void 760194677Sthompsaural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 761188417Sthompsa{ 762194677Sthompsa struct ural_softc *sc = usbd_xfer_softc(xfer); 763192468Ssam struct ieee80211vap *vap; 764188417Sthompsa struct ural_tx_data *data; 765188417Sthompsa struct mbuf *m; 766194677Sthompsa struct usb_page_cache *pc; 767194677Sthompsa int len; 768184610Salfred 769194677Sthompsa usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 770194677Sthompsa 771188417Sthompsa switch (USB_GET_STATE(xfer)) { 772188417Sthompsa case USB_ST_TRANSFERRED: 773194677Sthompsa DPRINTFN(11, "transfer complete, %d bytes\n", len); 774184610Salfred 775188417Sthompsa /* free resources */ 776194677Sthompsa data = usbd_xfer_get_priv(xfer); 777188417Sthompsa ural_tx_free(data, 0); 778194677Sthompsa usbd_xfer_set_priv(xfer, NULL); 779184610Salfred 780188417Sthompsa /* FALLTHROUGH */ 781188417Sthompsa case USB_ST_SETUP: 782188417Sthompsatr_setup: 783188417Sthompsa data = STAILQ_FIRST(&sc->tx_q); 784188417Sthompsa if (data) { 785188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_q, next); 786188417Sthompsa m = data->m; 787184610Salfred 788233774Shselasky if (m->m_pkthdr.len > (int)(RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) { 789188417Sthompsa DPRINTFN(0, "data overflow, %u bytes\n", 790188417Sthompsa m->m_pkthdr.len); 791188417Sthompsa m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE); 792188417Sthompsa } 793194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 794194677Sthompsa usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE); 795194677Sthompsa usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0, 796188417Sthompsa m->m_pkthdr.len); 797184610Salfred 798192468Ssam vap = data->ni->ni_vap; 799192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 800188417Sthompsa struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 801184610Salfred 802188417Sthompsa tap->wt_flags = 0; 803188417Sthompsa tap->wt_rate = data->rate; 804188417Sthompsa tap->wt_antenna = sc->tx_ant; 805184610Salfred 806192468Ssam ieee80211_radiotap_tx(vap, m); 807188417Sthompsa } 808184610Salfred 809188417Sthompsa /* xfer length needs to be a multiple of two! */ 810188417Sthompsa len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1; 811188417Sthompsa if ((len % 64) == 0) 812188417Sthompsa len += 2; 813184610Salfred 814188417Sthompsa DPRINTFN(11, "sending frame len=%u xferlen=%u\n", 815188417Sthompsa m->m_pkthdr.len, len); 816184610Salfred 817194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, len); 818194677Sthompsa usbd_xfer_set_priv(xfer, data); 819184610Salfred 820194228Sthompsa usbd_transfer_submit(xfer); 821188417Sthompsa } 822287197Sglebius ural_start(sc); 823188417Sthompsa break; 824184610Salfred 825188417Sthompsa default: /* Error */ 826188417Sthompsa DPRINTFN(11, "transfer error, %s\n", 827194677Sthompsa usbd_errstr(error)); 828184610Salfred 829194677Sthompsa data = usbd_xfer_get_priv(xfer); 830188419Sthompsa if (data != NULL) { 831194677Sthompsa ural_tx_free(data, error); 832194677Sthompsa usbd_xfer_set_priv(xfer, NULL); 833188419Sthompsa } 834188419Sthompsa 835194677Sthompsa if (error == USB_ERR_STALLED) { 836188417Sthompsa /* try to clear stall first */ 837194677Sthompsa usbd_xfer_set_stall(xfer); 838188417Sthompsa goto tr_setup; 839188417Sthompsa } 840194677Sthompsa if (error == USB_ERR_TIMEOUT) 841188417Sthompsa device_printf(sc->sc_dev, "device timeout\n"); 842188417Sthompsa break; 843184610Salfred } 844184610Salfred} 845184610Salfred 846184610Salfredstatic void 847194677Sthompsaural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 848184610Salfred{ 849194677Sthompsa struct ural_softc *sc = usbd_xfer_softc(xfer); 850287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 851184610Salfred struct ieee80211_node *ni; 852184610Salfred struct mbuf *m = NULL; 853194677Sthompsa struct usb_page_cache *pc; 854184610Salfred uint32_t flags; 855192468Ssam int8_t rssi = 0, nf = 0; 856194677Sthompsa int len; 857184610Salfred 858194677Sthompsa usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 859194677Sthompsa 860184610Salfred switch (USB_GET_STATE(xfer)) { 861184610Salfred case USB_ST_TRANSFERRED: 862184610Salfred 863194677Sthompsa DPRINTFN(15, "rx done, actlen=%d\n", len); 864184610Salfred 865233774Shselasky if (len < (int)(RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN)) { 866188417Sthompsa DPRINTF("%s: xfer too short %d\n", 867188417Sthompsa device_get_nameunit(sc->sc_dev), len); 868287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 869184610Salfred goto tr_setup; 870184610Salfred } 871184610Salfred 872188417Sthompsa len -= RAL_RX_DESC_SIZE; 873188417Sthompsa /* rx descriptor is located at the end */ 874194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 875194677Sthompsa usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE); 876184610Salfred 877188417Sthompsa rssi = URAL_RSSI(sc->sc_rx_desc.rssi); 878192468Ssam nf = RAL_NOISE_FLOOR; 879184610Salfred flags = le32toh(sc->sc_rx_desc.flags); 880184610Salfred if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) { 881184610Salfred /* 882184610Salfred * This should not happen since we did not 883184610Salfred * request to receive those frames when we 884184610Salfred * filled RAL_TXRX_CSR2: 885184610Salfred */ 886188417Sthompsa DPRINTFN(5, "PHY or CRC error\n"); 887287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 888184610Salfred goto tr_setup; 889184610Salfred } 890184610Salfred 891243857Sglebius m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 892184610Salfred if (m == NULL) { 893184610Salfred DPRINTF("could not allocate mbuf\n"); 894287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 895184610Salfred goto tr_setup; 896184610Salfred } 897194677Sthompsa usbd_copy_out(pc, 0, mtod(m, uint8_t *), len); 898184610Salfred 899184610Salfred /* finalize mbuf */ 900188417Sthompsa m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff; 901184610Salfred 902192468Ssam if (ieee80211_radiotap_active(ic)) { 903184610Salfred struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 904184610Salfred 905192468Ssam /* XXX set once */ 906192468Ssam tap->wr_flags = 0; 907184610Salfred tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate, 908188417Sthompsa (flags & RAL_RX_OFDM) ? 909184610Salfred IEEE80211_T_OFDM : IEEE80211_T_CCK); 910188417Sthompsa tap->wr_antenna = sc->rx_ant; 911192468Ssam tap->wr_antsignal = nf + rssi; 912192468Ssam tap->wr_antnoise = nf; 913184610Salfred } 914184610Salfred /* Strip trailing 802.11 MAC FCS. */ 915184610Salfred m_adj(m, -IEEE80211_CRC_LEN); 916184610Salfred 917188417Sthompsa /* FALLTHROUGH */ 918184610Salfred case USB_ST_SETUP: 919184610Salfredtr_setup: 920194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 921194228Sthompsa usbd_transfer_submit(xfer); 922184610Salfred 923184610Salfred /* 924184610Salfred * At the end of a USB callback it is always safe to unlock 925184610Salfred * the private mutex of a device! That is why we do the 926184610Salfred * "ieee80211_input" here, and not some lines up! 927184610Salfred */ 928198099Sweongyo RAL_UNLOCK(sc); 929184610Salfred if (m) { 930188417Sthompsa ni = ieee80211_find_rxnode(ic, 931188417Sthompsa mtod(m, struct ieee80211_frame_min *)); 932188417Sthompsa if (ni != NULL) { 933192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 934184610Salfred ieee80211_free_node(ni); 935188417Sthompsa } else 936192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 937184610Salfred } 938198099Sweongyo RAL_LOCK(sc); 939287197Sglebius ural_start(sc); 940184610Salfred return; 941184610Salfred 942184610Salfred default: /* Error */ 943194677Sthompsa if (error != USB_ERR_CANCELLED) { 944184610Salfred /* try to clear stall first */ 945194677Sthompsa usbd_xfer_set_stall(xfer); 946188417Sthompsa goto tr_setup; 947184610Salfred } 948184610Salfred return; 949184610Salfred } 950184610Salfred} 951184610Salfred 952184610Salfredstatic uint8_t 953188417Sthompsaural_plcp_signal(int rate) 954184610Salfred{ 955184610Salfred switch (rate) { 956188417Sthompsa /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 957188417Sthompsa case 12: return 0xb; 958188417Sthompsa case 18: return 0xf; 959188417Sthompsa case 24: return 0xa; 960188417Sthompsa case 36: return 0xe; 961188417Sthompsa case 48: return 0x9; 962188417Sthompsa case 72: return 0xd; 963188417Sthompsa case 96: return 0x8; 964188417Sthompsa case 108: return 0xc; 965184610Salfred 966188417Sthompsa /* CCK rates (NB: not IEEE std, device-specific) */ 967188417Sthompsa case 2: return 0x0; 968188417Sthompsa case 4: return 0x1; 969188417Sthompsa case 11: return 0x2; 970188417Sthompsa case 22: return 0x3; 971184610Salfred } 972188417Sthompsa return 0xff; /* XXX unsupported/unknown rate */ 973184610Salfred} 974184610Salfred 975184610Salfredstatic void 976188417Sthompsaural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 977188417Sthompsa uint32_t flags, int len, int rate) 978184610Salfred{ 979287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 980184610Salfred uint16_t plcp_length; 981188417Sthompsa int remainder; 982184610Salfred 983188417Sthompsa desc->flags = htole32(flags); 984188417Sthompsa desc->flags |= htole32(RAL_TX_NEWSEQ); 985188417Sthompsa desc->flags |= htole32(len << 16); 986184610Salfred 987188417Sthompsa desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 988188417Sthompsa desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 989184610Salfred 990188417Sthompsa /* setup PLCP fields */ 991188417Sthompsa desc->plcp_signal = ural_plcp_signal(rate); 992188417Sthompsa desc->plcp_service = 4; 993188417Sthompsa 994188417Sthompsa len += IEEE80211_CRC_LEN; 995190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 996188417Sthompsa desc->flags |= htole32(RAL_TX_OFDM); 997188417Sthompsa 998188417Sthompsa plcp_length = len & 0xfff; 999188417Sthompsa desc->plcp_length_hi = plcp_length >> 6; 1000188417Sthompsa desc->plcp_length_lo = plcp_length & 0x3f; 1001188417Sthompsa } else { 1002269127Shselasky if (rate == 0) 1003269127Shselasky rate = 2; /* avoid division by zero */ 1004298646Spfg plcp_length = howmany(16 * len, rate); 1005188417Sthompsa if (rate == 22) { 1006188417Sthompsa remainder = (16 * len) % 22; 1007188417Sthompsa if (remainder != 0 && remainder < 7) 1008188417Sthompsa desc->plcp_service |= RAL_PLCP_LENGEXT; 1009188417Sthompsa } 1010188417Sthompsa desc->plcp_length_hi = plcp_length >> 8; 1011188417Sthompsa desc->plcp_length_lo = plcp_length & 0xff; 1012188417Sthompsa 1013188417Sthompsa if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1014188417Sthompsa desc->plcp_signal |= 0x08; 1015184610Salfred } 1016184610Salfred 1017188417Sthompsa desc->iv = 0; 1018188417Sthompsa desc->eiv = 0; 1019188417Sthompsa} 1020184610Salfred 1021188417Sthompsa#define RAL_TX_TIMEOUT 5000 1022184610Salfred 1023188417Sthompsastatic int 1024188417Sthompsaural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1025188417Sthompsa{ 1026188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1027188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1028188417Sthompsa const struct ieee80211_txparam *tp; 1029188417Sthompsa struct ural_tx_data *data; 1030188417Sthompsa 1031188417Sthompsa if (sc->tx_nfree == 0) { 1032188417Sthompsa m_freem(m0); 1033188417Sthompsa ieee80211_free_node(ni); 1034236439Shselasky return (EIO); 1035184610Salfred } 1036236439Shselasky if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) { 1037236439Shselasky m_freem(m0); 1038236439Shselasky ieee80211_free_node(ni); 1039236439Shselasky return (ENXIO); 1040236439Shselasky } 1041188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1042188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1043188417Sthompsa sc->tx_nfree--; 1044188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)]; 1045184610Salfred 1046188417Sthompsa data->m = m0; 1047188417Sthompsa data->ni = ni; 1048188417Sthompsa data->rate = tp->mgmtrate; 1049184610Salfred 1050188417Sthompsa ural_setup_tx_desc(sc, &data->desc, 1051188417Sthompsa RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len, 1052188417Sthompsa tp->mgmtrate); 1053184610Salfred 1054188417Sthompsa DPRINTFN(10, "sending beacon frame len=%u rate=%u\n", 1055188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1056184610Salfred 1057188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1058194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1059184610Salfred 1060188417Sthompsa return (0); 1061188417Sthompsa} 1062184610Salfred 1063188417Sthompsastatic int 1064188417Sthompsaural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1065188417Sthompsa{ 1066188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1067188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1068188417Sthompsa const struct ieee80211_txparam *tp; 1069188417Sthompsa struct ural_tx_data *data; 1070188417Sthompsa struct ieee80211_frame *wh; 1071188417Sthompsa struct ieee80211_key *k; 1072188417Sthompsa uint32_t flags; 1073188417Sthompsa uint16_t dur; 1074184610Salfred 1075188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1076184610Salfred 1077188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1078188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1079188417Sthompsa sc->tx_nfree--; 1080184610Salfred 1081188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1082188417Sthompsa 1083188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1084260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1085188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1086188417Sthompsa if (k == NULL) { 1087188417Sthompsa m_freem(m0); 1088188417Sthompsa return ENOBUFS; 1089184610Salfred } 1090188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1091184610Salfred } 1092184610Salfred 1093188417Sthompsa data->m = m0; 1094188417Sthompsa data->ni = ni; 1095188417Sthompsa data->rate = tp->mgmtrate; 1096184610Salfred 1097188417Sthompsa flags = 0; 1098188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1099188417Sthompsa flags |= RAL_TX_ACK; 1100188417Sthompsa 1101190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate, 1102188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1103258919Shselasky USETW(wh->i_dur, dur); 1104188417Sthompsa 1105188417Sthompsa /* tell hardware to add timestamp for probe responses */ 1106188417Sthompsa if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1107188417Sthompsa IEEE80211_FC0_TYPE_MGT && 1108188417Sthompsa (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1109188417Sthompsa IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1110188417Sthompsa flags |= RAL_TX_TIMESTAMP; 1111184610Salfred } 1112184610Salfred 1113188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate); 1114184610Salfred 1115188417Sthompsa DPRINTFN(10, "sending mgt frame len=%u rate=%u\n", 1116188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1117184610Salfred 1118188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1119194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1120184610Salfred 1121188417Sthompsa return 0; 1122184610Salfred} 1123184610Salfred 1124188417Sthompsastatic int 1125188417Sthompsaural_sendprot(struct ural_softc *sc, 1126188417Sthompsa const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1127184610Salfred{ 1128188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1129188417Sthompsa const struct ieee80211_frame *wh; 1130188417Sthompsa struct ural_tx_data *data; 1131188417Sthompsa struct mbuf *mprot; 1132188417Sthompsa int protrate, ackrate, pktlen, flags, isshort; 1133188417Sthompsa uint16_t dur; 1134184610Salfred 1135188417Sthompsa KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1136188417Sthompsa ("protection %d", prot)); 1137184610Salfred 1138188417Sthompsa wh = mtod(m, const struct ieee80211_frame *); 1139188417Sthompsa pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1140184610Salfred 1141190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1142190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1143188417Sthompsa 1144188417Sthompsa isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1145209189Sjkim dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1146190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1147188417Sthompsa flags = RAL_TX_RETRY(7); 1148188417Sthompsa if (prot == IEEE80211_PROT_RTSCTS) { 1149188417Sthompsa /* NB: CTS is the same size as an ACK */ 1150190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1151188417Sthompsa flags |= RAL_TX_ACK; 1152188417Sthompsa mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1153188417Sthompsa } else { 1154188417Sthompsa mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1155188417Sthompsa } 1156188417Sthompsa if (mprot == NULL) { 1157188417Sthompsa /* XXX stat + msg */ 1158188417Sthompsa return ENOBUFS; 1159188417Sthompsa } 1160188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1161188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1162188417Sthompsa sc->tx_nfree--; 1163188417Sthompsa 1164188417Sthompsa data->m = mprot; 1165188417Sthompsa data->ni = ieee80211_ref_node(ni); 1166188417Sthompsa data->rate = protrate; 1167188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate); 1168188417Sthompsa 1169188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1170194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1171188417Sthompsa 1172188417Sthompsa return 0; 1173188417Sthompsa} 1174188417Sthompsa 1175188417Sthompsastatic int 1176188417Sthompsaural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni, 1177188417Sthompsa const struct ieee80211_bpf_params *params) 1178188417Sthompsa{ 1179193073Ssam struct ieee80211com *ic = ni->ni_ic; 1180188417Sthompsa struct ural_tx_data *data; 1181188417Sthompsa uint32_t flags; 1182188417Sthompsa int error; 1183188417Sthompsa int rate; 1184188417Sthompsa 1185188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1186188417Sthompsa KASSERT(params != NULL, ("no raw xmit params")); 1187188417Sthompsa 1188193073Ssam rate = params->ibp_rate0; 1189193073Ssam if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 1190188417Sthompsa m_freem(m0); 1191188417Sthompsa return EINVAL; 1192188417Sthompsa } 1193188417Sthompsa flags = 0; 1194188417Sthompsa if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1195188417Sthompsa flags |= RAL_TX_ACK; 1196188417Sthompsa if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1197188417Sthompsa error = ural_sendprot(sc, m0, ni, 1198188417Sthompsa params->ibp_flags & IEEE80211_BPF_RTS ? 1199188417Sthompsa IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1200188417Sthompsa rate); 1201188969Sthompsa if (error || sc->tx_nfree == 0) { 1202188417Sthompsa m_freem(m0); 1203188969Sthompsa return ENOBUFS; 1204184610Salfred } 1205188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1206188417Sthompsa } 1207184610Salfred 1208188969Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1209188969Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1210188969Sthompsa sc->tx_nfree--; 1211188969Sthompsa 1212188417Sthompsa data->m = m0; 1213188417Sthompsa data->ni = ni; 1214188417Sthompsa data->rate = rate; 1215184610Salfred 1216188417Sthompsa /* XXX need to setup descriptor ourself */ 1217188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1218184610Salfred 1219188417Sthompsa DPRINTFN(10, "sending raw frame len=%u rate=%u\n", 1220188417Sthompsa m0->m_pkthdr.len, rate); 1221184610Salfred 1222188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1223194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1224184610Salfred 1225188417Sthompsa return 0; 1226188417Sthompsa} 1227184610Salfred 1228188417Sthompsastatic int 1229188417Sthompsaural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1230188417Sthompsa{ 1231188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1232188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1233188417Sthompsa struct ural_tx_data *data; 1234188417Sthompsa struct ieee80211_frame *wh; 1235188417Sthompsa const struct ieee80211_txparam *tp; 1236188417Sthompsa struct ieee80211_key *k; 1237188417Sthompsa uint32_t flags = 0; 1238188417Sthompsa uint16_t dur; 1239188417Sthompsa int error, rate; 1240184610Salfred 1241188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1242184610Salfred 1243188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1244184610Salfred 1245188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1246188417Sthompsa if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1247188417Sthompsa rate = tp->mcastrate; 1248188417Sthompsa else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1249188417Sthompsa rate = tp->ucastrate; 1250188417Sthompsa else 1251188417Sthompsa rate = ni->ni_txrate; 1252188417Sthompsa 1253260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1254188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1255188417Sthompsa if (k == NULL) { 1256188417Sthompsa m_freem(m0); 1257188417Sthompsa return ENOBUFS; 1258184610Salfred } 1259188417Sthompsa /* packet header may have moved, reset our local pointer */ 1260188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1261188417Sthompsa } 1262184610Salfred 1263188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1264188417Sthompsa int prot = IEEE80211_PROT_NONE; 1265188417Sthompsa if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1266188417Sthompsa prot = IEEE80211_PROT_RTSCTS; 1267188417Sthompsa else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1268190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1269188417Sthompsa prot = ic->ic_protmode; 1270188417Sthompsa if (prot != IEEE80211_PROT_NONE) { 1271188417Sthompsa error = ural_sendprot(sc, m0, ni, prot, rate); 1272188969Sthompsa if (error || sc->tx_nfree == 0) { 1273188417Sthompsa m_freem(m0); 1274188969Sthompsa return ENOBUFS; 1275188417Sthompsa } 1276188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1277184610Salfred } 1278184610Salfred } 1279184610Salfred 1280188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1281188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1282188417Sthompsa sc->tx_nfree--; 1283184610Salfred 1284188417Sthompsa data->m = m0; 1285188417Sthompsa data->ni = ni; 1286188417Sthompsa data->rate = rate; 1287188417Sthompsa 1288188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1289188417Sthompsa flags |= RAL_TX_ACK; 1290188417Sthompsa flags |= RAL_TX_RETRY(7); 1291188417Sthompsa 1292190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, rate, 1293188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1294258919Shselasky USETW(wh->i_dur, dur); 1295184610Salfred } 1296184610Salfred 1297188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1298184610Salfred 1299188417Sthompsa DPRINTFN(10, "sending data frame len=%u rate=%u\n", 1300188417Sthompsa m0->m_pkthdr.len, rate); 1301184610Salfred 1302188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1303194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1304188417Sthompsa 1305188417Sthompsa return 0; 1306184610Salfred} 1307184610Salfred 1308287197Sglebiusstatic int 1309287197Sglebiusural_transmit(struct ieee80211com *ic, struct mbuf *m) 1310287197Sglebius{ 1311287197Sglebius struct ural_softc *sc = ic->ic_softc; 1312287197Sglebius int error; 1313287197Sglebius 1314287197Sglebius RAL_LOCK(sc); 1315287197Sglebius if (!sc->sc_running) { 1316287197Sglebius RAL_UNLOCK(sc); 1317287197Sglebius return (ENXIO); 1318287197Sglebius } 1319287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 1320287197Sglebius if (error) { 1321287197Sglebius RAL_UNLOCK(sc); 1322287197Sglebius return (error); 1323287197Sglebius } 1324287197Sglebius ural_start(sc); 1325287197Sglebius RAL_UNLOCK(sc); 1326287197Sglebius 1327287197Sglebius return (0); 1328287197Sglebius} 1329287197Sglebius 1330184610Salfredstatic void 1331287197Sglebiusural_start(struct ural_softc *sc) 1332184610Salfred{ 1333188417Sthompsa struct ieee80211_node *ni; 1334188417Sthompsa struct mbuf *m; 1335184610Salfred 1336287197Sglebius RAL_LOCK_ASSERT(sc, MA_OWNED); 1337287197Sglebius 1338287197Sglebius if (sc->sc_running == 0) 1339188417Sthompsa return; 1340287197Sglebius 1341287197Sglebius while (sc->tx_nfree >= RAL_TX_MINFREE && 1342287197Sglebius (m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1343188417Sthompsa ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1344188417Sthompsa if (ural_tx_data(sc, m, ni) != 0) { 1345287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 1346287197Sglebius IFCOUNTER_OERRORS, 1); 1347188417Sthompsa ieee80211_free_node(ni); 1348188417Sthompsa break; 1349188417Sthompsa } 1350188417Sthompsa } 1351184610Salfred} 1352184610Salfred 1353287197Sglebiusstatic void 1354287197Sglebiusural_parent(struct ieee80211com *ic) 1355184610Salfred{ 1356287197Sglebius struct ural_softc *sc = ic->ic_softc; 1357246614Shselasky int startall = 0; 1358184610Salfred 1359246614Shselasky RAL_LOCK(sc); 1360287197Sglebius if (sc->sc_detached) { 1361188417Sthompsa RAL_UNLOCK(sc); 1362287197Sglebius return; 1363184610Salfred } 1364287197Sglebius if (ic->ic_nrunning > 0) { 1365287197Sglebius if (sc->sc_running == 0) { 1366287197Sglebius ural_init(sc); 1367287197Sglebius startall = 1; 1368287197Sglebius } else 1369287197Sglebius ural_setpromisc(sc); 1370287197Sglebius } else if (sc->sc_running) 1371287197Sglebius ural_stop(sc); 1372287197Sglebius RAL_UNLOCK(sc); 1373287197Sglebius if (startall) 1374287197Sglebius ieee80211_start_all(ic); 1375184610Salfred} 1376184610Salfred 1377184610Salfredstatic void 1378188417Sthompsaural_set_testmode(struct ural_softc *sc) 1379184610Salfred{ 1380192984Sthompsa struct usb_device_request req; 1381193045Sthompsa usb_error_t error; 1382184610Salfred 1383188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1384188417Sthompsa req.bRequest = RAL_VENDOR_REQUEST; 1385188417Sthompsa USETW(req.wValue, 4); 1386188417Sthompsa USETW(req.wIndex, 1); 1387188417Sthompsa USETW(req.wLength, 0); 1388188417Sthompsa 1389188419Sthompsa error = ural_do_request(sc, &req, NULL); 1390188417Sthompsa if (error != 0) { 1391188417Sthompsa device_printf(sc->sc_dev, "could not set test mode: %s\n", 1392194228Sthompsa usbd_errstr(error)); 1393188417Sthompsa } 1394184610Salfred} 1395184610Salfred 1396184610Salfredstatic void 1397188417Sthompsaural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1398184610Salfred{ 1399192984Sthompsa struct usb_device_request req; 1400193045Sthompsa usb_error_t error; 1401184610Salfred 1402188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1403188417Sthompsa req.bRequest = RAL_READ_EEPROM; 1404188417Sthompsa USETW(req.wValue, 0); 1405188417Sthompsa USETW(req.wIndex, addr); 1406188417Sthompsa USETW(req.wLength, len); 1407184610Salfred 1408188419Sthompsa error = ural_do_request(sc, &req, buf); 1409188417Sthompsa if (error != 0) { 1410188417Sthompsa device_printf(sc->sc_dev, "could not read EEPROM: %s\n", 1411194228Sthompsa usbd_errstr(error)); 1412184610Salfred } 1413188417Sthompsa} 1414184610Salfred 1415188417Sthompsastatic uint16_t 1416188417Sthompsaural_read(struct ural_softc *sc, uint16_t reg) 1417188417Sthompsa{ 1418192984Sthompsa struct usb_device_request req; 1419193045Sthompsa usb_error_t error; 1420188417Sthompsa uint16_t val; 1421184610Salfred 1422188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1423188417Sthompsa req.bRequest = RAL_READ_MAC; 1424188417Sthompsa USETW(req.wValue, 0); 1425188417Sthompsa USETW(req.wIndex, reg); 1426188417Sthompsa USETW(req.wLength, sizeof (uint16_t)); 1427188417Sthompsa 1428188419Sthompsa error = ural_do_request(sc, &req, &val); 1429188417Sthompsa if (error != 0) { 1430188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1431194228Sthompsa usbd_errstr(error)); 1432188417Sthompsa return 0; 1433184610Salfred } 1434184610Salfred 1435188417Sthompsa return le16toh(val); 1436184610Salfred} 1437184610Salfred 1438188417Sthompsastatic void 1439188417Sthompsaural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1440184610Salfred{ 1441192984Sthompsa struct usb_device_request req; 1442193045Sthompsa usb_error_t error; 1443184610Salfred 1444188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1445188417Sthompsa req.bRequest = RAL_READ_MULTI_MAC; 1446188417Sthompsa USETW(req.wValue, 0); 1447188417Sthompsa USETW(req.wIndex, reg); 1448188417Sthompsa USETW(req.wLength, len); 1449184610Salfred 1450188419Sthompsa error = ural_do_request(sc, &req, buf); 1451188417Sthompsa if (error != 0) { 1452188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1453194228Sthompsa usbd_errstr(error)); 1454184610Salfred } 1455188417Sthompsa} 1456188417Sthompsa 1457188417Sthompsastatic void 1458188417Sthompsaural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1459188417Sthompsa{ 1460192984Sthompsa struct usb_device_request req; 1461193045Sthompsa usb_error_t error; 1462188417Sthompsa 1463188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1464188417Sthompsa req.bRequest = RAL_WRITE_MAC; 1465188417Sthompsa USETW(req.wValue, val); 1466188417Sthompsa USETW(req.wIndex, reg); 1467188417Sthompsa USETW(req.wLength, 0); 1468188417Sthompsa 1469188419Sthompsa error = ural_do_request(sc, &req, NULL); 1470188417Sthompsa if (error != 0) { 1471188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1472194228Sthompsa usbd_errstr(error)); 1473184610Salfred } 1474188417Sthompsa} 1475184610Salfred 1476188417Sthompsastatic void 1477188417Sthompsaural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1478188417Sthompsa{ 1479192984Sthompsa struct usb_device_request req; 1480193045Sthompsa usb_error_t error; 1481184610Salfred 1482188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1483188417Sthompsa req.bRequest = RAL_WRITE_MULTI_MAC; 1484188417Sthompsa USETW(req.wValue, 0); 1485188417Sthompsa USETW(req.wIndex, reg); 1486188417Sthompsa USETW(req.wLength, len); 1487184610Salfred 1488188419Sthompsa error = ural_do_request(sc, &req, buf); 1489188417Sthompsa if (error != 0) { 1490188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1491194228Sthompsa usbd_errstr(error)); 1492188417Sthompsa } 1493184610Salfred} 1494184610Salfred 1495184610Salfredstatic void 1496188417Sthompsaural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1497184610Salfred{ 1498188417Sthompsa uint16_t tmp; 1499188417Sthompsa int ntries; 1500184610Salfred 1501188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1502188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1503188417Sthompsa break; 1504188619Sthompsa if (ural_pause(sc, hz / 100)) 1505188619Sthompsa break; 1506188417Sthompsa } 1507188619Sthompsa if (ntries == 100) { 1508188417Sthompsa device_printf(sc->sc_dev, "could not write to BBP\n"); 1509188417Sthompsa return; 1510188417Sthompsa } 1511184610Salfred 1512188417Sthompsa tmp = reg << 8 | val; 1513188417Sthompsa ural_write(sc, RAL_PHY_CSR7, tmp); 1514188417Sthompsa} 1515184610Salfred 1516188417Sthompsastatic uint8_t 1517188417Sthompsaural_bbp_read(struct ural_softc *sc, uint8_t reg) 1518188417Sthompsa{ 1519188417Sthompsa uint16_t val; 1520188417Sthompsa int ntries; 1521184610Salfred 1522188417Sthompsa val = RAL_BBP_WRITE | reg << 8; 1523188417Sthompsa ural_write(sc, RAL_PHY_CSR7, val); 1524188417Sthompsa 1525188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1526188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1527188417Sthompsa break; 1528188619Sthompsa if (ural_pause(sc, hz / 100)) 1529188619Sthompsa break; 1530188417Sthompsa } 1531188619Sthompsa if (ntries == 100) { 1532188417Sthompsa device_printf(sc->sc_dev, "could not read BBP\n"); 1533188417Sthompsa return 0; 1534188417Sthompsa } 1535188417Sthompsa 1536188417Sthompsa return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1537184610Salfred} 1538184610Salfred 1539184610Salfredstatic void 1540188417Sthompsaural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1541184610Salfred{ 1542188417Sthompsa uint32_t tmp; 1543188417Sthompsa int ntries; 1544188417Sthompsa 1545188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1546188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1547188417Sthompsa break; 1548188619Sthompsa if (ural_pause(sc, hz / 100)) 1549188619Sthompsa break; 1550188417Sthompsa } 1551188619Sthompsa if (ntries == 100) { 1552188417Sthompsa device_printf(sc->sc_dev, "could not write to RF\n"); 1553188417Sthompsa return; 1554188417Sthompsa } 1555188417Sthompsa 1556188417Sthompsa tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1557188417Sthompsa ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1558188417Sthompsa ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1559188417Sthompsa 1560188417Sthompsa /* remember last written value in sc */ 1561188417Sthompsa sc->rf_regs[reg] = val; 1562188417Sthompsa 1563188417Sthompsa DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 1564184610Salfred} 1565184610Salfred 1566184610Salfredstatic void 1567188417Sthompsaural_scan_start(struct ieee80211com *ic) 1568184610Salfred{ 1569286950Sadrian struct ural_softc *sc = ic->ic_softc; 1570188417Sthompsa 1571188417Sthompsa RAL_LOCK(sc); 1572191746Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1573287197Sglebius ural_set_bssid(sc, ieee80211broadcastaddr); 1574188417Sthompsa RAL_UNLOCK(sc); 1575184610Salfred} 1576184610Salfred 1577184610Salfredstatic void 1578188417Sthompsaural_scan_end(struct ieee80211com *ic) 1579184610Salfred{ 1580286950Sadrian struct ural_softc *sc = ic->ic_softc; 1581188417Sthompsa 1582188417Sthompsa RAL_LOCK(sc); 1583191746Sthompsa ural_enable_tsf_sync(sc); 1584296356Savos ural_set_bssid(sc, sc->sc_bssid); 1585188417Sthompsa RAL_UNLOCK(sc); 1586188417Sthompsa 1587184610Salfred} 1588184610Salfred 1589184610Salfredstatic void 1590300749Savosural_getradiocaps(struct ieee80211com *ic, 1591300749Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 1592300749Savos{ 1593300749Savos struct ural_softc *sc = ic->ic_softc; 1594300749Savos uint8_t bands[IEEE80211_MODE_BYTES]; 1595300749Savos 1596300749Savos memset(bands, 0, sizeof(bands)); 1597300749Savos setbit(bands, IEEE80211_MODE_11B); 1598300749Savos setbit(bands, IEEE80211_MODE_11G); 1599343976Savos ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 1600300749Savos 1601300749Savos if (sc->rf_rev == RAL_RF_5222) { 1602300749Savos setbit(bands, IEEE80211_MODE_11A); 1603300749Savos ieee80211_add_channel_list_5ghz(chans, maxchans, nchans, 1604300749Savos ural_chan_5ghz, nitems(ural_chan_5ghz), bands, 0); 1605300749Savos } 1606300749Savos} 1607300749Savos 1608300749Savosstatic void 1609188417Sthompsaural_set_channel(struct ieee80211com *ic) 1610184610Salfred{ 1611286950Sadrian struct ural_softc *sc = ic->ic_softc; 1612188417Sthompsa 1613188417Sthompsa RAL_LOCK(sc); 1614191746Sthompsa ural_set_chan(sc, ic->ic_curchan); 1615188417Sthompsa RAL_UNLOCK(sc); 1616184610Salfred} 1617184610Salfred 1618184610Salfredstatic void 1619188417Sthompsaural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1620184610Salfred{ 1621287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1622188417Sthompsa uint8_t power, tmp; 1623188619Sthompsa int i, chan; 1624184610Salfred 1625188417Sthompsa chan = ieee80211_chan2ieee(ic, c); 1626188417Sthompsa if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1627188417Sthompsa return; 1628184610Salfred 1629188417Sthompsa if (IEEE80211_IS_CHAN_2GHZ(c)) 1630188417Sthompsa power = min(sc->txpow[chan - 1], 31); 1631184610Salfred else 1632184610Salfred power = 31; 1633184610Salfred 1634184610Salfred /* adjust txpower using ifconfig settings */ 1635188417Sthompsa power -= (100 - ic->ic_txpowlimit) / 8; 1636184610Salfred 1637188417Sthompsa DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power); 1638184610Salfred 1639188417Sthompsa switch (sc->rf_rev) { 1640184610Salfred case RAL_RF_2522: 1641188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x00814); 1642188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1643188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1644184610Salfred break; 1645184610Salfred 1646184610Salfred case RAL_RF_2523: 1647188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1648188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1649188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1650188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1651184610Salfred break; 1652184610Salfred 1653184610Salfred case RAL_RF_2524: 1654188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x0c808); 1655188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1656188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1657188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1658184610Salfred break; 1659184610Salfred 1660184610Salfred case RAL_RF_2525: 1661188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1662188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1663188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1664188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1665184610Salfred 1666188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1667188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1668188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1669188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1670184610Salfred break; 1671184610Salfred 1672184610Salfred case RAL_RF_2525E: 1673188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1674188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1675188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1676188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1677184610Salfred break; 1678184610Salfred 1679184610Salfred case RAL_RF_2526: 1680188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1681188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1682188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1683184610Salfred 1684188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1685188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1686188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1687184610Salfred break; 1688184610Salfred 1689188417Sthompsa /* dual-band RF */ 1690184610Salfred case RAL_RF_5222: 1691188417Sthompsa for (i = 0; ural_rf5222[i].chan != chan; i++); 1692188417Sthompsa 1693188417Sthompsa ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1694188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1695188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1696188417Sthompsa ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1697184610Salfred break; 1698184610Salfred } 1699184610Salfred 1700188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR && 1701188417Sthompsa (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 1702184610Salfred /* set Japan filter bit for channel 14 */ 1703188417Sthompsa tmp = ural_bbp_read(sc, 70); 1704184610Salfred 1705188417Sthompsa tmp &= ~RAL_JAPAN_FILTER; 1706188417Sthompsa if (chan == 14) 1707184610Salfred tmp |= RAL_JAPAN_FILTER; 1708184610Salfred 1709188417Sthompsa ural_bbp_write(sc, 70, tmp); 1710184610Salfred 1711184610Salfred /* clear CRC errors */ 1712188417Sthompsa ural_read(sc, RAL_STA_CSR0); 1713184610Salfred 1714188619Sthompsa ural_pause(sc, hz / 100); 1715188417Sthompsa ural_disable_rf_tune(sc); 1716184610Salfred } 1717188417Sthompsa 1718188417Sthompsa /* XXX doesn't belong here */ 1719184610Salfred /* update basic rate set */ 1720188417Sthompsa ural_set_basicrates(sc, c); 1721189123Sthompsa 1722189123Sthompsa /* give the hardware some time to do the switchover */ 1723189123Sthompsa ural_pause(sc, hz / 100); 1724184610Salfred} 1725184610Salfred 1726188417Sthompsa/* 1727188417Sthompsa * Disable RF auto-tuning. 1728188417Sthompsa */ 1729184610Salfredstatic void 1730188417Sthompsaural_disable_rf_tune(struct ural_softc *sc) 1731184610Salfred{ 1732188417Sthompsa uint32_t tmp; 1733184610Salfred 1734188417Sthompsa if (sc->rf_rev != RAL_RF_2523) { 1735188417Sthompsa tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1736188417Sthompsa ural_rf_write(sc, RAL_RF1, tmp); 1737184610Salfred } 1738184610Salfred 1739188417Sthompsa tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1740188417Sthompsa ural_rf_write(sc, RAL_RF3, tmp); 1741184610Salfred 1742188417Sthompsa DPRINTFN(2, "disabling RF autotune\n"); 1743184610Salfred} 1744184610Salfred 1745188417Sthompsa/* 1746188417Sthompsa * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1747188417Sthompsa * synchronization. 1748188417Sthompsa */ 1749184610Salfredstatic void 1750188417Sthompsaural_enable_tsf_sync(struct ural_softc *sc) 1751184610Salfred{ 1752287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1753188417Sthompsa struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1754188417Sthompsa uint16_t logcwmin, preload, tmp; 1755184610Salfred 1756184610Salfred /* first, disable TSF synchronization */ 1757188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1758184610Salfred 1759188417Sthompsa tmp = (16 * vap->iv_bss->ni_intval) << 4; 1760188417Sthompsa ural_write(sc, RAL_TXRX_CSR18, tmp); 1761184610Salfred 1762188417Sthompsa logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1763188417Sthompsa preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1764188417Sthompsa tmp = logcwmin << 12 | preload; 1765188417Sthompsa ural_write(sc, RAL_TXRX_CSR20, tmp); 1766184610Salfred 1767184610Salfred /* finally, enable TSF synchronization */ 1768184610Salfred tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1769188417Sthompsa if (ic->ic_opmode == IEEE80211_M_STA) 1770184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(1); 1771184610Salfred else 1772184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1773188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, tmp); 1774184610Salfred 1775184610Salfred DPRINTF("enabling TSF synchronization\n"); 1776184610Salfred} 1777184610Salfred 1778192468Ssamstatic void 1779192468Ssamural_enable_tsf(struct ural_softc *sc) 1780192468Ssam{ 1781192468Ssam /* first, disable TSF synchronization */ 1782192468Ssam ural_write(sc, RAL_TXRX_CSR19, 0); 1783192468Ssam ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2)); 1784192468Ssam} 1785192468Ssam 1786188417Sthompsa#define RAL_RXTX_TURNAROUND 5 /* us */ 1787184610Salfredstatic void 1788287197Sglebiusural_update_slot(struct ural_softc *sc) 1789184610Salfred{ 1790287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1791188417Sthompsa uint16_t slottime, sifs, eifs; 1792184610Salfred 1793292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 1794184610Salfred 1795184610Salfred /* 1796184610Salfred * These settings may sound a bit inconsistent but this is what the 1797184610Salfred * reference driver does. 1798184610Salfred */ 1799188417Sthompsa if (ic->ic_curmode == IEEE80211_MODE_11B) { 1800184610Salfred sifs = 16 - RAL_RXTX_TURNAROUND; 1801184610Salfred eifs = 364; 1802184610Salfred } else { 1803184610Salfred sifs = 10 - RAL_RXTX_TURNAROUND; 1804184610Salfred eifs = 64; 1805184610Salfred } 1806184610Salfred 1807188417Sthompsa ural_write(sc, RAL_MAC_CSR10, slottime); 1808188417Sthompsa ural_write(sc, RAL_MAC_CSR11, sifs); 1809188417Sthompsa ural_write(sc, RAL_MAC_CSR12, eifs); 1810184610Salfred} 1811184610Salfred 1812184610Salfredstatic void 1813188417Sthompsaural_set_txpreamble(struct ural_softc *sc) 1814184610Salfred{ 1815287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1816184610Salfred uint16_t tmp; 1817184610Salfred 1818188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR10); 1819184610Salfred 1820188417Sthompsa tmp &= ~RAL_SHORT_PREAMBLE; 1821188417Sthompsa if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1822184610Salfred tmp |= RAL_SHORT_PREAMBLE; 1823184610Salfred 1824188417Sthompsa ural_write(sc, RAL_TXRX_CSR10, tmp); 1825184610Salfred} 1826184610Salfred 1827184610Salfredstatic void 1828188417Sthompsaural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c) 1829184610Salfred{ 1830188417Sthompsa /* XXX wrong, take from rate set */ 1831188417Sthompsa /* update basic rate set */ 1832188417Sthompsa if (IEEE80211_IS_CHAN_5GHZ(c)) { 1833188417Sthompsa /* 11a basic rates: 6, 12, 24Mbps */ 1834188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x150); 1835188417Sthompsa } else if (IEEE80211_IS_CHAN_ANYG(c)) { 1836188417Sthompsa /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1837188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1838188417Sthompsa } else { 1839188417Sthompsa /* 11b basic rates: 1, 2Mbps */ 1840188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x3); 1841188417Sthompsa } 1842184610Salfred} 1843184610Salfred 1844184610Salfredstatic void 1845188417Sthompsaural_set_bssid(struct ural_softc *sc, const uint8_t *bssid) 1846184610Salfred{ 1847188417Sthompsa uint16_t tmp; 1848184610Salfred 1849188417Sthompsa tmp = bssid[0] | bssid[1] << 8; 1850188417Sthompsa ural_write(sc, RAL_MAC_CSR5, tmp); 1851188417Sthompsa 1852188417Sthompsa tmp = bssid[2] | bssid[3] << 8; 1853188417Sthompsa ural_write(sc, RAL_MAC_CSR6, tmp); 1854188417Sthompsa 1855188417Sthompsa tmp = bssid[4] | bssid[5] << 8; 1856188417Sthompsa ural_write(sc, RAL_MAC_CSR7, tmp); 1857188417Sthompsa 1858188417Sthompsa DPRINTF("setting BSSID to %6D\n", bssid, ":"); 1859184610Salfred} 1860184610Salfred 1861184610Salfredstatic void 1862287197Sglebiusural_set_macaddr(struct ural_softc *sc, const uint8_t *addr) 1863184610Salfred{ 1864184610Salfred uint16_t tmp; 1865184610Salfred 1866188417Sthompsa tmp = addr[0] | addr[1] << 8; 1867188417Sthompsa ural_write(sc, RAL_MAC_CSR2, tmp); 1868184610Salfred 1869188417Sthompsa tmp = addr[2] | addr[3] << 8; 1870188417Sthompsa ural_write(sc, RAL_MAC_CSR3, tmp); 1871184610Salfred 1872188417Sthompsa tmp = addr[4] | addr[5] << 8; 1873188417Sthompsa ural_write(sc, RAL_MAC_CSR4, tmp); 1874184610Salfred 1875188417Sthompsa DPRINTF("setting MAC address to %6D\n", addr, ":"); 1876184610Salfred} 1877184610Salfred 1878184610Salfredstatic void 1879191746Sthompsaural_setpromisc(struct ural_softc *sc) 1880184610Salfred{ 1881188417Sthompsa uint32_t tmp; 1882184610Salfred 1883188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR2); 1884184610Salfred 1885188417Sthompsa tmp &= ~RAL_DROP_NOT_TO_ME; 1886287197Sglebius if (sc->sc_ic.ic_promisc == 0) 1887188417Sthompsa tmp |= RAL_DROP_NOT_TO_ME; 1888184610Salfred 1889188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 1890184610Salfred 1891287197Sglebius DPRINTF("%s promiscuous mode\n", sc->sc_ic.ic_promisc ? 1892188417Sthompsa "entering" : "leaving"); 1893184610Salfred} 1894184610Salfred 1895189123Sthompsastatic void 1896283540Sglebiusural_update_promisc(struct ieee80211com *ic) 1897189123Sthompsa{ 1898283540Sglebius struct ural_softc *sc = ic->ic_softc; 1899189123Sthompsa 1900189123Sthompsa RAL_LOCK(sc); 1901287197Sglebius if (sc->sc_running) 1902287197Sglebius ural_setpromisc(sc); 1903189123Sthompsa RAL_UNLOCK(sc); 1904189123Sthompsa} 1905189123Sthompsa 1906188417Sthompsastatic const char * 1907188417Sthompsaural_get_rf(int rev) 1908184610Salfred{ 1909188417Sthompsa switch (rev) { 1910188417Sthompsa case RAL_RF_2522: return "RT2522"; 1911188417Sthompsa case RAL_RF_2523: return "RT2523"; 1912188417Sthompsa case RAL_RF_2524: return "RT2524"; 1913188417Sthompsa case RAL_RF_2525: return "RT2525"; 1914188417Sthompsa case RAL_RF_2525E: return "RT2525e"; 1915188417Sthompsa case RAL_RF_2526: return "RT2526"; 1916188417Sthompsa case RAL_RF_5222: return "RT5222"; 1917188417Sthompsa default: return "unknown"; 1918184610Salfred } 1919184610Salfred} 1920184610Salfred 1921184610Salfredstatic void 1922188417Sthompsaural_read_eeprom(struct ural_softc *sc) 1923184610Salfred{ 1924287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1925184610Salfred uint16_t val; 1926184610Salfred 1927188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1928184610Salfred val = le16toh(val); 1929188417Sthompsa sc->rf_rev = (val >> 11) & 0x7; 1930188417Sthompsa sc->hw_radio = (val >> 10) & 0x1; 1931188417Sthompsa sc->led_mode = (val >> 6) & 0x7; 1932188417Sthompsa sc->rx_ant = (val >> 4) & 0x3; 1933188417Sthompsa sc->tx_ant = (val >> 2) & 0x3; 1934188417Sthompsa sc->nb_ant = val & 0x3; 1935184610Salfred 1936184610Salfred /* read MAC address */ 1937287197Sglebius ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_macaddr, 6); 1938184610Salfred 1939184610Salfred /* read default values for BBP registers */ 1940188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1941184610Salfred 1942184610Salfred /* read Tx power for all b/g channels */ 1943188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1944184610Salfred} 1945184610Salfred 1946188417Sthompsastatic int 1947188417Sthompsaural_bbp_init(struct ural_softc *sc) 1948184610Salfred{ 1949188417Sthompsa int i, ntries; 1950184610Salfred 1951188417Sthompsa /* wait for BBP to be ready */ 1952188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1953188417Sthompsa if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1954188417Sthompsa break; 1955188619Sthompsa if (ural_pause(sc, hz / 100)) 1956188619Sthompsa break; 1957184610Salfred } 1958188417Sthompsa if (ntries == 100) { 1959188417Sthompsa device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 1960188417Sthompsa return EIO; 1961188417Sthompsa } 1962184610Salfred 1963184610Salfred /* initialize BBP registers to default values */ 1964288088Sadrian for (i = 0; i < nitems(ural_def_bbp); i++) 1965188417Sthompsa ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 1966184610Salfred 1967184610Salfred#if 0 1968184610Salfred /* initialize BBP registers to values stored in EEPROM */ 1969184610Salfred for (i = 0; i < 16; i++) { 1970188417Sthompsa if (sc->bbp_prom[i].reg == 0xff) 1971184610Salfred continue; 1972188417Sthompsa ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 1973184610Salfred } 1974184610Salfred#endif 1975188417Sthompsa 1976188417Sthompsa return 0; 1977184610Salfred} 1978184610Salfred 1979184610Salfredstatic void 1980188417Sthompsaural_set_txantenna(struct ural_softc *sc, int antenna) 1981184610Salfred{ 1982188417Sthompsa uint16_t tmp; 1983188417Sthompsa uint8_t tx; 1984184610Salfred 1985188417Sthompsa tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 1986188417Sthompsa if (antenna == 1) 1987188417Sthompsa tx |= RAL_BBP_ANTA; 1988188417Sthompsa else if (antenna == 2) 1989188417Sthompsa tx |= RAL_BBP_ANTB; 1990188417Sthompsa else 1991188417Sthompsa tx |= RAL_BBP_DIVERSITY; 1992184610Salfred 1993188417Sthompsa /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 1994188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 1995188417Sthompsa sc->rf_rev == RAL_RF_5222) 1996188417Sthompsa tx |= RAL_BBP_FLIPIQ; 1997184610Salfred 1998188417Sthompsa ural_bbp_write(sc, RAL_BBP_TX, tx); 1999184610Salfred 2000188417Sthompsa /* update values in PHY_CSR5 and PHY_CSR6 */ 2001188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2002188417Sthompsa ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2003184610Salfred 2004188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2005188417Sthompsa ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2006184610Salfred} 2007184610Salfred 2008184610Salfredstatic void 2009188417Sthompsaural_set_rxantenna(struct ural_softc *sc, int antenna) 2010184610Salfred{ 2011188417Sthompsa uint8_t rx; 2012188417Sthompsa 2013188417Sthompsa rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2014188417Sthompsa if (antenna == 1) 2015188417Sthompsa rx |= RAL_BBP_ANTA; 2016188417Sthompsa else if (antenna == 2) 2017188417Sthompsa rx |= RAL_BBP_ANTB; 2018188417Sthompsa else 2019188417Sthompsa rx |= RAL_BBP_DIVERSITY; 2020188417Sthompsa 2021188417Sthompsa /* need to force no I/Q flip for RF 2525e and 2526 */ 2022188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2023188417Sthompsa rx &= ~RAL_BBP_FLIPIQ; 2024188417Sthompsa 2025188417Sthompsa ural_bbp_write(sc, RAL_BBP_RX, rx); 2026188417Sthompsa} 2027188417Sthompsa 2028188417Sthompsastatic void 2029287197Sglebiusural_init(struct ural_softc *sc) 2030188417Sthompsa{ 2031287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2032287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2033184610Salfred uint16_t tmp; 2034188417Sthompsa int i, ntries; 2035184610Salfred 2036188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2037184610Salfred 2038188417Sthompsa ural_set_testmode(sc); 2039188417Sthompsa ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2040184610Salfred 2041191746Sthompsa ural_stop(sc); 2042184610Salfred 2043184610Salfred /* initialize MAC registers to default values */ 2044288088Sadrian for (i = 0; i < nitems(ural_def_mac); i++) 2045188417Sthompsa ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2046184610Salfred 2047184610Salfred /* wait for BBP and RF to wake up (this can take a long time!) */ 2048188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 2049188417Sthompsa tmp = ural_read(sc, RAL_MAC_CSR17); 2050188417Sthompsa if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2051188417Sthompsa (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2052188417Sthompsa break; 2053188619Sthompsa if (ural_pause(sc, hz / 100)) 2054188619Sthompsa break; 2055184610Salfred } 2056188417Sthompsa if (ntries == 100) { 2057188417Sthompsa device_printf(sc->sc_dev, 2058188417Sthompsa "timeout waiting for BBP/RF to wakeup\n"); 2059188417Sthompsa goto fail; 2060188417Sthompsa } 2061184610Salfred 2062184610Salfred /* we're ready! */ 2063188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2064184610Salfred 2065184610Salfred /* set basic rate set (will be updated later) */ 2066188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2067184610Salfred 2068188417Sthompsa if (ural_bbp_init(sc) != 0) 2069184610Salfred goto fail; 2070184610Salfred 2071188417Sthompsa ural_set_chan(sc, ic->ic_curchan); 2072188417Sthompsa 2073184610Salfred /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2074188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2075184610Salfred 2076188417Sthompsa ural_set_txantenna(sc, sc->tx_ant); 2077188417Sthompsa ural_set_rxantenna(sc, sc->rx_ant); 2078184610Salfred 2079287197Sglebius ural_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2080184610Salfred 2081184610Salfred /* 2082188417Sthompsa * Allocate Tx and Rx xfer queues. 2083184610Salfred */ 2084188419Sthompsa ural_setup_tx_list(sc); 2085184610Salfred 2086188417Sthompsa /* kick Rx */ 2087184610Salfred tmp = RAL_DROP_PHY | RAL_DROP_CRC; 2088188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2089188417Sthompsa tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION; 2090188417Sthompsa if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2091184610Salfred tmp |= RAL_DROP_TODS; 2092287197Sglebius if (ic->ic_promisc == 0) 2093184610Salfred tmp |= RAL_DROP_NOT_TO_ME; 2094184610Salfred } 2095188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 2096184610Salfred 2097287197Sglebius sc->sc_running = 1; 2098194677Sthompsa usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]); 2099194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]); 2100184610Salfred return; 2101184610Salfred 2102191746Sthompsafail: ural_stop(sc); 2103184610Salfred} 2104184610Salfred 2105184610Salfredstatic void 2106191746Sthompsaural_stop(struct ural_softc *sc) 2107184610Salfred{ 2108184610Salfred 2109188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2110184610Salfred 2111287197Sglebius sc->sc_running = 0; 2112184610Salfred 2113184610Salfred /* 2114188419Sthompsa * Drain all the transfers, if not already drained: 2115184610Salfred */ 2116188419Sthompsa RAL_UNLOCK(sc); 2117194228Sthompsa usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]); 2118194228Sthompsa usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]); 2119188419Sthompsa RAL_LOCK(sc); 2120184610Salfred 2121188419Sthompsa ural_unsetup_tx_list(sc); 2122184610Salfred 2123188417Sthompsa /* disable Rx */ 2124188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2125188417Sthompsa /* reset ASIC and BBP (but won't reset MAC registers!) */ 2126188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2127188619Sthompsa /* wait a little */ 2128188619Sthompsa ural_pause(sc, hz / 10); 2129188417Sthompsa ural_write(sc, RAL_MAC_CSR1, 0); 2130189123Sthompsa /* wait a little */ 2131189123Sthompsa ural_pause(sc, hz / 10); 2132184610Salfred} 2133184610Salfred 2134188417Sthompsastatic int 2135188417Sthompsaural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2136188417Sthompsa const struct ieee80211_bpf_params *params) 2137184610Salfred{ 2138188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 2139286950Sadrian struct ural_softc *sc = ic->ic_softc; 2140184610Salfred 2141188417Sthompsa RAL_LOCK(sc); 2142188417Sthompsa /* prevent management frames from being sent if we're not ready */ 2143287197Sglebius if (!sc->sc_running) { 2144188417Sthompsa RAL_UNLOCK(sc); 2145188417Sthompsa m_freem(m); 2146188417Sthompsa return ENETDOWN; 2147184610Salfred } 2148188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 2149188417Sthompsa RAL_UNLOCK(sc); 2150184610Salfred m_freem(m); 2151188417Sthompsa return EIO; 2152184610Salfred } 2153184610Salfred 2154188417Sthompsa if (params == NULL) { 2155188417Sthompsa /* 2156188417Sthompsa * Legacy path; interpret frame contents to decide 2157188417Sthompsa * precisely how to send the frame. 2158188417Sthompsa */ 2159188417Sthompsa if (ural_tx_mgt(sc, m, ni) != 0) 2160188417Sthompsa goto bad; 2161188417Sthompsa } else { 2162188417Sthompsa /* 2163188417Sthompsa * Caller supplied explicit parameters to use in 2164188417Sthompsa * sending the frame. 2165188417Sthompsa */ 2166188417Sthompsa if (ural_tx_raw(sc, m, ni, params) != 0) 2167188417Sthompsa goto bad; 2168184610Salfred } 2169188417Sthompsa RAL_UNLOCK(sc); 2170188417Sthompsa return 0; 2171188417Sthompsabad: 2172188417Sthompsa RAL_UNLOCK(sc); 2173188417Sthompsa return EIO; /* XXX */ 2174184610Salfred} 2175184610Salfred 2176184610Salfredstatic void 2177206358Srpauloural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni) 2178184610Salfred{ 2179188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 2180188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 2181184610Salfred 2182188417Sthompsa /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2183188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2184184610Salfred 2185206358Srpaulo usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp); 2186184610Salfred} 2187184610Salfred 2188184610Salfredstatic void 2189206358Srpauloural_ratectl_timeout(void *arg) 2190184610Salfred{ 2191188417Sthompsa struct ural_vap *uvp = arg; 2192191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2193191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2194184610Salfred 2195206358Srpaulo ieee80211_runtask(ic, &uvp->ratectl_task); 2196184610Salfred} 2197184610Salfred 2198184610Salfredstatic void 2199206358Srpauloural_ratectl_task(void *arg, int pending) 2200184610Salfred{ 2201191746Sthompsa struct ural_vap *uvp = arg; 2202191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2203191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2204286950Sadrian struct ural_softc *sc = ic->ic_softc; 2205212127Sthompsa struct ieee80211_node *ni; 2206188417Sthompsa int ok, fail; 2207206358Srpaulo int sum, retrycnt; 2208184610Salfred 2209212127Sthompsa ni = ieee80211_ref_node(vap->iv_bss); 2210191746Sthompsa RAL_LOCK(sc); 2211188417Sthompsa /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */ 2212188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2213184610Salfred 2214188417Sthompsa ok = sc->sta[7] + /* TX ok w/o retry */ 2215188417Sthompsa sc->sta[8]; /* TX ok w/ retry */ 2216188417Sthompsa fail = sc->sta[9]; /* TX retry-fail count */ 2217206358Srpaulo sum = ok+fail; 2218206358Srpaulo retrycnt = sc->sta[8] + fail; 2219184610Salfred 2220206358Srpaulo ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt); 2221206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 2222184610Salfred 2223287197Sglebius /* count TX retry-fail as Tx errors */ 2224287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, fail); 2225184610Salfred 2226206358Srpaulo usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp); 2227191746Sthompsa RAL_UNLOCK(sc); 2228212127Sthompsa ieee80211_free_node(ni); 2229184610Salfred} 2230184610Salfred 2231188619Sthompsastatic int 2232188619Sthompsaural_pause(struct ural_softc *sc, int timeout) 2233188619Sthompsa{ 2234188619Sthompsa 2235194228Sthompsa usb_pause_mtx(&sc->sc_mtx, timeout); 2236188619Sthompsa return (0); 2237188619Sthompsa} 2238