if_rsu.c revision 306549
1/* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3/*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18#include <sys/cdefs.h> 19__FBSDID("$FreeBSD: stable/11/sys/dev/usb/wlan/if_rsu.c 306549 2016-10-01 03:24:53Z avos $"); 20 21/* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o h/w crypto 26 * o hostap / ibss / mesh 27 * o sensible RSSI levels 28 * o power-save operation 29 */ 30 31#include "opt_wlan.h" 32 33#include <sys/param.h> 34#include <sys/endian.h> 35#include <sys/sockio.h> 36#include <sys/malloc.h> 37#include <sys/mbuf.h> 38#include <sys/kernel.h> 39#include <sys/socket.h> 40#include <sys/systm.h> 41#include <sys/conf.h> 42#include <sys/bus.h> 43#include <sys/rman.h> 44#include <sys/firmware.h> 45#include <sys/module.h> 46 47#include <machine/bus.h> 48#include <machine/resource.h> 49 50#include <net/bpf.h> 51#include <net/if.h> 52#include <net/if_var.h> 53#include <net/if_arp.h> 54#include <net/if_dl.h> 55#include <net/if_media.h> 56#include <net/if_types.h> 57 58#include <netinet/in.h> 59#include <netinet/in_systm.h> 60#include <netinet/in_var.h> 61#include <netinet/if_ether.h> 62#include <netinet/ip.h> 63 64#include <net80211/ieee80211_var.h> 65#include <net80211/ieee80211_regdomain.h> 66#include <net80211/ieee80211_radiotap.h> 67 68#include <dev/usb/usb.h> 69#include <dev/usb/usbdi.h> 70#include "usbdevs.h" 71 72#define USB_DEBUG_VAR rsu_debug 73#include <dev/usb/usb_debug.h> 74 75#include <dev/usb/wlan/if_rsureg.h> 76 77#ifdef USB_DEBUG 78static int rsu_debug = 0; 79SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 80SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 81 "Debug level"); 82#define RSU_DPRINTF(_sc, _flg, ...) \ 83 do \ 84 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 85 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 86 while (0) 87#else 88#define RSU_DPRINTF(_sc, _flg, ...) 89#endif 90 91static int rsu_enable_11n = 1; 92TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 93 94#define RSU_DEBUG_ANY 0xffffffff 95#define RSU_DEBUG_TX 0x00000001 96#define RSU_DEBUG_RX 0x00000002 97#define RSU_DEBUG_RESET 0x00000004 98#define RSU_DEBUG_CALIB 0x00000008 99#define RSU_DEBUG_STATE 0x00000010 100#define RSU_DEBUG_SCAN 0x00000020 101#define RSU_DEBUG_FWCMD 0x00000040 102#define RSU_DEBUG_TXDONE 0x00000080 103#define RSU_DEBUG_FW 0x00000100 104#define RSU_DEBUG_FWDBG 0x00000200 105#define RSU_DEBUG_AMPDU 0x00000400 106 107static const STRUCT_USB_HOST_ID rsu_devs[] = { 108#define RSU_HT_NOT_SUPPORTED 0 109#define RSU_HT_SUPPORTED 1 110#define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 111 RSU_HT_SUPPORTED) } 112#define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 113 RSU_HT_NOT_SUPPORTED) } 114 RSU_DEV(ASUS, RTL8192SU), 115 RSU_DEV(AZUREWAVE, RTL8192SU_4), 116 RSU_DEV_HT(ACCTON, RTL8192SU), 117 RSU_DEV_HT(ASUS, USBN10), 118 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 119 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 120 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 121 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 122 RSU_DEV_HT(BELKIN, RTL8192SU_1), 123 RSU_DEV_HT(BELKIN, RTL8192SU_2), 124 RSU_DEV_HT(BELKIN, RTL8192SU_3), 125 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 126 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 127 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 128 RSU_DEV_HT(COREGA, RTL8192SU), 129 RSU_DEV_HT(DLINK2, DWA131A1), 130 RSU_DEV_HT(DLINK2, RTL8192SU_1), 131 RSU_DEV_HT(DLINK2, RTL8192SU_2), 132 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 133 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 134 RSU_DEV_HT(EDIMAX, EW7622UMN), 135 RSU_DEV_HT(GUILLEMOT, HWGUN54), 136 RSU_DEV_HT(GUILLEMOT, HWNUM300), 137 RSU_DEV_HT(HAWKING, RTL8192SU_1), 138 RSU_DEV_HT(HAWKING, RTL8192SU_2), 139 RSU_DEV_HT(PLANEX2, GWUSNANO), 140 RSU_DEV_HT(REALTEK, RTL8171), 141 RSU_DEV_HT(REALTEK, RTL8172), 142 RSU_DEV_HT(REALTEK, RTL8173), 143 RSU_DEV_HT(REALTEK, RTL8174), 144 RSU_DEV_HT(REALTEK, RTL8192SU), 145 RSU_DEV_HT(REALTEK, RTL8712), 146 RSU_DEV_HT(REALTEK, RTL8713), 147 RSU_DEV_HT(SENAO, RTL8192SU_1), 148 RSU_DEV_HT(SENAO, RTL8192SU_2), 149 RSU_DEV_HT(SITECOMEU, WL349V1), 150 RSU_DEV_HT(SITECOMEU, WL353), 151 RSU_DEV_HT(SWEEX2, LW154), 152 RSU_DEV_HT(TRENDNET, TEW646UBH), 153#undef RSU_DEV_HT 154#undef RSU_DEV 155}; 156 157static device_probe_t rsu_match; 158static device_attach_t rsu_attach; 159static device_detach_t rsu_detach; 160static usb_callback_t rsu_bulk_tx_callback_be_bk; 161static usb_callback_t rsu_bulk_tx_callback_vi_vo; 162static usb_callback_t rsu_bulk_tx_callback_h2c; 163static usb_callback_t rsu_bulk_rx_callback; 164static usb_error_t rsu_do_request(struct rsu_softc *, 165 struct usb_device_request *, void *); 166static struct ieee80211vap * 167 rsu_vap_create(struct ieee80211com *, const char name[], 168 int, enum ieee80211_opmode, int, const uint8_t bssid[], 169 const uint8_t mac[]); 170static void rsu_vap_delete(struct ieee80211vap *); 171static void rsu_scan_start(struct ieee80211com *); 172static void rsu_scan_end(struct ieee80211com *); 173static void rsu_getradiocaps(struct ieee80211com *, int, int *, 174 struct ieee80211_channel[]); 175static void rsu_set_channel(struct ieee80211com *); 176static void rsu_update_mcast(struct ieee80211com *); 177static int rsu_alloc_rx_list(struct rsu_softc *); 178static void rsu_free_rx_list(struct rsu_softc *); 179static int rsu_alloc_tx_list(struct rsu_softc *); 180static void rsu_free_tx_list(struct rsu_softc *); 181static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 182static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 183static struct rsu_data *rsu_getbuf(struct rsu_softc *); 184static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 185static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 186 int); 187static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 188static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 189static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 190static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 191 int); 192static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 193static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 194static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 195static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 196static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 197static int rsu_read_rom(struct rsu_softc *); 198static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 199static void rsu_calib_task(void *, int); 200static void rsu_tx_task(void *, int); 201static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 202#ifdef notyet 203static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 204static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 205#endif 206static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 207static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 208static int rsu_disconnect(struct rsu_softc *); 209static int rsu_hwrssi_to_rssi(struct rsu_softc *, int hw_rssi); 210static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 211static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 212static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 213static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 214#if 0 215static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 216#endif 217static struct mbuf * rsu_rx_frame(struct rsu_softc *, uint8_t *, int); 218static struct mbuf * rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int); 219static struct mbuf * 220 rsu_rxeof(struct usb_xfer *, struct rsu_data *); 221static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 222static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 223 const struct ieee80211_bpf_params *); 224static void rsu_init(struct rsu_softc *); 225static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 226 struct mbuf *, struct rsu_data *); 227static int rsu_transmit(struct ieee80211com *, struct mbuf *); 228static void rsu_start(struct rsu_softc *); 229static void _rsu_start(struct rsu_softc *); 230static void rsu_parent(struct ieee80211com *); 231static void rsu_stop(struct rsu_softc *); 232static void rsu_ms_delay(struct rsu_softc *, int); 233 234static device_method_t rsu_methods[] = { 235 DEVMETHOD(device_probe, rsu_match), 236 DEVMETHOD(device_attach, rsu_attach), 237 DEVMETHOD(device_detach, rsu_detach), 238 239 DEVMETHOD_END 240}; 241 242static driver_t rsu_driver = { 243 .name = "rsu", 244 .methods = rsu_methods, 245 .size = sizeof(struct rsu_softc) 246}; 247 248static devclass_t rsu_devclass; 249 250DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 251MODULE_DEPEND(rsu, wlan, 1, 1, 1); 252MODULE_DEPEND(rsu, usb, 1, 1, 1); 253MODULE_DEPEND(rsu, firmware, 1, 1, 1); 254MODULE_VERSION(rsu, 1); 255USB_PNP_HOST_INFO(rsu_devs); 256 257static const uint8_t rsu_chan_2ghz[] = 258 { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 259 260static uint8_t rsu_wme_ac_xfer_map[4] = { 261 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 262 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 263 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 264 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 265}; 266 267/* XXX hard-coded */ 268#define RSU_H2C_ENDPOINT 3 269 270static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 271 [RSU_BULK_RX] = { 272 .type = UE_BULK, 273 .endpoint = UE_ADDR_ANY, 274 .direction = UE_DIR_IN, 275 .bufsize = RSU_RXBUFSZ, 276 .flags = { 277 .pipe_bof = 1, 278 .short_xfer_ok = 1 279 }, 280 .callback = rsu_bulk_rx_callback 281 }, 282 [RSU_BULK_TX_BE_BK] = { 283 .type = UE_BULK, 284 .endpoint = 0x06, 285 .direction = UE_DIR_OUT, 286 .bufsize = RSU_TXBUFSZ, 287 .flags = { 288 .ext_buffer = 1, 289 .pipe_bof = 1, 290 .force_short_xfer = 1 291 }, 292 .callback = rsu_bulk_tx_callback_be_bk, 293 .timeout = RSU_TX_TIMEOUT 294 }, 295 [RSU_BULK_TX_VI_VO] = { 296 .type = UE_BULK, 297 .endpoint = 0x04, 298 .direction = UE_DIR_OUT, 299 .bufsize = RSU_TXBUFSZ, 300 .flags = { 301 .ext_buffer = 1, 302 .pipe_bof = 1, 303 .force_short_xfer = 1 304 }, 305 .callback = rsu_bulk_tx_callback_vi_vo, 306 .timeout = RSU_TX_TIMEOUT 307 }, 308 [RSU_BULK_TX_H2C] = { 309 .type = UE_BULK, 310 .endpoint = 0x0d, 311 .direction = UE_DIR_OUT, 312 .bufsize = RSU_TXBUFSZ, 313 .flags = { 314 .ext_buffer = 1, 315 .pipe_bof = 1, 316 .short_xfer_ok = 1 317 }, 318 .callback = rsu_bulk_tx_callback_h2c, 319 .timeout = RSU_TX_TIMEOUT 320 }, 321}; 322 323static int 324rsu_match(device_t self) 325{ 326 struct usb_attach_arg *uaa = device_get_ivars(self); 327 328 if (uaa->usb_mode != USB_MODE_HOST || 329 uaa->info.bIfaceIndex != 0 || 330 uaa->info.bConfigIndex != 0) 331 return (ENXIO); 332 333 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 334} 335 336static int 337rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 338{ 339 340 return (ENOTSUP); 341} 342 343static void 344rsu_update_chw(struct ieee80211com *ic) 345{ 346 347} 348 349/* 350 * notification from net80211 that it'd like to do A-MPDU on the given TID. 351 * 352 * Note: this actually hangs traffic at the present moment, so don't use it. 353 * The firmware debug does indiciate it's sending and establishing a TX AMPDU 354 * session, but then no traffic flows. 355 */ 356static int 357rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 358{ 359#if 0 360 struct rsu_softc *sc = ni->ni_ic->ic_softc; 361 struct r92s_add_ba_req req; 362 363 /* Don't enable if it's requested or running */ 364 if (IEEE80211_AMPDU_REQUESTED(tap)) 365 return (0); 366 if (IEEE80211_AMPDU_RUNNING(tap)) 367 return (0); 368 369 /* We've decided to send addba; so send it */ 370 req.tid = htole32(tap->txa_tid); 371 372 /* Attempt net80211 state */ 373 if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1) 374 return (0); 375 376 /* Send the firmware command */ 377 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n", 378 __func__, 379 tap->txa_tid); 380 381 RSU_LOCK(sc); 382 if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) { 383 RSU_UNLOCK(sc); 384 /* Mark failure */ 385 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0); 386 return (0); 387 } 388 RSU_UNLOCK(sc); 389 390 /* Mark success; we don't get any further notifications */ 391 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1); 392#endif 393 /* Return 0, we're driving this ourselves */ 394 return (0); 395} 396 397static int 398rsu_wme_update(struct ieee80211com *ic) 399{ 400 401 /* Firmware handles this; not our problem */ 402 return (0); 403} 404 405static int 406rsu_attach(device_t self) 407{ 408 struct usb_attach_arg *uaa = device_get_ivars(self); 409 struct rsu_softc *sc = device_get_softc(self); 410 struct ieee80211com *ic = &sc->sc_ic; 411 int error; 412 uint8_t iface_index; 413 struct usb_interface *iface; 414 const char *rft; 415 416 device_set_usb_desc(self); 417 sc->sc_udev = uaa->device; 418 sc->sc_dev = self; 419 if (rsu_enable_11n) 420 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 421 422 /* Get number of endpoints */ 423 iface = usbd_get_iface(sc->sc_udev, 0); 424 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 425 426 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 427 if (sc->sc_nendpoints != 4) { 428 device_printf(sc->sc_dev, 429 "the driver currently only supports 4-endpoint devices\n"); 430 return (ENXIO); 431 } 432 433 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 434 MTX_DEF); 435 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 436 rsu_calib_task, sc); 437 TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc); 438 mbufq_init(&sc->sc_snd, ifqmaxlen); 439 440 /* Allocate Tx/Rx buffers. */ 441 error = rsu_alloc_rx_list(sc); 442 if (error != 0) { 443 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 444 goto fail_usb; 445 } 446 447 error = rsu_alloc_tx_list(sc); 448 if (error != 0) { 449 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 450 rsu_free_rx_list(sc); 451 goto fail_usb; 452 } 453 454 iface_index = 0; 455 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 456 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 457 if (error) { 458 device_printf(sc->sc_dev, 459 "could not allocate USB transfers, err=%s\n", 460 usbd_errstr(error)); 461 goto fail_usb; 462 } 463 RSU_LOCK(sc); 464 /* Read chip revision. */ 465 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 466 if (sc->cut != 3) 467 sc->cut = (sc->cut >> 1) + 1; 468 error = rsu_read_rom(sc); 469 RSU_UNLOCK(sc); 470 if (error != 0) { 471 device_printf(self, "could not read ROM\n"); 472 goto fail_rom; 473 } 474 475 /* Figure out TX/RX streams */ 476 switch (sc->rom[84]) { 477 case 0x0: 478 sc->sc_rftype = RTL8712_RFCONFIG_1T1R; 479 sc->sc_nrxstream = 1; 480 sc->sc_ntxstream = 1; 481 rft = "1T1R"; 482 break; 483 case 0x1: 484 sc->sc_rftype = RTL8712_RFCONFIG_1T2R; 485 sc->sc_nrxstream = 2; 486 sc->sc_ntxstream = 1; 487 rft = "1T2R"; 488 break; 489 case 0x2: 490 sc->sc_rftype = RTL8712_RFCONFIG_2T2R; 491 sc->sc_nrxstream = 2; 492 sc->sc_ntxstream = 2; 493 rft = "2T2R"; 494 break; 495 default: 496 device_printf(sc->sc_dev, 497 "%s: unknown board type (rfconfig=0x%02x)\n", 498 __func__, 499 sc->rom[84]); 500 goto fail_rom; 501 } 502 503 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 504 device_printf(self, "MAC/BB RTL8712 cut %d %s\n", sc->cut, rft); 505 506 ic->ic_softc = sc; 507 ic->ic_name = device_get_nameunit(self); 508 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 509 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 510 511 /* Set device capabilities. */ 512 ic->ic_caps = 513 IEEE80211_C_STA | /* station mode */ 514#if 0 515 IEEE80211_C_BGSCAN | /* Background scan. */ 516#endif 517 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 518 IEEE80211_C_WME | /* WME/QoS */ 519 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 520 IEEE80211_C_WPA; /* WPA/RSN. */ 521 522 /* Check if HT support is present. */ 523 if (sc->sc_ht) { 524 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 525 526 /* Enable basic HT */ 527 ic->ic_htcaps = IEEE80211_HTC_HT | 528#if 0 529 IEEE80211_HTC_AMPDU | 530#endif 531 IEEE80211_HTC_AMSDU | 532 IEEE80211_HTCAP_MAXAMSDU_3839 | 533 IEEE80211_HTCAP_SMPS_OFF; 534 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 535 536 /* set number of spatial streams */ 537 ic->ic_txstream = sc->sc_ntxstream; 538 ic->ic_rxstream = sc->sc_nrxstream; 539 } 540 541 rsu_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 542 ic->ic_channels); 543 544 ieee80211_ifattach(ic); 545 ic->ic_raw_xmit = rsu_raw_xmit; 546 ic->ic_scan_start = rsu_scan_start; 547 ic->ic_scan_end = rsu_scan_end; 548 ic->ic_getradiocaps = rsu_getradiocaps; 549 ic->ic_set_channel = rsu_set_channel; 550 ic->ic_vap_create = rsu_vap_create; 551 ic->ic_vap_delete = rsu_vap_delete; 552 ic->ic_update_mcast = rsu_update_mcast; 553 ic->ic_parent = rsu_parent; 554 ic->ic_transmit = rsu_transmit; 555 ic->ic_send_mgmt = rsu_send_mgmt; 556 ic->ic_update_chw = rsu_update_chw; 557 ic->ic_ampdu_enable = rsu_ampdu_enable; 558 ic->ic_wme.wme_update = rsu_wme_update; 559 560 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 561 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 562 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 563 RSU_RX_RADIOTAP_PRESENT); 564 565 if (bootverbose) 566 ieee80211_announce(ic); 567 568 return (0); 569 570fail_rom: 571 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 572fail_usb: 573 mtx_destroy(&sc->sc_mtx); 574 return (ENXIO); 575} 576 577static int 578rsu_detach(device_t self) 579{ 580 struct rsu_softc *sc = device_get_softc(self); 581 struct ieee80211com *ic = &sc->sc_ic; 582 583 RSU_LOCK(sc); 584 rsu_stop(sc); 585 RSU_UNLOCK(sc); 586 587 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 588 589 /* 590 * Free buffers /before/ we detach from net80211, else node 591 * references to destroyed vaps will lead to a panic. 592 */ 593 /* Free Tx/Rx buffers. */ 594 RSU_LOCK(sc); 595 rsu_free_tx_list(sc); 596 rsu_free_rx_list(sc); 597 RSU_UNLOCK(sc); 598 599 /* Frames are freed; detach from net80211 */ 600 ieee80211_ifdetach(ic); 601 602 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 603 taskqueue_drain(taskqueue_thread, &sc->tx_task); 604 605 mtx_destroy(&sc->sc_mtx); 606 607 return (0); 608} 609 610static usb_error_t 611rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 612 void *data) 613{ 614 usb_error_t err; 615 int ntries = 10; 616 617 RSU_ASSERT_LOCKED(sc); 618 619 while (ntries--) { 620 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 621 req, data, 0, NULL, 250 /* ms */); 622 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 623 break; 624 DPRINTFN(1, "Control request failed, %s (retrying)\n", 625 usbd_errstr(err)); 626 rsu_ms_delay(sc, 10); 627 } 628 629 return (err); 630} 631 632static struct ieee80211vap * 633rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 634 enum ieee80211_opmode opmode, int flags, 635 const uint8_t bssid[IEEE80211_ADDR_LEN], 636 const uint8_t mac[IEEE80211_ADDR_LEN]) 637{ 638 struct rsu_vap *uvp; 639 struct ieee80211vap *vap; 640 641 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 642 return (NULL); 643 644 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 645 vap = &uvp->vap; 646 647 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 648 flags, bssid) != 0) { 649 /* out of memory */ 650 free(uvp, M_80211_VAP); 651 return (NULL); 652 } 653 654 /* override state transition machine */ 655 uvp->newstate = vap->iv_newstate; 656 vap->iv_newstate = rsu_newstate; 657 658 /* Limits from the r92su driver */ 659 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 660 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 661 662 /* complete setup */ 663 ieee80211_vap_attach(vap, ieee80211_media_change, 664 ieee80211_media_status, mac); 665 ic->ic_opmode = opmode; 666 667 return (vap); 668} 669 670static void 671rsu_vap_delete(struct ieee80211vap *vap) 672{ 673 struct rsu_vap *uvp = RSU_VAP(vap); 674 675 ieee80211_vap_detach(vap); 676 free(uvp, M_80211_VAP); 677} 678 679static void 680rsu_scan_start(struct ieee80211com *ic) 681{ 682 struct rsu_softc *sc = ic->ic_softc; 683 int error; 684 685 /* Scanning is done by the firmware. */ 686 RSU_LOCK(sc); 687 /* XXX TODO: force awake if in in network-sleep? */ 688 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 689 RSU_UNLOCK(sc); 690 if (error != 0) 691 device_printf(sc->sc_dev, 692 "could not send site survey command\n"); 693} 694 695static void 696rsu_scan_end(struct ieee80211com *ic) 697{ 698 /* Nothing to do here. */ 699} 700 701static void 702rsu_getradiocaps(struct ieee80211com *ic, 703 int maxchans, int *nchans, struct ieee80211_channel chans[]) 704{ 705 struct rsu_softc *sc = ic->ic_softc; 706 uint8_t bands[IEEE80211_MODE_BYTES]; 707 708 /* Set supported .11b and .11g rates. */ 709 memset(bands, 0, sizeof(bands)); 710 setbit(bands, IEEE80211_MODE_11B); 711 setbit(bands, IEEE80211_MODE_11G); 712 if (sc->sc_ht) 713 setbit(bands, IEEE80211_MODE_11NG); 714 ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 715 rsu_chan_2ghz, nitems(rsu_chan_2ghz), bands, 0); 716} 717 718static void 719rsu_set_channel(struct ieee80211com *ic __unused) 720{ 721 /* We are unable to switch channels, yet. */ 722} 723 724static void 725rsu_update_mcast(struct ieee80211com *ic) 726{ 727 /* XXX do nothing? */ 728} 729 730static int 731rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 732 int ndata, int maxsz) 733{ 734 int i, error; 735 736 for (i = 0; i < ndata; i++) { 737 struct rsu_data *dp = &data[i]; 738 dp->sc = sc; 739 dp->m = NULL; 740 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 741 if (dp->buf == NULL) { 742 device_printf(sc->sc_dev, 743 "could not allocate buffer\n"); 744 error = ENOMEM; 745 goto fail; 746 } 747 dp->ni = NULL; 748 } 749 750 return (0); 751fail: 752 rsu_free_list(sc, data, ndata); 753 return (error); 754} 755 756static int 757rsu_alloc_rx_list(struct rsu_softc *sc) 758{ 759 int error, i; 760 761 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 762 RSU_RXBUFSZ); 763 if (error != 0) 764 return (error); 765 766 STAILQ_INIT(&sc->sc_rx_active); 767 STAILQ_INIT(&sc->sc_rx_inactive); 768 769 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 770 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 771 772 return (0); 773} 774 775static int 776rsu_alloc_tx_list(struct rsu_softc *sc) 777{ 778 int error, i; 779 780 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 781 RSU_TXBUFSZ); 782 if (error != 0) 783 return (error); 784 785 STAILQ_INIT(&sc->sc_tx_inactive); 786 787 for (i = 0; i != RSU_N_TRANSFER; i++) { 788 STAILQ_INIT(&sc->sc_tx_active[i]); 789 STAILQ_INIT(&sc->sc_tx_pending[i]); 790 } 791 792 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 793 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 794 } 795 796 return (0); 797} 798 799static void 800rsu_free_tx_list(struct rsu_softc *sc) 801{ 802 int i; 803 804 /* prevent further allocations from TX list(s) */ 805 STAILQ_INIT(&sc->sc_tx_inactive); 806 807 for (i = 0; i != RSU_N_TRANSFER; i++) { 808 STAILQ_INIT(&sc->sc_tx_active[i]); 809 STAILQ_INIT(&sc->sc_tx_pending[i]); 810 } 811 812 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 813} 814 815static void 816rsu_free_rx_list(struct rsu_softc *sc) 817{ 818 /* prevent further allocations from RX list(s) */ 819 STAILQ_INIT(&sc->sc_rx_inactive); 820 STAILQ_INIT(&sc->sc_rx_active); 821 822 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 823} 824 825static void 826rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 827{ 828 int i; 829 830 for (i = 0; i < ndata; i++) { 831 struct rsu_data *dp = &data[i]; 832 833 if (dp->buf != NULL) { 834 free(dp->buf, M_USBDEV); 835 dp->buf = NULL; 836 } 837 if (dp->ni != NULL) { 838 ieee80211_free_node(dp->ni); 839 dp->ni = NULL; 840 } 841 } 842} 843 844static struct rsu_data * 845_rsu_getbuf(struct rsu_softc *sc) 846{ 847 struct rsu_data *bf; 848 849 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 850 if (bf != NULL) 851 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 852 else 853 bf = NULL; 854 return (bf); 855} 856 857static struct rsu_data * 858rsu_getbuf(struct rsu_softc *sc) 859{ 860 struct rsu_data *bf; 861 862 RSU_ASSERT_LOCKED(sc); 863 864 bf = _rsu_getbuf(sc); 865 if (bf == NULL) { 866 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__); 867 } 868 return (bf); 869} 870 871static void 872rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 873{ 874 875 RSU_ASSERT_LOCKED(sc); 876 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 877} 878 879static int 880rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 881 int len) 882{ 883 usb_device_request_t req; 884 885 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 886 req.bRequest = R92S_REQ_REGS; 887 USETW(req.wValue, addr); 888 USETW(req.wIndex, 0); 889 USETW(req.wLength, len); 890 891 return (rsu_do_request(sc, &req, buf)); 892} 893 894static void 895rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 896{ 897 rsu_write_region_1(sc, addr, &val, 1); 898} 899 900static void 901rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 902{ 903 val = htole16(val); 904 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 905} 906 907static void 908rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 909{ 910 val = htole32(val); 911 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 912} 913 914static int 915rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 916 int len) 917{ 918 usb_device_request_t req; 919 920 req.bmRequestType = UT_READ_VENDOR_DEVICE; 921 req.bRequest = R92S_REQ_REGS; 922 USETW(req.wValue, addr); 923 USETW(req.wIndex, 0); 924 USETW(req.wLength, len); 925 926 return (rsu_do_request(sc, &req, buf)); 927} 928 929static uint8_t 930rsu_read_1(struct rsu_softc *sc, uint16_t addr) 931{ 932 uint8_t val; 933 934 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 935 return (0xff); 936 return (val); 937} 938 939static uint16_t 940rsu_read_2(struct rsu_softc *sc, uint16_t addr) 941{ 942 uint16_t val; 943 944 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 945 return (0xffff); 946 return (le16toh(val)); 947} 948 949static uint32_t 950rsu_read_4(struct rsu_softc *sc, uint16_t addr) 951{ 952 uint32_t val; 953 954 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 955 return (0xffffffff); 956 return (le32toh(val)); 957} 958 959static int 960rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 961{ 962 int ntries; 963 964 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 965 rsu_ms_delay(sc, 1); 966 for (ntries = 0; ntries < 50; ntries++) { 967 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 968 return (0); 969 rsu_ms_delay(sc, 1); 970 } 971 return (ETIMEDOUT); 972} 973 974static uint8_t 975rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 976{ 977 uint32_t reg; 978 int ntries; 979 980 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 981 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 982 reg &= ~R92S_EFUSE_CTRL_VALID; 983 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 984 /* Wait for read operation to complete. */ 985 for (ntries = 0; ntries < 100; ntries++) { 986 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 987 if (reg & R92S_EFUSE_CTRL_VALID) 988 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 989 rsu_ms_delay(sc, 1); 990 } 991 device_printf(sc->sc_dev, 992 "could not read efuse byte at address 0x%x\n", addr); 993 return (0xff); 994} 995 996static int 997rsu_read_rom(struct rsu_softc *sc) 998{ 999 uint8_t *rom = sc->rom; 1000 uint16_t addr = 0; 1001 uint32_t reg; 1002 uint8_t off, msk; 1003 int i; 1004 1005 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 1006 reg = rsu_read_1(sc, R92S_EE_9346CR); 1007 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 1008 return (EIO); 1009 1010 /* Turn on 2.5V to prevent eFuse leakage. */ 1011 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 1012 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 1013 rsu_ms_delay(sc, 1); 1014 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 1015 1016 /* Read full ROM image. */ 1017 memset(&sc->rom, 0xff, sizeof(sc->rom)); 1018 while (addr < 512) { 1019 reg = rsu_efuse_read_1(sc, addr); 1020 if (reg == 0xff) 1021 break; 1022 addr++; 1023 off = reg >> 4; 1024 msk = reg & 0xf; 1025 for (i = 0; i < 4; i++) { 1026 if (msk & (1 << i)) 1027 continue; 1028 rom[off * 8 + i * 2 + 0] = 1029 rsu_efuse_read_1(sc, addr); 1030 addr++; 1031 rom[off * 8 + i * 2 + 1] = 1032 rsu_efuse_read_1(sc, addr); 1033 addr++; 1034 } 1035 } 1036#ifdef USB_DEBUG 1037 if (rsu_debug >= 5) { 1038 /* Dump ROM content. */ 1039 printf("\n"); 1040 for (i = 0; i < sizeof(sc->rom); i++) 1041 printf("%02x:", rom[i]); 1042 printf("\n"); 1043 } 1044#endif 1045 return (0); 1046} 1047 1048static int 1049rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 1050{ 1051 const uint8_t which = RSU_H2C_ENDPOINT; 1052 struct rsu_data *data; 1053 struct r92s_tx_desc *txd; 1054 struct r92s_fw_cmd_hdr *cmd; 1055 int cmdsz; 1056 int xferlen; 1057 1058 RSU_ASSERT_LOCKED(sc); 1059 1060 data = rsu_getbuf(sc); 1061 if (data == NULL) 1062 return (ENOMEM); 1063 1064 /* Blank the entire payload, just to be safe */ 1065 memset(data->buf, '\0', RSU_TXBUFSZ); 1066 1067 /* Round-up command length to a multiple of 8 bytes. */ 1068 /* XXX TODO: is this required? */ 1069 cmdsz = (len + 7) & ~7; 1070 1071 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 1072 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 1073 memset(data->buf, 0, xferlen); 1074 1075 /* Setup Tx descriptor. */ 1076 txd = (struct r92s_tx_desc *)data->buf; 1077 txd->txdw0 = htole32( 1078 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1079 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 1080 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1081 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 1082 1083 /* Setup command header. */ 1084 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 1085 cmd->len = htole16(cmdsz); 1086 cmd->code = code; 1087 cmd->seq = sc->cmd_seq; 1088 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 1089 1090 /* Copy command payload. */ 1091 memcpy(&cmd[1], buf, len); 1092 1093 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 1094 "%s: Tx cmd code=0x%x len=0x%x\n", 1095 __func__, code, cmdsz); 1096 data->buflen = xferlen; 1097 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1098 usbd_transfer_start(sc->sc_xfer[which]); 1099 1100 return (0); 1101} 1102 1103/* ARGSUSED */ 1104static void 1105rsu_calib_task(void *arg, int pending __unused) 1106{ 1107 struct rsu_softc *sc = arg; 1108#ifdef notyet 1109 uint32_t reg; 1110#endif 1111 1112 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1113 __func__); 1114 1115 RSU_LOCK(sc); 1116#ifdef notyet 1117 /* Read WPS PBC status. */ 1118 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1119 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1120 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1121 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1122 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1123 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1124 DPRINTF(("WPS PBC is pushed\n")); 1125#endif 1126 /* Read current signal level. */ 1127 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1128 sc->sc_currssi = rsu_read_4(sc, R92S_IOCMD_DATA); 1129 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d (%d)\n", 1130 __func__, sc->sc_currssi, 1131 rsu_hwrssi_to_rssi(sc, sc->sc_currssi)); 1132 } 1133 if (sc->sc_calibrating) 1134 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1135 RSU_UNLOCK(sc); 1136} 1137 1138static void 1139rsu_tx_task(void *arg, int pending __unused) 1140{ 1141 struct rsu_softc *sc = arg; 1142 1143 RSU_LOCK(sc); 1144 _rsu_start(sc); 1145 RSU_UNLOCK(sc); 1146} 1147 1148#define RSU_PWR_UNKNOWN 0x0 1149#define RSU_PWR_ACTIVE 0x1 1150#define RSU_PWR_OFF 0x2 1151#define RSU_PWR_SLEEP 0x3 1152 1153/* 1154 * Set the current power state. 1155 * 1156 * The rtlwifi code doesn't do this so aggressively; it 1157 * waits for an idle period after association with 1158 * no traffic before doing this. 1159 * 1160 * For now - it's on in all states except RUN, and 1161 * in RUN it'll transition to allow sleep. 1162 */ 1163 1164struct r92s_pwr_cmd { 1165 uint8_t mode; 1166 uint8_t smart_ps; 1167 uint8_t bcn_pass_time; 1168}; 1169 1170static int 1171rsu_set_fw_power_state(struct rsu_softc *sc, int state) 1172{ 1173 struct r92s_set_pwr_mode cmd; 1174 //struct r92s_pwr_cmd cmd; 1175 int error; 1176 1177 RSU_ASSERT_LOCKED(sc); 1178 1179 /* only change state if required */ 1180 if (sc->sc_curpwrstate == state) 1181 return (0); 1182 1183 memset(&cmd, 0, sizeof(cmd)); 1184 1185 switch (state) { 1186 case RSU_PWR_ACTIVE: 1187 /* Force the hardware awake */ 1188 rsu_write_1(sc, R92S_USB_HRPWM, 1189 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 1190 cmd.mode = R92S_PS_MODE_ACTIVE; 1191 break; 1192 case RSU_PWR_SLEEP: 1193 cmd.mode = R92S_PS_MODE_DTIM; /* XXX configurable? */ 1194 cmd.smart_ps = 1; /* XXX 2 if doing p2p */ 1195 cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */ 1196 break; 1197 case RSU_PWR_OFF: 1198 cmd.mode = R92S_PS_MODE_RADIOOFF; 1199 break; 1200 default: 1201 device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n", 1202 __func__, 1203 state); 1204 return (ENXIO); 1205 } 1206 1207 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1208 "%s: setting ps mode to %d (mode %d)\n", 1209 __func__, state, cmd.mode); 1210 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 1211 if (error == 0) 1212 sc->sc_curpwrstate = state; 1213 1214 return (error); 1215} 1216 1217static int 1218rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1219{ 1220 struct rsu_vap *uvp = RSU_VAP(vap); 1221 struct ieee80211com *ic = vap->iv_ic; 1222 struct rsu_softc *sc = ic->ic_softc; 1223 struct ieee80211_node *ni; 1224 struct ieee80211_rateset *rs; 1225 enum ieee80211_state ostate; 1226 int error, startcal = 0; 1227 1228 ostate = vap->iv_state; 1229 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1230 __func__, 1231 ieee80211_state_name[ostate], 1232 ieee80211_state_name[nstate]); 1233 1234 IEEE80211_UNLOCK(ic); 1235 if (ostate == IEEE80211_S_RUN) { 1236 RSU_LOCK(sc); 1237 /* Stop calibration. */ 1238 sc->sc_calibrating = 0; 1239 RSU_UNLOCK(sc); 1240 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1241 taskqueue_drain(taskqueue_thread, &sc->tx_task); 1242 /* Disassociate from our current BSS. */ 1243 RSU_LOCK(sc); 1244 rsu_disconnect(sc); 1245 } else 1246 RSU_LOCK(sc); 1247 switch (nstate) { 1248 case IEEE80211_S_INIT: 1249 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1250 break; 1251 case IEEE80211_S_AUTH: 1252 ni = ieee80211_ref_node(vap->iv_bss); 1253 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1254 error = rsu_join_bss(sc, ni); 1255 ieee80211_free_node(ni); 1256 if (error != 0) { 1257 device_printf(sc->sc_dev, 1258 "could not send join command\n"); 1259 } 1260 break; 1261 case IEEE80211_S_RUN: 1262 ni = ieee80211_ref_node(vap->iv_bss); 1263 rs = &ni->ni_rates; 1264 /* Indicate highest supported rate. */ 1265 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1266 (void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP); 1267 ieee80211_free_node(ni); 1268 startcal = 1; 1269 break; 1270 default: 1271 break; 1272 } 1273 if (startcal != 0) { 1274 sc->sc_calibrating = 1; 1275 /* Start periodic calibration. */ 1276 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, 1277 hz); 1278 } 1279 RSU_UNLOCK(sc); 1280 IEEE80211_LOCK(ic); 1281 return (uvp->newstate(vap, nstate, arg)); 1282} 1283 1284#ifdef notyet 1285static void 1286rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1287{ 1288 struct r92s_fw_cmd_set_key key; 1289 1290 memset(&key, 0, sizeof(key)); 1291 /* Map net80211 cipher to HW crypto algorithm. */ 1292 switch (k->wk_cipher->ic_cipher) { 1293 case IEEE80211_CIPHER_WEP: 1294 if (k->wk_keylen < 8) 1295 key.algo = R92S_KEY_ALGO_WEP40; 1296 else 1297 key.algo = R92S_KEY_ALGO_WEP104; 1298 break; 1299 case IEEE80211_CIPHER_TKIP: 1300 key.algo = R92S_KEY_ALGO_TKIP; 1301 break; 1302 case IEEE80211_CIPHER_AES_CCM: 1303 key.algo = R92S_KEY_ALGO_AES; 1304 break; 1305 default: 1306 return; 1307 } 1308 key.id = k->wk_keyix; 1309 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1310 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1311 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1312} 1313 1314static void 1315rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1316{ 1317 struct r92s_fw_cmd_set_key key; 1318 1319 memset(&key, 0, sizeof(key)); 1320 key.id = k->wk_keyix; 1321 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1322} 1323#endif 1324 1325static int 1326rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1327{ 1328 struct r92s_fw_cmd_sitesurvey cmd; 1329 struct ieee80211com *ic = &sc->sc_ic; 1330 int r; 1331 1332 RSU_ASSERT_LOCKED(sc); 1333 1334 memset(&cmd, 0, sizeof(cmd)); 1335 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1336 cmd.active = htole32(1); 1337 cmd.limit = htole32(48); 1338 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1339 /* Do a directed scan for second pass. */ 1340 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1341 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1342 vap->iv_des_ssid[0].len); 1343 1344 } 1345 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1346 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1347 if (r == 0) { 1348 sc->sc_scanning = 1; 1349 } 1350 return (r); 1351} 1352 1353static int 1354rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1355{ 1356 struct ieee80211com *ic = &sc->sc_ic; 1357 struct ieee80211vap *vap = ni->ni_vap; 1358 struct ndis_wlan_bssid_ex *bss; 1359 struct ndis_802_11_fixed_ies *fixed; 1360 struct r92s_fw_cmd_auth auth; 1361 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1362 uint8_t *frm; 1363 uint8_t opmode; 1364 int error; 1365 int cnt; 1366 char *msg = "rsujoin"; 1367 1368 RSU_ASSERT_LOCKED(sc); 1369 1370 /* 1371 * Until net80211 scanning doesn't automatically finish 1372 * before we tell it to, let's just wait until any pending 1373 * scan is done. 1374 * 1375 * XXX TODO: yes, this releases and re-acquires the lock. 1376 * We should re-verify the state whenever we re-attempt this! 1377 */ 1378 cnt = 0; 1379 while (sc->sc_scanning && cnt < 10) { 1380 device_printf(sc->sc_dev, 1381 "%s: still scanning! (attempt %d)\n", 1382 __func__, cnt); 1383 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1384 cnt++; 1385 } 1386 1387 /* Let the FW decide the opmode based on the capinfo field. */ 1388 opmode = NDIS802_11AUTOUNKNOWN; 1389 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1390 "%s: setting operating mode to %d\n", 1391 __func__, opmode); 1392 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1393 if (error != 0) 1394 return (error); 1395 1396 memset(&auth, 0, sizeof(auth)); 1397 if (vap->iv_flags & IEEE80211_F_WPA) { 1398 auth.mode = R92S_AUTHMODE_WPA; 1399 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1400 } else 1401 auth.mode = R92S_AUTHMODE_OPEN; 1402 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1403 "%s: setting auth mode to %d\n", 1404 __func__, auth.mode); 1405 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1406 if (error != 0) 1407 return (error); 1408 1409 memset(buf, 0, sizeof(buf)); 1410 bss = (struct ndis_wlan_bssid_ex *)buf; 1411 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1412 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1413 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1414 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1415 bss->privacy = htole32(1); 1416 bss->rssi = htole32(ni->ni_avgrssi); 1417 if (ic->ic_curmode == IEEE80211_MODE_11B) 1418 bss->networktype = htole32(NDIS802_11DS); 1419 else 1420 bss->networktype = htole32(NDIS802_11OFDM24); 1421 bss->config.len = htole32(sizeof(bss->config)); 1422 bss->config.bintval = htole32(ni->ni_intval); 1423 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1424 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1425 /* XXX verify how this is supposed to look! */ 1426 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1427 ni->ni_rates.rs_nrates); 1428 /* Write the fixed fields of the beacon frame. */ 1429 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1430 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1431 fixed->bintval = htole16(ni->ni_intval); 1432 fixed->capabilities = htole16(ni->ni_capinfo); 1433 /* Write IEs to be included in the association request. */ 1434 frm = (uint8_t *)&fixed[1]; 1435 frm = ieee80211_add_rsn(frm, vap); 1436 frm = ieee80211_add_wpa(frm, vap); 1437 frm = ieee80211_add_qos(frm, ni); 1438 if ((ic->ic_flags & IEEE80211_F_WME) && 1439 (ni->ni_ies.wme_ie != NULL)) 1440 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1441 if (ni->ni_flags & IEEE80211_NODE_HT) { 1442 frm = ieee80211_add_htcap(frm, ni); 1443 frm = ieee80211_add_htinfo(frm, ni); 1444 } 1445 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1446 bss->len = htole32(((frm - buf) + 3) & ~3); 1447 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1448 "%s: sending join bss command to %s chan %d\n", 1449 __func__, 1450 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1451 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1452} 1453 1454static int 1455rsu_disconnect(struct rsu_softc *sc) 1456{ 1457 uint32_t zero = 0; /* :-) */ 1458 1459 /* Disassociate from our current BSS. */ 1460 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1461 "%s: sending disconnect command\n", __func__); 1462 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1463} 1464 1465/* 1466 * Map the hardware provided RSSI value to a signal level. 1467 * For the most part it's just something we divide by and cap 1468 * so it doesn't overflow the representation by net80211. 1469 */ 1470static int 1471rsu_hwrssi_to_rssi(struct rsu_softc *sc, int hw_rssi) 1472{ 1473 int v; 1474 1475 if (hw_rssi == 0) 1476 return (0); 1477 v = hw_rssi >> 4; 1478 if (v > 80) 1479 v = 80; 1480 return (v); 1481} 1482 1483static void 1484rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1485{ 1486 struct ieee80211com *ic = &sc->sc_ic; 1487 struct ieee80211_frame *wh; 1488 struct ndis_wlan_bssid_ex *bss; 1489 struct ieee80211_rx_stats rxs; 1490 struct mbuf *m; 1491 int pktlen; 1492 1493 if (__predict_false(len < sizeof(*bss))) 1494 return; 1495 bss = (struct ndis_wlan_bssid_ex *)buf; 1496 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1497 return; 1498 1499 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1500 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1501 "networktype=%d privacy=%d, RSSI=%d\n", 1502 __func__, 1503 ether_sprintf(bss->macaddr), le32toh(bss->len), 1504 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1505 le32toh(bss->networktype), le32toh(bss->privacy), 1506 le32toh(bss->rssi)); 1507 1508 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1509 /* XXX TODO: just call the new scan API methods! */ 1510 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1511 if (__predict_false(pktlen > MCLBYTES)) 1512 return; 1513 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1514 if (__predict_false(m == NULL)) 1515 return; 1516 wh = mtod(m, struct ieee80211_frame *); 1517 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1518 IEEE80211_FC0_SUBTYPE_BEACON; 1519 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1520 USETW(wh->i_dur, 0); 1521 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1522 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1523 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1524 *(uint16_t *)wh->i_seq = 0; 1525 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1526 1527 /* Finalize mbuf. */ 1528 m->m_pkthdr.len = m->m_len = pktlen; 1529 1530 /* Set channel flags for input path */ 1531 bzero(&rxs, sizeof(rxs)); 1532 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1533 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1534 rxs.c_ieee = le32toh(bss->config.dsconfig); 1535 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1536 /* This is a number from 0..100; so let's just divide it down a bit */ 1537 rxs.rssi = le32toh(bss->rssi) / 2; 1538 rxs.nf = -96; 1539 1540 /* XXX avoid a LOR */ 1541 RSU_UNLOCK(sc); 1542 ieee80211_input_mimo_all(ic, m, &rxs); 1543 RSU_LOCK(sc); 1544} 1545 1546static void 1547rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1548{ 1549 struct ieee80211com *ic = &sc->sc_ic; 1550 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1551 struct ieee80211_node *ni = vap->iv_bss; 1552 struct r92s_event_join_bss *rsp; 1553 uint32_t tmp; 1554 int res; 1555 1556 if (__predict_false(len < sizeof(*rsp))) 1557 return; 1558 rsp = (struct r92s_event_join_bss *)buf; 1559 res = (int)le32toh(rsp->join_res); 1560 1561 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1562 "%s: Rx join BSS event len=%d res=%d\n", 1563 __func__, len, res); 1564 1565 /* 1566 * XXX Don't do this; there's likely a better way to tell 1567 * the caller we failed. 1568 */ 1569 if (res <= 0) { 1570 RSU_UNLOCK(sc); 1571 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1572 RSU_LOCK(sc); 1573 return; 1574 } 1575 1576 tmp = le32toh(rsp->associd); 1577 if (tmp >= vap->iv_max_aid) { 1578 DPRINTF("Assoc ID overflow\n"); 1579 tmp = 1; 1580 } 1581 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1582 "%s: associated with %s associd=%d\n", 1583 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1584 /* XXX is this required? What's the top two bits for again? */ 1585 ni->ni_associd = tmp | 0xc000; 1586 RSU_UNLOCK(sc); 1587 ieee80211_new_state(vap, IEEE80211_S_RUN, 1588 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1589 RSU_LOCK(sc); 1590} 1591 1592static void 1593rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1594{ 1595 struct ieee80211com *ic = &sc->sc_ic; 1596 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1597 struct r92s_add_ba_event *ba = (void *) buf; 1598 struct ieee80211_node *ni; 1599 1600 if (len < sizeof(*ba)) { 1601 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1602 return; 1603 } 1604 1605 if (vap == NULL) 1606 return; 1607 1608 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: mac=%s, tid=%d, ssn=%d\n", 1609 __func__, 1610 ether_sprintf(ba->mac_addr), 1611 (int) ba->tid, 1612 (int) le16toh(ba->ssn)); 1613 1614 /* XXX do node lookup; this is STA specific */ 1615 1616 ni = ieee80211_ref_node(vap->iv_bss); 1617 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1618 ieee80211_free_node(ni); 1619} 1620 1621static void 1622rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1623{ 1624 struct ieee80211com *ic = &sc->sc_ic; 1625 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1626 1627 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1628 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1629 switch (code) { 1630 case R92S_EVT_SURVEY: 1631 rsu_event_survey(sc, buf, len); 1632 break; 1633 case R92S_EVT_SURVEY_DONE: 1634 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1635 "%s: site survey pass %d done, found %d BSS\n", 1636 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1637 sc->sc_scanning = 0; 1638 if (vap->iv_state != IEEE80211_S_SCAN) 1639 break; /* Ignore if not scanning. */ 1640 1641 /* 1642 * XXX TODO: This needs to be done without a transition to 1643 * the SCAN state again. Grr. 1644 */ 1645 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1646 /* Schedule a directed scan for hidden APs. */ 1647 /* XXX bad! */ 1648 sc->sc_scan_pass = 1; 1649 RSU_UNLOCK(sc); 1650 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1651 RSU_LOCK(sc); 1652 break; 1653 } 1654 sc->sc_scan_pass = 0; 1655 break; 1656 case R92S_EVT_JOIN_BSS: 1657 if (vap->iv_state == IEEE80211_S_AUTH) 1658 rsu_event_join_bss(sc, buf, len); 1659 break; 1660 case R92S_EVT_DEL_STA: 1661 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1662 "%s: disassociated from %s\n", __func__, 1663 ether_sprintf(buf)); 1664 if (vap->iv_state == IEEE80211_S_RUN && 1665 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1666 RSU_UNLOCK(sc); 1667 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1668 RSU_LOCK(sc); 1669 } 1670 break; 1671 case R92S_EVT_WPS_PBC: 1672 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1673 "%s: WPS PBC pushed.\n", __func__); 1674 break; 1675 case R92S_EVT_FWDBG: 1676 buf[60] = '\0'; 1677 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1678 break; 1679 case R92S_EVT_ADDBA_REQ_REPORT: 1680 rsu_event_addba_req_report(sc, buf, len); 1681 break; 1682 default: 1683 device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code); 1684 break; 1685 } 1686} 1687 1688static void 1689rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1690{ 1691 struct r92s_fw_cmd_hdr *cmd; 1692 int cmdsz; 1693 1694 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1695 1696 /* Skip Rx status. */ 1697 buf += sizeof(struct r92s_rx_stat); 1698 len -= sizeof(struct r92s_rx_stat); 1699 1700 /* Process all events. */ 1701 for (;;) { 1702 /* Check that command header fits. */ 1703 if (__predict_false(len < sizeof(*cmd))) 1704 break; 1705 cmd = (struct r92s_fw_cmd_hdr *)buf; 1706 /* Check that command payload fits. */ 1707 cmdsz = le16toh(cmd->len); 1708 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1709 break; 1710 1711 /* Process firmware event. */ 1712 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1713 1714 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1715 break; 1716 buf += sizeof(*cmd) + cmdsz; 1717 len -= sizeof(*cmd) + cmdsz; 1718 } 1719} 1720 1721#if 0 1722static int8_t 1723rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1724{ 1725 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1726 struct r92s_rx_phystat *phy; 1727 struct r92s_rx_cck *cck; 1728 uint8_t rpt; 1729 int8_t rssi; 1730 1731 if (rate <= 3) { 1732 cck = (struct r92s_rx_cck *)physt; 1733 rpt = (cck->agc_rpt >> 6) & 0x3; 1734 rssi = cck->agc_rpt & 0x3e; 1735 rssi = cckoff[rpt] - rssi; 1736 } else { /* OFDM/HT. */ 1737 phy = (struct r92s_rx_phystat *)physt; 1738 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1739 } 1740 return (rssi); 1741} 1742#endif 1743 1744static struct mbuf * 1745rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen) 1746{ 1747 struct ieee80211com *ic = &sc->sc_ic; 1748 struct ieee80211_frame *wh; 1749 struct r92s_rx_stat *stat; 1750 uint32_t rxdw0, rxdw3; 1751 struct mbuf *m; 1752 uint8_t rate; 1753 int infosz; 1754 1755 stat = (struct r92s_rx_stat *)buf; 1756 rxdw0 = le32toh(stat->rxdw0); 1757 rxdw3 = le32toh(stat->rxdw3); 1758 1759 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1760 counter_u64_add(ic->ic_ierrors, 1); 1761 return NULL; 1762 } 1763 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1764 counter_u64_add(ic->ic_ierrors, 1); 1765 return NULL; 1766 } 1767 1768 rate = MS(rxdw3, R92S_RXDW3_RATE); 1769 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1770 1771#if 0 1772 /* Get RSSI from PHY status descriptor if present. */ 1773 if (infosz != 0) 1774 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1775 else 1776 *rssi = 0; 1777#endif 1778 1779 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1780 "%s: Rx frame len=%d rate=%d infosz=%d\n", 1781 __func__, pktlen, rate, infosz); 1782 1783 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1784 if (__predict_false(m == NULL)) { 1785 counter_u64_add(ic->ic_ierrors, 1); 1786 return NULL; 1787 } 1788 /* Hardware does Rx TCP checksum offload. */ 1789 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1790 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1791 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1792 } 1793 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1794 memcpy(mtod(m, uint8_t *), wh, pktlen); 1795 m->m_pkthdr.len = m->m_len = pktlen; 1796 1797 if (ieee80211_radiotap_active(ic)) { 1798 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1799 1800 /* Map HW rate index to 802.11 rate. */ 1801 tap->wr_flags = 2; 1802 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1803 switch (rate) { 1804 /* CCK. */ 1805 case 0: tap->wr_rate = 2; break; 1806 case 1: tap->wr_rate = 4; break; 1807 case 2: tap->wr_rate = 11; break; 1808 case 3: tap->wr_rate = 22; break; 1809 /* OFDM. */ 1810 case 4: tap->wr_rate = 12; break; 1811 case 5: tap->wr_rate = 18; break; 1812 case 6: tap->wr_rate = 24; break; 1813 case 7: tap->wr_rate = 36; break; 1814 case 8: tap->wr_rate = 48; break; 1815 case 9: tap->wr_rate = 72; break; 1816 case 10: tap->wr_rate = 96; break; 1817 case 11: tap->wr_rate = 108; break; 1818 } 1819 } else if (rate >= 12) { /* MCS0~15. */ 1820 /* Bit 7 set means HT MCS instead of rate. */ 1821 tap->wr_rate = 0x80 | (rate - 12); 1822 } 1823#if 0 1824 tap->wr_dbm_antsignal = *rssi; 1825#endif 1826 /* XXX not nice */ 1827 tap->wr_dbm_antsignal = rsu_hwrssi_to_rssi(sc, sc->sc_currssi); 1828 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1829 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1830 } 1831 1832 return (m); 1833} 1834 1835static struct mbuf * 1836rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len) 1837{ 1838 struct r92s_rx_stat *stat; 1839 uint32_t rxdw0; 1840 int totlen, pktlen, infosz, npkts; 1841 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1842 1843 /* Get the number of encapsulated frames. */ 1844 stat = (struct r92s_rx_stat *)buf; 1845 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1846 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1847 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1848 1849 /* Process all of them. */ 1850 while (npkts-- > 0) { 1851 if (__predict_false(len < sizeof(*stat))) 1852 break; 1853 stat = (struct r92s_rx_stat *)buf; 1854 rxdw0 = le32toh(stat->rxdw0); 1855 1856 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1857 if (__predict_false(pktlen == 0)) 1858 break; 1859 1860 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1861 1862 /* Make sure everything fits in xfer. */ 1863 totlen = sizeof(*stat) + infosz + pktlen; 1864 if (__predict_false(totlen > len)) 1865 break; 1866 1867 /* Process 802.11 frame. */ 1868 m = rsu_rx_frame(sc, buf, pktlen); 1869 if (m0 == NULL) 1870 m0 = m; 1871 if (prevm == NULL) 1872 prevm = m; 1873 else { 1874 prevm->m_next = m; 1875 prevm = m; 1876 } 1877 /* Next chunk is 128-byte aligned. */ 1878 totlen = (totlen + 127) & ~127; 1879 buf += totlen; 1880 len -= totlen; 1881 } 1882 1883 return (m0); 1884} 1885 1886static struct mbuf * 1887rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data) 1888{ 1889 struct rsu_softc *sc = data->sc; 1890 struct ieee80211com *ic = &sc->sc_ic; 1891 struct r92s_rx_stat *stat; 1892 int len; 1893 1894 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1895 1896 if (__predict_false(len < sizeof(*stat))) { 1897 DPRINTF("xfer too short %d\n", len); 1898 counter_u64_add(ic->ic_ierrors, 1); 1899 return (NULL); 1900 } 1901 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1902 stat = (struct r92s_rx_stat *)data->buf; 1903 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1904 rsu_rx_multi_event(sc, data->buf, len); 1905 /* No packets to process. */ 1906 return (NULL); 1907 } else 1908 return (rsu_rx_multi_frame(sc, data->buf, len)); 1909} 1910 1911static void 1912rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1913{ 1914 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1915 struct ieee80211com *ic = &sc->sc_ic; 1916 struct ieee80211_frame *wh; 1917 struct ieee80211_node *ni; 1918 struct mbuf *m = NULL, *next; 1919 struct rsu_data *data; 1920 1921 RSU_ASSERT_LOCKED(sc); 1922 1923 switch (USB_GET_STATE(xfer)) { 1924 case USB_ST_TRANSFERRED: 1925 data = STAILQ_FIRST(&sc->sc_rx_active); 1926 if (data == NULL) 1927 goto tr_setup; 1928 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1929 m = rsu_rxeof(xfer, data); 1930 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1931 /* FALLTHROUGH */ 1932 case USB_ST_SETUP: 1933tr_setup: 1934 /* 1935 * XXX TODO: if we have an mbuf list, but then 1936 * we hit data == NULL, what now? 1937 */ 1938 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1939 if (data == NULL) { 1940 KASSERT(m == NULL, ("mbuf isn't NULL")); 1941 return; 1942 } 1943 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1944 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1945 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1946 usbd_xfer_max_len(xfer)); 1947 usbd_transfer_submit(xfer); 1948 /* 1949 * To avoid LOR we should unlock our private mutex here to call 1950 * ieee80211_input() because here is at the end of a USB 1951 * callback and safe to unlock. 1952 */ 1953 RSU_UNLOCK(sc); 1954 while (m != NULL) { 1955 int rssi; 1956 1957 /* Cheat and get the last calibrated RSSI */ 1958 rssi = rsu_hwrssi_to_rssi(sc, sc->sc_currssi); 1959 1960 next = m->m_next; 1961 m->m_next = NULL; 1962 wh = mtod(m, struct ieee80211_frame *); 1963 ni = ieee80211_find_rxnode(ic, 1964 (struct ieee80211_frame_min *)wh); 1965 if (ni != NULL) { 1966 if (ni->ni_flags & IEEE80211_NODE_HT) 1967 m->m_flags |= M_AMPDU; 1968 (void)ieee80211_input(ni, m, rssi, -96); 1969 ieee80211_free_node(ni); 1970 } else 1971 (void)ieee80211_input_all(ic, m, rssi, -96); 1972 m = next; 1973 } 1974 RSU_LOCK(sc); 1975 break; 1976 default: 1977 /* needs it to the inactive queue due to a error. */ 1978 data = STAILQ_FIRST(&sc->sc_rx_active); 1979 if (data != NULL) { 1980 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1981 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1982 } 1983 if (error != USB_ERR_CANCELLED) { 1984 usbd_xfer_set_stall(xfer); 1985 counter_u64_add(ic->ic_ierrors, 1); 1986 goto tr_setup; 1987 } 1988 break; 1989 } 1990 1991} 1992 1993static void 1994rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1995{ 1996#ifdef USB_DEBUG 1997 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1998#endif 1999 2000 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 2001 __func__, 2002 data); 2003 2004 if (data->m) { 2005 /* XXX status? */ 2006 ieee80211_tx_complete(data->ni, data->m, 0); 2007 data->m = NULL; 2008 data->ni = NULL; 2009 } 2010} 2011 2012static void 2013rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 2014 uint8_t which) 2015{ 2016 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2017 struct ieee80211com *ic = &sc->sc_ic; 2018 struct rsu_data *data; 2019 2020 RSU_ASSERT_LOCKED(sc); 2021 2022 switch (USB_GET_STATE(xfer)) { 2023 case USB_ST_TRANSFERRED: 2024 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 2025 if (data == NULL) 2026 goto tr_setup; 2027 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 2028 __func__, data); 2029 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 2030 rsu_txeof(xfer, data); 2031 rsu_freebuf(sc, data); 2032 /* FALLTHROUGH */ 2033 case USB_ST_SETUP: 2034tr_setup: 2035 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 2036 if (data == NULL) { 2037 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 2038 "%s: empty pending queue sc %p\n", __func__, sc); 2039 return; 2040 } 2041 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 2042 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 2043 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 2044 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 2045 "%s: submitting transfer %p\n", 2046 __func__, 2047 data); 2048 usbd_transfer_submit(xfer); 2049 break; 2050 default: 2051 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 2052 if (data != NULL) { 2053 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 2054 rsu_txeof(xfer, data); 2055 rsu_freebuf(sc, data); 2056 } 2057 counter_u64_add(ic->ic_oerrors, 1); 2058 2059 if (error != USB_ERR_CANCELLED) { 2060 usbd_xfer_set_stall(xfer); 2061 goto tr_setup; 2062 } 2063 break; 2064 } 2065 2066 /* 2067 * XXX TODO: if the queue is low, flush out FF TX frames. 2068 * Remember to unlock the driver for now; net80211 doesn't 2069 * defer it for us. 2070 */ 2071} 2072 2073static void 2074rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 2075{ 2076 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2077 2078 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 2079 2080 /* This kicks the TX taskqueue */ 2081 rsu_start(sc); 2082} 2083 2084static void 2085rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 2086{ 2087 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2088 2089 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 2090 2091 /* This kicks the TX taskqueue */ 2092 rsu_start(sc); 2093} 2094 2095static void 2096rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 2097{ 2098 struct rsu_softc *sc = usbd_xfer_softc(xfer); 2099 2100 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 2101 2102 /* This kicks the TX taskqueue */ 2103 rsu_start(sc); 2104} 2105 2106/* 2107 * Transmit the given frame. 2108 * 2109 * This doesn't free the node or mbuf upon failure. 2110 */ 2111static int 2112rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 2113 struct mbuf *m0, struct rsu_data *data) 2114{ 2115 struct ieee80211com *ic = &sc->sc_ic; 2116 struct ieee80211vap *vap = ni->ni_vap; 2117 struct ieee80211_frame *wh; 2118 struct ieee80211_key *k = NULL; 2119 struct r92s_tx_desc *txd; 2120 uint8_t type; 2121 int prio = 0; 2122 uint8_t which; 2123 int hasqos; 2124 int xferlen; 2125 int qid; 2126 2127 RSU_ASSERT_LOCKED(sc); 2128 2129 wh = mtod(m0, struct ieee80211_frame *); 2130 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2131 2132 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 2133 __func__, data, m0); 2134 2135 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2136 k = ieee80211_crypto_encap(ni, m0); 2137 if (k == NULL) { 2138 device_printf(sc->sc_dev, 2139 "ieee80211_crypto_encap returns NULL.\n"); 2140 /* XXX we don't expect the fragmented frames */ 2141 return (ENOBUFS); 2142 } 2143 wh = mtod(m0, struct ieee80211_frame *); 2144 } 2145 /* If we have QoS then use it */ 2146 /* XXX TODO: mbuf WME/PRI versus TID? */ 2147 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2148 /* Has QoS */ 2149 prio = M_WME_GETAC(m0); 2150 which = rsu_wme_ac_xfer_map[prio]; 2151 hasqos = 1; 2152 } else { 2153 /* Non-QoS TID */ 2154 /* XXX TODO: tid=0 for non-qos TID? */ 2155 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 2156 hasqos = 0; 2157 prio = 0; 2158 } 2159 2160 qid = rsu_ac2qid[prio]; 2161#if 0 2162 switch (type) { 2163 case IEEE80211_FC0_TYPE_CTL: 2164 case IEEE80211_FC0_TYPE_MGT: 2165 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2166 break; 2167 default: 2168 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 2169 break; 2170 } 2171 hasqos = 0; 2172#endif 2173 2174 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 2175 __func__, 2176 prio, 2177 which, 2178 hasqos); 2179 2180 /* Fill Tx descriptor. */ 2181 txd = (struct r92s_tx_desc *)data->buf; 2182 memset(txd, 0, sizeof(*txd)); 2183 2184 txd->txdw0 |= htole32( 2185 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 2186 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 2187 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 2188 2189 txd->txdw1 |= htole32( 2190 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 2191 if (!hasqos) 2192 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 2193#ifdef notyet 2194 if (k != NULL) { 2195 switch (k->wk_cipher->ic_cipher) { 2196 case IEEE80211_CIPHER_WEP: 2197 cipher = R92S_TXDW1_CIPHER_WEP; 2198 break; 2199 case IEEE80211_CIPHER_TKIP: 2200 cipher = R92S_TXDW1_CIPHER_TKIP; 2201 break; 2202 case IEEE80211_CIPHER_AES_CCM: 2203 cipher = R92S_TXDW1_CIPHER_AES; 2204 break; 2205 default: 2206 cipher = R92S_TXDW1_CIPHER_NONE; 2207 } 2208 txd->txdw1 |= htole32( 2209 SM(R92S_TXDW1_CIPHER, cipher) | 2210 SM(R92S_TXDW1_KEYIDX, k->k_id)); 2211 } 2212#endif 2213 /* XXX todo: set AGGEN bit if appropriate? */ 2214 txd->txdw2 |= htole32(R92S_TXDW2_BK); 2215 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2216 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 2217 /* 2218 * Firmware will use and increment the sequence number for the 2219 * specified priority. 2220 */ 2221 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 2222 2223 if (ieee80211_radiotap_active_vap(vap)) { 2224 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 2225 2226 tap->wt_flags = 0; 2227 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2228 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2229 ieee80211_radiotap_tx(vap, m0); 2230 } 2231 2232 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 2233 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 2234 2235 data->buflen = xferlen; 2236 data->ni = ni; 2237 data->m = m0; 2238 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2239 2240 /* start transfer, if any */ 2241 usbd_transfer_start(sc->sc_xfer[which]); 2242 return (0); 2243} 2244 2245static int 2246rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 2247{ 2248 struct rsu_softc *sc = ic->ic_softc; 2249 int error; 2250 2251 RSU_LOCK(sc); 2252 if (!sc->sc_running) { 2253 RSU_UNLOCK(sc); 2254 return (ENXIO); 2255 } 2256 2257 /* 2258 * XXX TODO: ensure that we treat 'm' as a list of frames 2259 * to transmit! 2260 */ 2261 error = mbufq_enqueue(&sc->sc_snd, m); 2262 if (error) { 2263 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2264 "%s: mbufq_enable: failed (%d)\n", 2265 __func__, 2266 error); 2267 RSU_UNLOCK(sc); 2268 return (error); 2269 } 2270 RSU_UNLOCK(sc); 2271 2272 /* This kicks the TX taskqueue */ 2273 rsu_start(sc); 2274 2275 return (0); 2276} 2277 2278static void 2279rsu_drain_mbufq(struct rsu_softc *sc) 2280{ 2281 struct mbuf *m; 2282 struct ieee80211_node *ni; 2283 2284 RSU_ASSERT_LOCKED(sc); 2285 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2286 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2287 m->m_pkthdr.rcvif = NULL; 2288 ieee80211_free_node(ni); 2289 m_freem(m); 2290 } 2291} 2292 2293static void 2294_rsu_start(struct rsu_softc *sc) 2295{ 2296 struct ieee80211_node *ni; 2297 struct rsu_data *bf; 2298 struct mbuf *m; 2299 2300 RSU_ASSERT_LOCKED(sc); 2301 2302 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2303 bf = rsu_getbuf(sc); 2304 if (bf == NULL) { 2305 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2306 "%s: failed to get buffer\n", __func__); 2307 mbufq_prepend(&sc->sc_snd, m); 2308 break; 2309 } 2310 2311 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2312 m->m_pkthdr.rcvif = NULL; 2313 2314 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2315 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2316 "%s: failed to transmit\n", __func__); 2317 if_inc_counter(ni->ni_vap->iv_ifp, 2318 IFCOUNTER_OERRORS, 1); 2319 rsu_freebuf(sc, bf); 2320 ieee80211_free_node(ni); 2321 m_freem(m); 2322 break; 2323 } 2324 } 2325} 2326 2327static void 2328rsu_start(struct rsu_softc *sc) 2329{ 2330 2331 taskqueue_enqueue(taskqueue_thread, &sc->tx_task); 2332} 2333 2334static void 2335rsu_parent(struct ieee80211com *ic) 2336{ 2337 struct rsu_softc *sc = ic->ic_softc; 2338 int startall = 0; 2339 2340 RSU_LOCK(sc); 2341 if (ic->ic_nrunning > 0) { 2342 if (!sc->sc_running) { 2343 rsu_init(sc); 2344 startall = 1; 2345 } 2346 } else if (sc->sc_running) 2347 rsu_stop(sc); 2348 RSU_UNLOCK(sc); 2349 2350 if (startall) 2351 ieee80211_start_all(ic); 2352} 2353 2354/* 2355 * Power on sequence for A-cut adapters. 2356 */ 2357static void 2358rsu_power_on_acut(struct rsu_softc *sc) 2359{ 2360 uint32_t reg; 2361 2362 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2363 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2364 2365 /* Enable AFE macro block's bandgap and Mbias. */ 2366 rsu_write_1(sc, R92S_AFE_MISC, 2367 rsu_read_1(sc, R92S_AFE_MISC) | 2368 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2369 /* Enable LDOA15 block. */ 2370 rsu_write_1(sc, R92S_LDOA15_CTRL, 2371 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2372 2373 rsu_write_1(sc, R92S_SPS1_CTRL, 2374 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2375 rsu_ms_delay(sc, 2000); 2376 /* Enable switch regulator block. */ 2377 rsu_write_1(sc, R92S_SPS1_CTRL, 2378 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2379 2380 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2381 2382 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2383 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2384 2385 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2386 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2387 2388 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2389 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2390 2391 /* Enable AFE clock. */ 2392 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2393 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2394 /* Enable AFE PLL macro block. */ 2395 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2396 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2397 /* Attach AFE PLL to MACTOP/BB. */ 2398 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2399 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2400 2401 /* Switch to 40MHz clock instead of 80MHz. */ 2402 rsu_write_2(sc, R92S_SYS_CLKR, 2403 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2404 2405 /* Enable MAC clock. */ 2406 rsu_write_2(sc, R92S_SYS_CLKR, 2407 rsu_read_2(sc, R92S_SYS_CLKR) | 2408 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2409 2410 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2411 2412 /* Enable digital core and IOREG R/W. */ 2413 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2414 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2415 2416 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2417 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2418 2419 /* Switch the control path to firmware. */ 2420 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2421 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2422 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2423 2424 rsu_write_2(sc, R92S_CR, 0x37fc); 2425 2426 /* Fix USB RX FIFO issue. */ 2427 rsu_write_1(sc, 0xfe5c, 2428 rsu_read_1(sc, 0xfe5c) | 0x80); 2429 rsu_write_1(sc, 0x00ab, 2430 rsu_read_1(sc, 0x00ab) | 0xc0); 2431 2432 rsu_write_1(sc, R92S_SYS_CLKR, 2433 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2434} 2435 2436/* 2437 * Power on sequence for B-cut and C-cut adapters. 2438 */ 2439static void 2440rsu_power_on_bcut(struct rsu_softc *sc) 2441{ 2442 uint32_t reg; 2443 int ntries; 2444 2445 /* Prevent eFuse leakage. */ 2446 rsu_write_1(sc, 0x37, 0xb0); 2447 rsu_ms_delay(sc, 10); 2448 rsu_write_1(sc, 0x37, 0x30); 2449 2450 /* Switch the control path to hardware. */ 2451 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2452 if (reg & R92S_FWHW_SEL) { 2453 rsu_write_2(sc, R92S_SYS_CLKR, 2454 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2455 } 2456 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2457 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2458 rsu_ms_delay(sc, 1); 2459 2460 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2461 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2462 2463 reg = rsu_read_1(sc, R92S_AFE_MISC); 2464 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2465 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2466 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2467 2468 /* Enable PLL. */ 2469 rsu_write_1(sc, R92S_LDOA15_CTRL, 2470 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2471 2472 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2473 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2474 2475 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2476 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2477 2478 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2479 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2480 2481 /* Support 64KB IMEM. */ 2482 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2483 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2484 2485 /* Enable AFE clock. */ 2486 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2487 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2488 /* Enable AFE PLL macro block. */ 2489 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2490 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2491 rsu_ms_delay(sc, 1); 2492 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2493 rsu_ms_delay(sc, 1); 2494 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2495 rsu_ms_delay(sc, 1); 2496 2497 /* Attach AFE PLL to MACTOP/BB. */ 2498 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2499 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2500 2501 /* Switch to 40MHz clock. */ 2502 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2503 /* Disable CPU clock and 80MHz SSC. */ 2504 rsu_write_1(sc, R92S_SYS_CLKR, 2505 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2506 /* Enable MAC clock. */ 2507 rsu_write_2(sc, R92S_SYS_CLKR, 2508 rsu_read_2(sc, R92S_SYS_CLKR) | 2509 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2510 2511 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2512 2513 /* Enable digital core and IOREG R/W. */ 2514 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2515 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2516 2517 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2518 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2519 2520 /* Switch the control path to firmware. */ 2521 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2522 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2523 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2524 2525 rsu_write_2(sc, R92S_CR, 0x37fc); 2526 2527 /* Fix USB RX FIFO issue. */ 2528 rsu_write_1(sc, 0xfe5c, 2529 rsu_read_1(sc, 0xfe5c) | 0x80); 2530 2531 rsu_write_1(sc, R92S_SYS_CLKR, 2532 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2533 2534 rsu_write_1(sc, 0xfe1c, 0x80); 2535 2536 /* Make sure TxDMA is ready to download firmware. */ 2537 for (ntries = 0; ntries < 20; ntries++) { 2538 reg = rsu_read_1(sc, R92S_TCR); 2539 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2540 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2541 break; 2542 rsu_ms_delay(sc, 1); 2543 } 2544 if (ntries == 20) { 2545 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2546 "%s: TxDMA is not ready\n", 2547 __func__); 2548 /* Reset TxDMA. */ 2549 reg = rsu_read_1(sc, R92S_CR); 2550 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2551 rsu_ms_delay(sc, 1); 2552 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2553 } 2554} 2555 2556static void 2557rsu_power_off(struct rsu_softc *sc) 2558{ 2559 /* Turn RF off. */ 2560 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2561 rsu_ms_delay(sc, 5); 2562 2563 /* Turn MAC off. */ 2564 /* Switch control path. */ 2565 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2566 /* Reset MACTOP. */ 2567 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2568 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2569 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2570 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2571 2572 /* Disable AFE PLL. */ 2573 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2574 /* Disable A15V. */ 2575 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2576 /* Disable eFuse 1.2V. */ 2577 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2578 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2579 /* Enable AFE macro block's bandgap and Mbias. */ 2580 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2581 /* Disable 1.6V LDO. */ 2582 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2583 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2584 2585 /* Firmware - tell it to switch things off */ 2586 (void) rsu_set_fw_power_state(sc, RSU_PWR_OFF); 2587} 2588 2589static int 2590rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2591{ 2592 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2593 struct rsu_data *data; 2594 struct r92s_tx_desc *txd; 2595 int mlen; 2596 2597 while (len > 0) { 2598 data = rsu_getbuf(sc); 2599 if (data == NULL) 2600 return (ENOMEM); 2601 txd = (struct r92s_tx_desc *)data->buf; 2602 memset(txd, 0, sizeof(*txd)); 2603 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2604 /* Last chunk. */ 2605 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2606 mlen = len; 2607 } else 2608 mlen = RSU_TXBUFSZ - sizeof(*txd); 2609 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2610 memcpy(&txd[1], buf, mlen); 2611 data->buflen = sizeof(*txd) + mlen; 2612 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2613 "%s: starting transfer %p\n", 2614 __func__, data); 2615 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2616 buf += mlen; 2617 len -= mlen; 2618 } 2619 usbd_transfer_start(sc->sc_xfer[which]); 2620 return (0); 2621} 2622 2623static int 2624rsu_load_firmware(struct rsu_softc *sc) 2625{ 2626 const struct r92s_fw_hdr *hdr; 2627 struct r92s_fw_priv *dmem; 2628 struct ieee80211com *ic = &sc->sc_ic; 2629 const uint8_t *imem, *emem; 2630 int imemsz, ememsz; 2631 const struct firmware *fw; 2632 size_t size; 2633 uint32_t reg; 2634 int ntries, error; 2635 2636 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2637 RSU_DPRINTF(sc, RSU_DEBUG_ANY, 2638 "%s: Firmware already loaded\n", 2639 __func__); 2640 return (0); 2641 } 2642 2643 RSU_UNLOCK(sc); 2644 /* Read firmware image from the filesystem. */ 2645 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2646 device_printf(sc->sc_dev, 2647 "%s: failed load firmware of file rsu-rtl8712fw\n", 2648 __func__); 2649 RSU_LOCK(sc); 2650 return (ENXIO); 2651 } 2652 RSU_LOCK(sc); 2653 size = fw->datasize; 2654 if (size < sizeof(*hdr)) { 2655 device_printf(sc->sc_dev, "firmware too short\n"); 2656 error = EINVAL; 2657 goto fail; 2658 } 2659 hdr = (const struct r92s_fw_hdr *)fw->data; 2660 if (hdr->signature != htole16(0x8712) && 2661 hdr->signature != htole16(0x8192)) { 2662 device_printf(sc->sc_dev, 2663 "invalid firmware signature 0x%x\n", 2664 le16toh(hdr->signature)); 2665 error = EINVAL; 2666 goto fail; 2667 } 2668 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2669 hdr->month, hdr->day, hdr->hour, hdr->minute); 2670 2671 /* Make sure that driver and firmware are in sync. */ 2672 if (hdr->privsz != htole32(sizeof(*dmem))) { 2673 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2674 error = EINVAL; 2675 goto fail; 2676 } 2677 /* Get FW sections sizes. */ 2678 imemsz = le32toh(hdr->imemsz); 2679 ememsz = le32toh(hdr->sramsz); 2680 /* Check that all FW sections fit in image. */ 2681 if (size < sizeof(*hdr) + imemsz + ememsz) { 2682 device_printf(sc->sc_dev, "firmware too short\n"); 2683 error = EINVAL; 2684 goto fail; 2685 } 2686 imem = (const uint8_t *)&hdr[1]; 2687 emem = imem + imemsz; 2688 2689 /* Load IMEM section. */ 2690 error = rsu_fw_loadsection(sc, imem, imemsz); 2691 if (error != 0) { 2692 device_printf(sc->sc_dev, 2693 "could not load firmware section %s\n", "IMEM"); 2694 goto fail; 2695 } 2696 /* Wait for load to complete. */ 2697 for (ntries = 0; ntries != 50; ntries++) { 2698 rsu_ms_delay(sc, 10); 2699 reg = rsu_read_1(sc, R92S_TCR); 2700 if (reg & R92S_TCR_IMEM_CODE_DONE) 2701 break; 2702 } 2703 if (ntries == 50) { 2704 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2705 error = ETIMEDOUT; 2706 goto fail; 2707 } 2708 /* Load EMEM section. */ 2709 error = rsu_fw_loadsection(sc, emem, ememsz); 2710 if (error != 0) { 2711 device_printf(sc->sc_dev, 2712 "could not load firmware section %s\n", "EMEM"); 2713 goto fail; 2714 } 2715 /* Wait for load to complete. */ 2716 for (ntries = 0; ntries != 50; ntries++) { 2717 rsu_ms_delay(sc, 10); 2718 reg = rsu_read_2(sc, R92S_TCR); 2719 if (reg & R92S_TCR_EMEM_CODE_DONE) 2720 break; 2721 } 2722 if (ntries == 50) { 2723 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2724 error = ETIMEDOUT; 2725 goto fail; 2726 } 2727 /* Enable CPU. */ 2728 rsu_write_1(sc, R92S_SYS_CLKR, 2729 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2730 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2731 device_printf(sc->sc_dev, "could not enable system clock\n"); 2732 error = EIO; 2733 goto fail; 2734 } 2735 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2736 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2737 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2738 device_printf(sc->sc_dev, 2739 "could not enable microcontroller\n"); 2740 error = EIO; 2741 goto fail; 2742 } 2743 /* Wait for CPU to initialize. */ 2744 for (ntries = 0; ntries < 100; ntries++) { 2745 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2746 break; 2747 rsu_ms_delay(sc, 1); 2748 } 2749 if (ntries == 100) { 2750 device_printf(sc->sc_dev, 2751 "timeout waiting for microcontroller\n"); 2752 error = ETIMEDOUT; 2753 goto fail; 2754 } 2755 2756 /* Update DMEM section before loading. */ 2757 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2758 memset(dmem, 0, sizeof(*dmem)); 2759 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2760 dmem->nendpoints = sc->sc_nendpoints; 2761 dmem->chip_version = sc->cut; 2762 dmem->rf_config = sc->sc_rftype; 2763 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2764 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2765 dmem->turbo_mode = 0; 2766 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2767 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2768 dmem->ampdu_en = !! (sc->sc_ht); 2769 dmem->agg_offload = !! (sc->sc_ht); 2770 dmem->qos_en = 1; 2771 dmem->ps_offload = 1; 2772 dmem->lowpower_mode = 1; /* XXX TODO: configurable? */ 2773 /* Load DMEM section. */ 2774 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2775 if (error != 0) { 2776 device_printf(sc->sc_dev, 2777 "could not load firmware section %s\n", "DMEM"); 2778 goto fail; 2779 } 2780 /* Wait for load to complete. */ 2781 for (ntries = 0; ntries < 100; ntries++) { 2782 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2783 break; 2784 rsu_ms_delay(sc, 1); 2785 } 2786 if (ntries == 100) { 2787 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2788 "DMEM"); 2789 error = ETIMEDOUT; 2790 goto fail; 2791 } 2792 /* Wait for firmware readiness. */ 2793 for (ntries = 0; ntries < 60; ntries++) { 2794 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2795 break; 2796 rsu_ms_delay(sc, 1); 2797 } 2798 if (ntries == 60) { 2799 device_printf(sc->sc_dev, 2800 "timeout waiting for firmware readiness\n"); 2801 error = ETIMEDOUT; 2802 goto fail; 2803 } 2804 fail: 2805 firmware_put(fw, FIRMWARE_UNLOAD); 2806 return (error); 2807} 2808 2809 2810static int 2811rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2812 const struct ieee80211_bpf_params *params) 2813{ 2814 struct ieee80211com *ic = ni->ni_ic; 2815 struct rsu_softc *sc = ic->ic_softc; 2816 struct rsu_data *bf; 2817 2818 /* prevent management frames from being sent if we're not ready */ 2819 if (!sc->sc_running) { 2820 m_freem(m); 2821 return (ENETDOWN); 2822 } 2823 RSU_LOCK(sc); 2824 bf = rsu_getbuf(sc); 2825 if (bf == NULL) { 2826 m_freem(m); 2827 RSU_UNLOCK(sc); 2828 return (ENOBUFS); 2829 } 2830 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2831 m_freem(m); 2832 rsu_freebuf(sc, bf); 2833 RSU_UNLOCK(sc); 2834 return (EIO); 2835 } 2836 RSU_UNLOCK(sc); 2837 2838 return (0); 2839} 2840 2841static void 2842rsu_init(struct rsu_softc *sc) 2843{ 2844 struct ieee80211com *ic = &sc->sc_ic; 2845 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2846 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2847 int error; 2848 int i; 2849 2850 RSU_ASSERT_LOCKED(sc); 2851 2852 /* Ensure the mbuf queue is drained */ 2853 rsu_drain_mbufq(sc); 2854 2855 /* Init host async commands ring. */ 2856 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2857 2858 /* Reset power management state. */ 2859 rsu_write_1(sc, R92S_USB_HRPWM, 0); 2860 2861 /* Power on adapter. */ 2862 if (sc->cut == 1) 2863 rsu_power_on_acut(sc); 2864 else 2865 rsu_power_on_bcut(sc); 2866 2867 /* Load firmware. */ 2868 error = rsu_load_firmware(sc); 2869 if (error != 0) 2870 goto fail; 2871 2872 /* Enable Rx TCP checksum offload. */ 2873 rsu_write_4(sc, R92S_RCR, 2874 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2875 /* Append PHY status. */ 2876 rsu_write_4(sc, R92S_RCR, 2877 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2878 2879 rsu_write_4(sc, R92S_CR, 2880 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2881 2882 /* Use 128 bytes pages. */ 2883 rsu_write_1(sc, 0x00b5, 2884 rsu_read_1(sc, 0x00b5) | 0x01); 2885 /* Enable USB Rx aggregation. */ 2886 rsu_write_1(sc, 0x00bd, 2887 rsu_read_1(sc, 0x00bd) | 0x80); 2888 /* Set USB Rx aggregation threshold. */ 2889 rsu_write_1(sc, 0x00d9, 0x01); 2890 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2891 rsu_write_1(sc, 0xfe5b, 0x04); 2892 /* Fix USB Rx FIFO issue. */ 2893 rsu_write_1(sc, 0xfe5c, 2894 rsu_read_1(sc, 0xfe5c) | 0x80); 2895 2896 /* Set MAC address. */ 2897 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2898 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2899 2900 /* It really takes 1.5 seconds for the firmware to boot: */ 2901 rsu_ms_delay(sc, 2000); 2902 2903 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2904 __func__, 2905 ether_sprintf(macaddr)); 2906 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2907 IEEE80211_ADDR_LEN); 2908 if (error != 0) { 2909 device_printf(sc->sc_dev, "could not set MAC address\n"); 2910 goto fail; 2911 } 2912 2913 /* Set PS mode fully active */ 2914 error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 2915 2916 if (error != 0) { 2917 device_printf(sc->sc_dev, "could not set PS mode\n"); 2918 goto fail; 2919 } 2920 2921 sc->sc_scan_pass = 0; 2922 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2923 2924 /* We're ready to go. */ 2925 sc->sc_running = 1; 2926 sc->sc_scanning = 0; 2927 return; 2928fail: 2929 /* Need to stop all failed transfers, if any */ 2930 for (i = 0; i != RSU_N_TRANSFER; i++) 2931 usbd_transfer_stop(sc->sc_xfer[i]); 2932} 2933 2934static void 2935rsu_stop(struct rsu_softc *sc) 2936{ 2937 int i; 2938 2939 RSU_ASSERT_LOCKED(sc); 2940 2941 sc->sc_running = 0; 2942 sc->sc_calibrating = 0; 2943 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2944 taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL); 2945 2946 /* Power off adapter. */ 2947 rsu_power_off(sc); 2948 2949 for (i = 0; i < RSU_N_TRANSFER; i++) 2950 usbd_transfer_stop(sc->sc_xfer[i]); 2951 2952 /* Ensure the mbuf queue is drained */ 2953 rsu_drain_mbufq(sc); 2954} 2955 2956/* 2957 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2958 * which breaks any kind of driver serialisation. 2959 */ 2960static void 2961rsu_ms_delay(struct rsu_softc *sc, int ms) 2962{ 2963 2964 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2965 DELAY(ms * 1000); 2966} 2967