if_rsu.c revision 288257
1/* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3/*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18#include <sys/cdefs.h> 19__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_rsu.c 288257 2015-09-26 07:25:53Z adrian $"); 20 21/* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o h/w crypto 26 * o hostap / ibss / mesh 27 * o sensible RSSI levels 28 * o power-save operation 29 */ 30 31#include <sys/param.h> 32#include <sys/endian.h> 33#include <sys/sockio.h> 34#include <sys/mbuf.h> 35#include <sys/kernel.h> 36#include <sys/socket.h> 37#include <sys/systm.h> 38#include <sys/conf.h> 39#include <sys/bus.h> 40#include <sys/rman.h> 41#include <sys/firmware.h> 42#include <sys/module.h> 43 44#include <machine/bus.h> 45#include <machine/resource.h> 46 47#include <net/bpf.h> 48#include <net/if.h> 49#include <net/if_var.h> 50#include <net/if_arp.h> 51#include <net/if_dl.h> 52#include <net/if_media.h> 53#include <net/if_types.h> 54 55#include <netinet/in.h> 56#include <netinet/in_systm.h> 57#include <netinet/in_var.h> 58#include <netinet/if_ether.h> 59#include <netinet/ip.h> 60 61#include <net80211/ieee80211_var.h> 62#include <net80211/ieee80211_regdomain.h> 63#include <net80211/ieee80211_radiotap.h> 64 65#include <dev/usb/usb.h> 66#include <dev/usb/usbdi.h> 67#include "usbdevs.h" 68 69#define USB_DEBUG_VAR rsu_debug 70#include <dev/usb/usb_debug.h> 71 72#include <dev/usb/wlan/if_rsureg.h> 73 74#ifdef USB_DEBUG 75static int rsu_debug = 0; 76SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 77SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 78 "Debug level"); 79#define RSU_DPRINTF(_sc, _flg, ...) \ 80 do \ 81 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 82 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 83 while (0) 84#else 85#define RSU_DPRINTF(_sc, _flg, ...) 86#endif 87 88static int rsu_enable_11n = 1; 89TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 90 91#define RSU_DEBUG_ANY 0xffffffff 92#define RSU_DEBUG_TX 0x00000001 93#define RSU_DEBUG_RX 0x00000002 94#define RSU_DEBUG_RESET 0x00000004 95#define RSU_DEBUG_CALIB 0x00000008 96#define RSU_DEBUG_STATE 0x00000010 97#define RSU_DEBUG_SCAN 0x00000020 98#define RSU_DEBUG_FWCMD 0x00000040 99#define RSU_DEBUG_TXDONE 0x00000080 100#define RSU_DEBUG_FW 0x00000100 101#define RSU_DEBUG_FWDBG 0x00000200 102#define RSU_DEBUG_AMPDU 0x00000400 103 104static const STRUCT_USB_HOST_ID rsu_devs[] = { 105#define RSU_HT_NOT_SUPPORTED 0 106#define RSU_HT_SUPPORTED 1 107#define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 108 RSU_HT_SUPPORTED) } 109#define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 110 RSU_HT_NOT_SUPPORTED) } 111 RSU_DEV(ASUS, RTL8192SU), 112 RSU_DEV(AZUREWAVE, RTL8192SU_4), 113 RSU_DEV_HT(ACCTON, RTL8192SU), 114 RSU_DEV_HT(ASUS, USBN10), 115 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 116 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 117 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 118 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 119 RSU_DEV_HT(BELKIN, RTL8192SU_1), 120 RSU_DEV_HT(BELKIN, RTL8192SU_2), 121 RSU_DEV_HT(BELKIN, RTL8192SU_3), 122 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 123 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 124 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 125 RSU_DEV_HT(COREGA, RTL8192SU), 126 RSU_DEV_HT(DLINK2, DWA131A1), 127 RSU_DEV_HT(DLINK2, RTL8192SU_1), 128 RSU_DEV_HT(DLINK2, RTL8192SU_2), 129 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 130 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 131 RSU_DEV_HT(EDIMAX, EW7622UMN), 132 RSU_DEV_HT(GUILLEMOT, HWGUN54), 133 RSU_DEV_HT(GUILLEMOT, HWNUM300), 134 RSU_DEV_HT(HAWKING, RTL8192SU_1), 135 RSU_DEV_HT(HAWKING, RTL8192SU_2), 136 RSU_DEV_HT(PLANEX2, GWUSNANO), 137 RSU_DEV_HT(REALTEK, RTL8171), 138 RSU_DEV_HT(REALTEK, RTL8172), 139 RSU_DEV_HT(REALTEK, RTL8173), 140 RSU_DEV_HT(REALTEK, RTL8174), 141 RSU_DEV_HT(REALTEK, RTL8192SU), 142 RSU_DEV_HT(REALTEK, RTL8712), 143 RSU_DEV_HT(REALTEK, RTL8713), 144 RSU_DEV_HT(SENAO, RTL8192SU_1), 145 RSU_DEV_HT(SENAO, RTL8192SU_2), 146 RSU_DEV_HT(SITECOMEU, WL349V1), 147 RSU_DEV_HT(SITECOMEU, WL353), 148 RSU_DEV_HT(SWEEX2, LW154), 149 RSU_DEV_HT(TRENDNET, TEW646UBH), 150#undef RSU_DEV_HT 151#undef RSU_DEV 152}; 153 154static device_probe_t rsu_match; 155static device_attach_t rsu_attach; 156static device_detach_t rsu_detach; 157static usb_callback_t rsu_bulk_tx_callback_be_bk; 158static usb_callback_t rsu_bulk_tx_callback_vi_vo; 159static usb_callback_t rsu_bulk_tx_callback_h2c; 160static usb_callback_t rsu_bulk_rx_callback; 161static usb_error_t rsu_do_request(struct rsu_softc *, 162 struct usb_device_request *, void *); 163static struct ieee80211vap * 164 rsu_vap_create(struct ieee80211com *, const char name[], 165 int, enum ieee80211_opmode, int, const uint8_t bssid[], 166 const uint8_t mac[]); 167static void rsu_vap_delete(struct ieee80211vap *); 168static void rsu_scan_start(struct ieee80211com *); 169static void rsu_scan_end(struct ieee80211com *); 170static void rsu_set_channel(struct ieee80211com *); 171static void rsu_update_mcast(struct ieee80211com *); 172static int rsu_alloc_rx_list(struct rsu_softc *); 173static void rsu_free_rx_list(struct rsu_softc *); 174static int rsu_alloc_tx_list(struct rsu_softc *); 175static void rsu_free_tx_list(struct rsu_softc *); 176static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 177static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 178static struct rsu_data *rsu_getbuf(struct rsu_softc *); 179static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 180static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 181 int); 182static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 183static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 184static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 185static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 186 int); 187static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 188static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 189static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 190static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 191static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 192static int rsu_read_rom(struct rsu_softc *); 193static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 194static void rsu_calib_task(void *, int); 195static void rsu_tx_task(void *, int); 196static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 197#ifdef notyet 198static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 199static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 200#endif 201static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 202static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 203static int rsu_disconnect(struct rsu_softc *); 204static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 205static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 206static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 207static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 208static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 209static struct mbuf * 210 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 211static struct mbuf * 212 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 213static struct mbuf * 214 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 215static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 216static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 217 const struct ieee80211_bpf_params *); 218static void rsu_init(struct rsu_softc *); 219static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 220 struct mbuf *, struct rsu_data *); 221static int rsu_transmit(struct ieee80211com *, struct mbuf *); 222static void rsu_start(struct rsu_softc *); 223static void _rsu_start(struct rsu_softc *); 224static void rsu_parent(struct ieee80211com *); 225static void rsu_stop(struct rsu_softc *); 226static void rsu_ms_delay(struct rsu_softc *, int); 227 228static device_method_t rsu_methods[] = { 229 DEVMETHOD(device_probe, rsu_match), 230 DEVMETHOD(device_attach, rsu_attach), 231 DEVMETHOD(device_detach, rsu_detach), 232 233 DEVMETHOD_END 234}; 235 236static driver_t rsu_driver = { 237 .name = "rsu", 238 .methods = rsu_methods, 239 .size = sizeof(struct rsu_softc) 240}; 241 242static devclass_t rsu_devclass; 243 244DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 245MODULE_DEPEND(rsu, wlan, 1, 1, 1); 246MODULE_DEPEND(rsu, usb, 1, 1, 1); 247MODULE_DEPEND(rsu, firmware, 1, 1, 1); 248MODULE_VERSION(rsu, 1); 249 250static uint8_t rsu_wme_ac_xfer_map[4] = { 251 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 252 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 253 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 254 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 255}; 256 257/* XXX hard-coded */ 258#define RSU_H2C_ENDPOINT 3 259 260static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 261 [RSU_BULK_RX] = { 262 .type = UE_BULK, 263 .endpoint = UE_ADDR_ANY, 264 .direction = UE_DIR_IN, 265 .bufsize = RSU_RXBUFSZ, 266 .flags = { 267 .pipe_bof = 1, 268 .short_xfer_ok = 1 269 }, 270 .callback = rsu_bulk_rx_callback 271 }, 272 [RSU_BULK_TX_BE_BK] = { 273 .type = UE_BULK, 274 .endpoint = 0x06, 275 .direction = UE_DIR_OUT, 276 .bufsize = RSU_TXBUFSZ, 277 .flags = { 278 .ext_buffer = 1, 279 .pipe_bof = 1, 280 .force_short_xfer = 1 281 }, 282 .callback = rsu_bulk_tx_callback_be_bk, 283 .timeout = RSU_TX_TIMEOUT 284 }, 285 [RSU_BULK_TX_VI_VO] = { 286 .type = UE_BULK, 287 .endpoint = 0x04, 288 .direction = UE_DIR_OUT, 289 .bufsize = RSU_TXBUFSZ, 290 .flags = { 291 .ext_buffer = 1, 292 .pipe_bof = 1, 293 .force_short_xfer = 1 294 }, 295 .callback = rsu_bulk_tx_callback_vi_vo, 296 .timeout = RSU_TX_TIMEOUT 297 }, 298 [RSU_BULK_TX_H2C] = { 299 .type = UE_BULK, 300 .endpoint = 0x0d, 301 .direction = UE_DIR_OUT, 302 .bufsize = RSU_TXBUFSZ, 303 .flags = { 304 .ext_buffer = 1, 305 .pipe_bof = 1, 306 .short_xfer_ok = 1 307 }, 308 .callback = rsu_bulk_tx_callback_h2c, 309 .timeout = RSU_TX_TIMEOUT 310 }, 311}; 312 313static int 314rsu_match(device_t self) 315{ 316 struct usb_attach_arg *uaa = device_get_ivars(self); 317 318 if (uaa->usb_mode != USB_MODE_HOST || 319 uaa->info.bIfaceIndex != 0 || 320 uaa->info.bConfigIndex != 0) 321 return (ENXIO); 322 323 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 324} 325 326static int 327rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 328{ 329 330 return (ENOTSUP); 331} 332 333static void 334rsu_update_chw(struct ieee80211com *ic) 335{ 336 337} 338 339/* 340 * notification from net80211 that it'd like to do A-MPDU on the given TID. 341 * 342 * Note: this actually hangs traffic at the present moment, so don't use it. 343 * The firmware debug does indiciate it's sending and establishing a TX AMPDU 344 * session, but then no traffic flows. 345 */ 346static int 347rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 348{ 349#if 0 350 struct rsu_softc *sc = ni->ni_ic->ic_softc; 351 struct r92s_add_ba_req req; 352 353 /* Don't enable if it's requested or running */ 354 if (IEEE80211_AMPDU_REQUESTED(tap)) 355 return (0); 356 if (IEEE80211_AMPDU_RUNNING(tap)) 357 return (0); 358 359 /* We've decided to send addba; so send it */ 360 req.tid = htole32(tap->txa_tid); 361 362 /* Attempt net80211 state */ 363 if (ieee80211_ampdu_tx_request_ext(ni, tap->txa_tid) != 1) 364 return (0); 365 366 /* Send the firmware command */ 367 RSU_DPRINTF(sc, RSU_DEBUG_AMPDU, "%s: establishing AMPDU TX for TID %d\n", 368 __func__, 369 tap->txa_tid); 370 371 RSU_LOCK(sc); 372 if (rsu_fw_cmd(sc, R92S_CMD_ADDBA_REQ, &req, sizeof(req)) != 1) { 373 RSU_UNLOCK(sc); 374 /* Mark failure */ 375 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 0); 376 return (0); 377 } 378 RSU_UNLOCK(sc); 379 380 /* Mark success; we don't get any further notifications */ 381 (void) ieee80211_ampdu_tx_request_active_ext(ni, tap->txa_tid, 1); 382#endif 383 /* Return 0, we're driving this ourselves */ 384 return (0); 385} 386 387static int 388rsu_wme_update(struct ieee80211com *ic) 389{ 390 391 /* Firmware handles this; not our problem */ 392 return (0); 393} 394 395static int 396rsu_attach(device_t self) 397{ 398 struct usb_attach_arg *uaa = device_get_ivars(self); 399 struct rsu_softc *sc = device_get_softc(self); 400 struct ieee80211com *ic = &sc->sc_ic; 401 int error; 402 uint8_t iface_index, bands; 403 struct usb_interface *iface; 404 405 device_set_usb_desc(self); 406 sc->sc_udev = uaa->device; 407 sc->sc_dev = self; 408 if (rsu_enable_11n) 409 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 410 411 /* Get number of endpoints */ 412 iface = usbd_get_iface(sc->sc_udev, 0); 413 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 414 415 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 416 if (sc->sc_nendpoints != 4) { 417 device_printf(sc->sc_dev, 418 "the driver currently only supports 4-endpoint devices\n"); 419 return (ENXIO); 420 } 421 422 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 423 MTX_DEF); 424 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 425 rsu_calib_task, sc); 426 TASK_INIT(&sc->tx_task, 0, rsu_tx_task, sc); 427 mbufq_init(&sc->sc_snd, ifqmaxlen); 428 429 /* Allocate Tx/Rx buffers. */ 430 error = rsu_alloc_rx_list(sc); 431 if (error != 0) { 432 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 433 goto fail_usb; 434 } 435 436 error = rsu_alloc_tx_list(sc); 437 if (error != 0) { 438 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 439 rsu_free_rx_list(sc); 440 goto fail_usb; 441 } 442 443 iface_index = 0; 444 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 445 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 446 if (error) { 447 device_printf(sc->sc_dev, 448 "could not allocate USB transfers, err=%s\n", 449 usbd_errstr(error)); 450 goto fail_usb; 451 } 452 RSU_LOCK(sc); 453 /* Read chip revision. */ 454 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 455 if (sc->cut != 3) 456 sc->cut = (sc->cut >> 1) + 1; 457 error = rsu_read_rom(sc); 458 RSU_UNLOCK(sc); 459 if (error != 0) { 460 device_printf(self, "could not read ROM\n"); 461 goto fail_rom; 462 } 463 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 464 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 465 466 ic->ic_softc = sc; 467 ic->ic_name = device_get_nameunit(self); 468 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 469 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 470 471 /* Set device capabilities. */ 472 ic->ic_caps = 473 IEEE80211_C_STA | /* station mode */ 474#if 0 475 IEEE80211_C_BGSCAN | /* Background scan. */ 476#endif 477 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 478 IEEE80211_C_WME | /* WME/QoS */ 479 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 480 IEEE80211_C_WPA; /* WPA/RSN. */ 481 482 /* Check if HT support is present. */ 483 if (sc->sc_ht) { 484 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 485 486 /* Enable basic HT */ 487 ic->ic_htcaps = IEEE80211_HTC_HT | 488 IEEE80211_HTC_AMPDU | 489 IEEE80211_HTC_AMSDU | 490 IEEE80211_HTCAP_MAXAMSDU_3839 | 491 IEEE80211_HTCAP_SMPS_OFF; 492 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 493 494 /* set number of spatial streams */ 495 ic->ic_txstream = 1; 496 ic->ic_rxstream = 1; 497 } 498 499 /* Set supported .11b and .11g rates. */ 500 bands = 0; 501 setbit(&bands, IEEE80211_MODE_11B); 502 setbit(&bands, IEEE80211_MODE_11G); 503 if (sc->sc_ht) 504 setbit(&bands, IEEE80211_MODE_11NG); 505 ieee80211_init_channels(ic, NULL, &bands); 506 507 ieee80211_ifattach(ic); 508 ic->ic_raw_xmit = rsu_raw_xmit; 509 ic->ic_scan_start = rsu_scan_start; 510 ic->ic_scan_end = rsu_scan_end; 511 ic->ic_set_channel = rsu_set_channel; 512 ic->ic_vap_create = rsu_vap_create; 513 ic->ic_vap_delete = rsu_vap_delete; 514 ic->ic_update_mcast = rsu_update_mcast; 515 ic->ic_parent = rsu_parent; 516 ic->ic_transmit = rsu_transmit; 517 ic->ic_send_mgmt = rsu_send_mgmt; 518 ic->ic_update_chw = rsu_update_chw; 519 ic->ic_ampdu_enable = rsu_ampdu_enable; 520 ic->ic_wme.wme_update = rsu_wme_update; 521 522 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 523 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 524 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 525 RSU_RX_RADIOTAP_PRESENT); 526 527 if (bootverbose) 528 ieee80211_announce(ic); 529 530 return (0); 531 532fail_rom: 533 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 534fail_usb: 535 mtx_destroy(&sc->sc_mtx); 536 return (ENXIO); 537} 538 539static int 540rsu_detach(device_t self) 541{ 542 struct rsu_softc *sc = device_get_softc(self); 543 struct ieee80211com *ic = &sc->sc_ic; 544 545 RSU_LOCK(sc); 546 rsu_stop(sc); 547 RSU_UNLOCK(sc); 548 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 549 550 /* Frames are freed; detach from net80211 */ 551 ieee80211_ifdetach(ic); 552 553 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 554 taskqueue_drain(taskqueue_thread, &sc->tx_task); 555 556 /* Free Tx/Rx buffers. */ 557 rsu_free_tx_list(sc); 558 rsu_free_rx_list(sc); 559 560 mtx_destroy(&sc->sc_mtx); 561 562 return (0); 563} 564 565static usb_error_t 566rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 567 void *data) 568{ 569 usb_error_t err; 570 int ntries = 10; 571 572 RSU_ASSERT_LOCKED(sc); 573 574 while (ntries--) { 575 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 576 req, data, 0, NULL, 250 /* ms */); 577 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 578 break; 579 DPRINTFN(1, "Control request failed, %s (retrying)\n", 580 usbd_errstr(err)); 581 rsu_ms_delay(sc, 10); 582 } 583 584 return (err); 585} 586 587static struct ieee80211vap * 588rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 589 enum ieee80211_opmode opmode, int flags, 590 const uint8_t bssid[IEEE80211_ADDR_LEN], 591 const uint8_t mac[IEEE80211_ADDR_LEN]) 592{ 593 struct rsu_vap *uvp; 594 struct ieee80211vap *vap; 595 596 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 597 return (NULL); 598 599 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 600 vap = &uvp->vap; 601 602 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 603 flags, bssid) != 0) { 604 /* out of memory */ 605 free(uvp, M_80211_VAP); 606 return (NULL); 607 } 608 609 /* override state transition machine */ 610 uvp->newstate = vap->iv_newstate; 611 vap->iv_newstate = rsu_newstate; 612 613 /* Limits from the r92su driver */ 614 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 615 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 616 617 /* complete setup */ 618 ieee80211_vap_attach(vap, ieee80211_media_change, 619 ieee80211_media_status, mac); 620 ic->ic_opmode = opmode; 621 622 return (vap); 623} 624 625static void 626rsu_vap_delete(struct ieee80211vap *vap) 627{ 628 struct rsu_vap *uvp = RSU_VAP(vap); 629 630 ieee80211_vap_detach(vap); 631 free(uvp, M_80211_VAP); 632} 633 634static void 635rsu_scan_start(struct ieee80211com *ic) 636{ 637 struct rsu_softc *sc = ic->ic_softc; 638 int error; 639 640 /* Scanning is done by the firmware. */ 641 RSU_LOCK(sc); 642 /* XXX TODO: force awake if in in network-sleep? */ 643 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 644 RSU_UNLOCK(sc); 645 if (error != 0) 646 device_printf(sc->sc_dev, 647 "could not send site survey command\n"); 648} 649 650static void 651rsu_scan_end(struct ieee80211com *ic) 652{ 653 /* Nothing to do here. */ 654} 655 656static void 657rsu_set_channel(struct ieee80211com *ic __unused) 658{ 659 /* We are unable to switch channels, yet. */ 660} 661 662static void 663rsu_update_mcast(struct ieee80211com *ic) 664{ 665 /* XXX do nothing? */ 666} 667 668static int 669rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 670 int ndata, int maxsz) 671{ 672 int i, error; 673 674 for (i = 0; i < ndata; i++) { 675 struct rsu_data *dp = &data[i]; 676 dp->sc = sc; 677 dp->m = NULL; 678 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 679 if (dp->buf == NULL) { 680 device_printf(sc->sc_dev, 681 "could not allocate buffer\n"); 682 error = ENOMEM; 683 goto fail; 684 } 685 dp->ni = NULL; 686 } 687 688 return (0); 689fail: 690 rsu_free_list(sc, data, ndata); 691 return (error); 692} 693 694static int 695rsu_alloc_rx_list(struct rsu_softc *sc) 696{ 697 int error, i; 698 699 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 700 RSU_RXBUFSZ); 701 if (error != 0) 702 return (error); 703 704 STAILQ_INIT(&sc->sc_rx_active); 705 STAILQ_INIT(&sc->sc_rx_inactive); 706 707 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 708 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 709 710 return (0); 711} 712 713static int 714rsu_alloc_tx_list(struct rsu_softc *sc) 715{ 716 int error, i; 717 718 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 719 RSU_TXBUFSZ); 720 if (error != 0) 721 return (error); 722 723 STAILQ_INIT(&sc->sc_tx_inactive); 724 725 for (i = 0; i != RSU_N_TRANSFER; i++) { 726 STAILQ_INIT(&sc->sc_tx_active[i]); 727 STAILQ_INIT(&sc->sc_tx_pending[i]); 728 } 729 730 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 731 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 732 } 733 734 return (0); 735} 736 737static void 738rsu_free_tx_list(struct rsu_softc *sc) 739{ 740 int i; 741 742 /* prevent further allocations from TX list(s) */ 743 STAILQ_INIT(&sc->sc_tx_inactive); 744 745 for (i = 0; i != RSU_N_TRANSFER; i++) { 746 STAILQ_INIT(&sc->sc_tx_active[i]); 747 STAILQ_INIT(&sc->sc_tx_pending[i]); 748 } 749 750 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 751} 752 753static void 754rsu_free_rx_list(struct rsu_softc *sc) 755{ 756 /* prevent further allocations from RX list(s) */ 757 STAILQ_INIT(&sc->sc_rx_inactive); 758 STAILQ_INIT(&sc->sc_rx_active); 759 760 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 761} 762 763static void 764rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 765{ 766 int i; 767 768 for (i = 0; i < ndata; i++) { 769 struct rsu_data *dp = &data[i]; 770 771 if (dp->buf != NULL) { 772 free(dp->buf, M_USBDEV); 773 dp->buf = NULL; 774 } 775 if (dp->ni != NULL) { 776 ieee80211_free_node(dp->ni); 777 dp->ni = NULL; 778 } 779 } 780} 781 782static struct rsu_data * 783_rsu_getbuf(struct rsu_softc *sc) 784{ 785 struct rsu_data *bf; 786 787 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 788 if (bf != NULL) 789 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 790 else 791 bf = NULL; 792 return (bf); 793} 794 795static struct rsu_data * 796rsu_getbuf(struct rsu_softc *sc) 797{ 798 struct rsu_data *bf; 799 800 RSU_ASSERT_LOCKED(sc); 801 802 bf = _rsu_getbuf(sc); 803 if (bf == NULL) { 804 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: no buffers\n", __func__); 805 } 806 return (bf); 807} 808 809static void 810rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 811{ 812 813 RSU_ASSERT_LOCKED(sc); 814 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 815} 816 817static int 818rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 819 int len) 820{ 821 usb_device_request_t req; 822 823 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 824 req.bRequest = R92S_REQ_REGS; 825 USETW(req.wValue, addr); 826 USETW(req.wIndex, 0); 827 USETW(req.wLength, len); 828 829 return (rsu_do_request(sc, &req, buf)); 830} 831 832static void 833rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 834{ 835 rsu_write_region_1(sc, addr, &val, 1); 836} 837 838static void 839rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 840{ 841 val = htole16(val); 842 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 843} 844 845static void 846rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 847{ 848 val = htole32(val); 849 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 850} 851 852static int 853rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 854 int len) 855{ 856 usb_device_request_t req; 857 858 req.bmRequestType = UT_READ_VENDOR_DEVICE; 859 req.bRequest = R92S_REQ_REGS; 860 USETW(req.wValue, addr); 861 USETW(req.wIndex, 0); 862 USETW(req.wLength, len); 863 864 return (rsu_do_request(sc, &req, buf)); 865} 866 867static uint8_t 868rsu_read_1(struct rsu_softc *sc, uint16_t addr) 869{ 870 uint8_t val; 871 872 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 873 return (0xff); 874 return (val); 875} 876 877static uint16_t 878rsu_read_2(struct rsu_softc *sc, uint16_t addr) 879{ 880 uint16_t val; 881 882 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 883 return (0xffff); 884 return (le16toh(val)); 885} 886 887static uint32_t 888rsu_read_4(struct rsu_softc *sc, uint16_t addr) 889{ 890 uint32_t val; 891 892 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 893 return (0xffffffff); 894 return (le32toh(val)); 895} 896 897static int 898rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 899{ 900 int ntries; 901 902 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 903 rsu_ms_delay(sc, 1); 904 for (ntries = 0; ntries < 50; ntries++) { 905 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 906 return (0); 907 rsu_ms_delay(sc, 1); 908 } 909 return (ETIMEDOUT); 910} 911 912static uint8_t 913rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 914{ 915 uint32_t reg; 916 int ntries; 917 918 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 919 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 920 reg &= ~R92S_EFUSE_CTRL_VALID; 921 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 922 /* Wait for read operation to complete. */ 923 for (ntries = 0; ntries < 100; ntries++) { 924 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 925 if (reg & R92S_EFUSE_CTRL_VALID) 926 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 927 rsu_ms_delay(sc, 1); 928 } 929 device_printf(sc->sc_dev, 930 "could not read efuse byte at address 0x%x\n", addr); 931 return (0xff); 932} 933 934static int 935rsu_read_rom(struct rsu_softc *sc) 936{ 937 uint8_t *rom = sc->rom; 938 uint16_t addr = 0; 939 uint32_t reg; 940 uint8_t off, msk; 941 int i; 942 943 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 944 reg = rsu_read_1(sc, R92S_EE_9346CR); 945 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 946 return (EIO); 947 948 /* Turn on 2.5V to prevent eFuse leakage. */ 949 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 950 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 951 rsu_ms_delay(sc, 1); 952 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 953 954 /* Read full ROM image. */ 955 memset(&sc->rom, 0xff, sizeof(sc->rom)); 956 while (addr < 512) { 957 reg = rsu_efuse_read_1(sc, addr); 958 if (reg == 0xff) 959 break; 960 addr++; 961 off = reg >> 4; 962 msk = reg & 0xf; 963 for (i = 0; i < 4; i++) { 964 if (msk & (1 << i)) 965 continue; 966 rom[off * 8 + i * 2 + 0] = 967 rsu_efuse_read_1(sc, addr); 968 addr++; 969 rom[off * 8 + i * 2 + 1] = 970 rsu_efuse_read_1(sc, addr); 971 addr++; 972 } 973 } 974#ifdef USB_DEBUG 975 if (rsu_debug >= 5) { 976 /* Dump ROM content. */ 977 printf("\n"); 978 for (i = 0; i < sizeof(sc->rom); i++) 979 printf("%02x:", rom[i]); 980 printf("\n"); 981 } 982#endif 983 return (0); 984} 985 986static int 987rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 988{ 989 const uint8_t which = RSU_H2C_ENDPOINT; 990 struct rsu_data *data; 991 struct r92s_tx_desc *txd; 992 struct r92s_fw_cmd_hdr *cmd; 993 int cmdsz; 994 int xferlen; 995 996 RSU_ASSERT_LOCKED(sc); 997 998 data = rsu_getbuf(sc); 999 if (data == NULL) 1000 return (ENOMEM); 1001 1002 /* Blank the entire payload, just to be safe */ 1003 memset(data->buf, '\0', RSU_TXBUFSZ); 1004 1005 /* Round-up command length to a multiple of 8 bytes. */ 1006 /* XXX TODO: is this required? */ 1007 cmdsz = (len + 7) & ~7; 1008 1009 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 1010 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 1011 memset(data->buf, 0, xferlen); 1012 1013 /* Setup Tx descriptor. */ 1014 txd = (struct r92s_tx_desc *)data->buf; 1015 txd->txdw0 = htole32( 1016 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1017 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 1018 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1019 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 1020 1021 /* Setup command header. */ 1022 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 1023 cmd->len = htole16(cmdsz); 1024 cmd->code = code; 1025 cmd->seq = sc->cmd_seq; 1026 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 1027 1028 /* Copy command payload. */ 1029 memcpy(&cmd[1], buf, len); 1030 1031 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 1032 "%s: Tx cmd code=0x%x len=0x%x\n", 1033 __func__, code, cmdsz); 1034 data->buflen = xferlen; 1035 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1036 usbd_transfer_start(sc->sc_xfer[which]); 1037 1038 return (0); 1039} 1040 1041/* ARGSUSED */ 1042static void 1043rsu_calib_task(void *arg, int pending __unused) 1044{ 1045 struct rsu_softc *sc = arg; 1046 uint32_t reg; 1047 1048 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1049 __func__); 1050 1051 RSU_LOCK(sc); 1052#ifdef notyet 1053 /* Read WPS PBC status. */ 1054 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1055 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1056 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1057 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1058 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1059 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1060 DPRINTF(("WPS PBC is pushed\n")); 1061#endif 1062 /* Read current signal level. */ 1063 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1064 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 1065 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d%%\n", 1066 __func__, reg >> 4); 1067 } 1068 if (sc->sc_calibrating) 1069 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1070 RSU_UNLOCK(sc); 1071} 1072 1073static void 1074rsu_tx_task(void *arg, int pending __unused) 1075{ 1076 struct rsu_softc *sc = arg; 1077 1078 RSU_LOCK(sc); 1079 _rsu_start(sc); 1080 RSU_UNLOCK(sc); 1081} 1082 1083#define RSU_PWR_UNKNOWN 0x0 1084#define RSU_PWR_ACTIVE 0x1 1085#define RSU_PWR_OFF 0x2 1086#define RSU_PWR_SLEEP 0x3 1087 1088/* 1089 * Set the current power state. 1090 * 1091 * The rtlwifi code doesn't do this so aggressively; it 1092 * waits for an idle period after association with 1093 * no traffic before doing this. 1094 * 1095 * For now - it's on in all states except RUN, and 1096 * in RUN it'll transition to allow sleep. 1097 */ 1098 1099struct r92s_pwr_cmd { 1100 uint8_t mode; 1101 uint8_t smart_ps; 1102 uint8_t bcn_pass_time; 1103}; 1104 1105static int 1106rsu_set_fw_power_state(struct rsu_softc *sc, int state) 1107{ 1108 struct r92s_set_pwr_mode cmd; 1109 //struct r92s_pwr_cmd cmd; 1110 int error; 1111 1112 RSU_ASSERT_LOCKED(sc); 1113 1114 /* only change state if required */ 1115 if (sc->sc_curpwrstate == state) 1116 return (0); 1117 1118 memset(&cmd, 0, sizeof(cmd)); 1119 1120 switch (state) { 1121 case RSU_PWR_ACTIVE: 1122 /* Force the hardware awake */ 1123 rsu_write_1(sc, R92S_USB_HRPWM, 1124 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 1125 cmd.mode = R92S_PS_MODE_ACTIVE; 1126 break; 1127 case RSU_PWR_SLEEP: 1128 cmd.mode = R92S_PS_MODE_DTIM; /* XXX configurable? */ 1129 cmd.smart_ps = 1; /* XXX 2 if doing p2p */ 1130 cmd.bcn_pass_time = 5; /* in 100mS usb.c, linux/rtlwifi */ 1131 break; 1132 case RSU_PWR_OFF: 1133 cmd.mode = R92S_PS_MODE_RADIOOFF; 1134 break; 1135 default: 1136 device_printf(sc->sc_dev, "%s: unknown ps mode (%d)\n", 1137 __func__, 1138 state); 1139 return (ENXIO); 1140 } 1141 1142 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1143 "%s: setting ps mode to %d (mode %d)\n", 1144 __func__, state, cmd.mode); 1145 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 1146 if (error == 0) 1147 sc->sc_curpwrstate = state; 1148 1149 return (error); 1150} 1151 1152static int 1153rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1154{ 1155 struct rsu_vap *uvp = RSU_VAP(vap); 1156 struct ieee80211com *ic = vap->iv_ic; 1157 struct rsu_softc *sc = ic->ic_softc; 1158 struct ieee80211_node *ni; 1159 struct ieee80211_rateset *rs; 1160 enum ieee80211_state ostate; 1161 int error, startcal = 0; 1162 1163 ostate = vap->iv_state; 1164 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1165 __func__, 1166 ieee80211_state_name[ostate], 1167 ieee80211_state_name[nstate]); 1168 1169 IEEE80211_UNLOCK(ic); 1170 if (ostate == IEEE80211_S_RUN) { 1171 RSU_LOCK(sc); 1172 /* Stop calibration. */ 1173 sc->sc_calibrating = 0; 1174 RSU_UNLOCK(sc); 1175 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1176 taskqueue_drain(taskqueue_thread, &sc->tx_task); 1177 /* Disassociate from our current BSS. */ 1178 RSU_LOCK(sc); 1179 rsu_disconnect(sc); 1180 } else 1181 RSU_LOCK(sc); 1182 switch (nstate) { 1183 case IEEE80211_S_INIT: 1184 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1185 break; 1186 case IEEE80211_S_AUTH: 1187 ni = ieee80211_ref_node(vap->iv_bss); 1188 (void) rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 1189 error = rsu_join_bss(sc, ni); 1190 ieee80211_free_node(ni); 1191 if (error != 0) { 1192 device_printf(sc->sc_dev, 1193 "could not send join command\n"); 1194 } 1195 break; 1196 case IEEE80211_S_RUN: 1197 ni = ieee80211_ref_node(vap->iv_bss); 1198 rs = &ni->ni_rates; 1199 /* Indicate highest supported rate. */ 1200 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1201 (void) rsu_set_fw_power_state(sc, RSU_PWR_SLEEP); 1202 ieee80211_free_node(ni); 1203 startcal = 1; 1204 break; 1205 default: 1206 break; 1207 } 1208 sc->sc_calibrating = 1; 1209 /* Start periodic calibration. */ 1210 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1211 RSU_UNLOCK(sc); 1212 IEEE80211_LOCK(ic); 1213 return (uvp->newstate(vap, nstate, arg)); 1214} 1215 1216#ifdef notyet 1217static void 1218rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1219{ 1220 struct r92s_fw_cmd_set_key key; 1221 1222 memset(&key, 0, sizeof(key)); 1223 /* Map net80211 cipher to HW crypto algorithm. */ 1224 switch (k->wk_cipher->ic_cipher) { 1225 case IEEE80211_CIPHER_WEP: 1226 if (k->wk_keylen < 8) 1227 key.algo = R92S_KEY_ALGO_WEP40; 1228 else 1229 key.algo = R92S_KEY_ALGO_WEP104; 1230 break; 1231 case IEEE80211_CIPHER_TKIP: 1232 key.algo = R92S_KEY_ALGO_TKIP; 1233 break; 1234 case IEEE80211_CIPHER_AES_CCM: 1235 key.algo = R92S_KEY_ALGO_AES; 1236 break; 1237 default: 1238 return; 1239 } 1240 key.id = k->wk_keyix; 1241 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1242 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1243 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1244} 1245 1246static void 1247rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1248{ 1249 struct r92s_fw_cmd_set_key key; 1250 1251 memset(&key, 0, sizeof(key)); 1252 key.id = k->wk_keyix; 1253 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1254} 1255#endif 1256 1257static int 1258rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1259{ 1260 struct r92s_fw_cmd_sitesurvey cmd; 1261 struct ieee80211com *ic = &sc->sc_ic; 1262 int r; 1263 1264 RSU_ASSERT_LOCKED(sc); 1265 1266 memset(&cmd, 0, sizeof(cmd)); 1267 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1268 cmd.active = htole32(1); 1269 cmd.limit = htole32(48); 1270 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1271 /* Do a directed scan for second pass. */ 1272 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1273 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1274 vap->iv_des_ssid[0].len); 1275 1276 } 1277 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1278 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1279 if (r == 0) { 1280 sc->sc_scanning = 1; 1281 } 1282 return (r); 1283} 1284 1285static int 1286rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1287{ 1288 struct ieee80211com *ic = &sc->sc_ic; 1289 struct ieee80211vap *vap = ni->ni_vap; 1290 struct ndis_wlan_bssid_ex *bss; 1291 struct ndis_802_11_fixed_ies *fixed; 1292 struct r92s_fw_cmd_auth auth; 1293 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1294 uint8_t *frm; 1295 uint8_t opmode; 1296 int error; 1297 int cnt; 1298 char *msg = "rsujoin"; 1299 1300 RSU_ASSERT_LOCKED(sc); 1301 1302 /* 1303 * Until net80211 scanning doesn't automatically finish 1304 * before we tell it to, let's just wait until any pending 1305 * scan is done. 1306 * 1307 * XXX TODO: yes, this releases and re-acquires the lock. 1308 * We should re-verify the state whenever we re-attempt this! 1309 */ 1310 cnt = 0; 1311 while (sc->sc_scanning && cnt < 10) { 1312 device_printf(sc->sc_dev, 1313 "%s: still scanning! (attempt %d)\n", 1314 __func__, cnt); 1315 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1316 cnt++; 1317 } 1318 1319 /* Let the FW decide the opmode based on the capinfo field. */ 1320 opmode = NDIS802_11AUTOUNKNOWN; 1321 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1322 "%s: setting operating mode to %d\n", 1323 __func__, opmode); 1324 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1325 if (error != 0) 1326 return (error); 1327 1328 memset(&auth, 0, sizeof(auth)); 1329 if (vap->iv_flags & IEEE80211_F_WPA) { 1330 auth.mode = R92S_AUTHMODE_WPA; 1331 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1332 } else 1333 auth.mode = R92S_AUTHMODE_OPEN; 1334 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1335 "%s: setting auth mode to %d\n", 1336 __func__, auth.mode); 1337 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1338 if (error != 0) 1339 return (error); 1340 1341 memset(buf, 0, sizeof(buf)); 1342 bss = (struct ndis_wlan_bssid_ex *)buf; 1343 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1344 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1345 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1346 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1347 bss->privacy = htole32(1); 1348 bss->rssi = htole32(ni->ni_avgrssi); 1349 if (ic->ic_curmode == IEEE80211_MODE_11B) 1350 bss->networktype = htole32(NDIS802_11DS); 1351 else 1352 bss->networktype = htole32(NDIS802_11OFDM24); 1353 bss->config.len = htole32(sizeof(bss->config)); 1354 bss->config.bintval = htole32(ni->ni_intval); 1355 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1356 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1357 /* XXX verify how this is supposed to look! */ 1358 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1359 ni->ni_rates.rs_nrates); 1360 /* Write the fixed fields of the beacon frame. */ 1361 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1362 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1363 fixed->bintval = htole16(ni->ni_intval); 1364 fixed->capabilities = htole16(ni->ni_capinfo); 1365 /* Write IEs to be included in the association request. */ 1366 frm = (uint8_t *)&fixed[1]; 1367 frm = ieee80211_add_rsn(frm, vap); 1368 frm = ieee80211_add_wpa(frm, vap); 1369 frm = ieee80211_add_qos(frm, ni); 1370 if ((ic->ic_flags & IEEE80211_F_WME) && 1371 (ni->ni_ies.wme_ie != NULL)) 1372 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1373 if (ni->ni_flags & IEEE80211_NODE_HT) { 1374 frm = ieee80211_add_htcap(frm, ni); 1375 frm = ieee80211_add_htinfo(frm, ni); 1376 } 1377 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1378 bss->len = htole32(((frm - buf) + 3) & ~3); 1379 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1380 "%s: sending join bss command to %s chan %d\n", 1381 __func__, 1382 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1383 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1384} 1385 1386static int 1387rsu_disconnect(struct rsu_softc *sc) 1388{ 1389 uint32_t zero = 0; /* :-) */ 1390 1391 /* Disassociate from our current BSS. */ 1392 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1393 "%s: sending disconnect command\n", __func__); 1394 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1395} 1396 1397static void 1398rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1399{ 1400 struct ieee80211com *ic = &sc->sc_ic; 1401 struct ieee80211_frame *wh; 1402 struct ndis_wlan_bssid_ex *bss; 1403 struct ieee80211_rx_stats rxs; 1404 struct mbuf *m; 1405 int pktlen; 1406 1407 if (__predict_false(len < sizeof(*bss))) 1408 return; 1409 bss = (struct ndis_wlan_bssid_ex *)buf; 1410 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1411 return; 1412 1413 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1414 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1415 "networktype=%d privacy=%d, RSSI=%d\n", 1416 __func__, 1417 ether_sprintf(bss->macaddr), le32toh(bss->len), 1418 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1419 le32toh(bss->networktype), le32toh(bss->privacy), 1420 le32toh(bss->rssi)); 1421 1422 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1423 /* XXX TODO: just call the new scan API methods! */ 1424 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1425 if (__predict_false(pktlen > MCLBYTES)) 1426 return; 1427 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1428 if (__predict_false(m == NULL)) 1429 return; 1430 wh = mtod(m, struct ieee80211_frame *); 1431 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1432 IEEE80211_FC0_SUBTYPE_BEACON; 1433 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1434 USETW(wh->i_dur, 0); 1435 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1436 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1437 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1438 *(uint16_t *)wh->i_seq = 0; 1439 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1440 1441 /* Finalize mbuf. */ 1442 m->m_pkthdr.len = m->m_len = pktlen; 1443 1444 /* Set channel flags for input path */ 1445 bzero(&rxs, sizeof(rxs)); 1446 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1447 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1448 rxs.c_ieee = le32toh(bss->config.dsconfig); 1449 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1450 rxs.rssi = le32toh(bss->rssi); 1451 rxs.nf = 0; /* XXX */ 1452 1453 /* XXX avoid a LOR */ 1454 RSU_UNLOCK(sc); 1455 ieee80211_input_mimo_all(ic, m, &rxs); 1456 RSU_LOCK(sc); 1457} 1458 1459static void 1460rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1461{ 1462 struct ieee80211com *ic = &sc->sc_ic; 1463 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1464 struct ieee80211_node *ni = vap->iv_bss; 1465 struct r92s_event_join_bss *rsp; 1466 uint32_t tmp; 1467 int res; 1468 1469 if (__predict_false(len < sizeof(*rsp))) 1470 return; 1471 rsp = (struct r92s_event_join_bss *)buf; 1472 res = (int)le32toh(rsp->join_res); 1473 1474 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1475 "%s: Rx join BSS event len=%d res=%d\n", 1476 __func__, len, res); 1477 1478 /* 1479 * XXX Don't do this; there's likely a better way to tell 1480 * the caller we failed. 1481 */ 1482 if (res <= 0) { 1483 RSU_UNLOCK(sc); 1484 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1485 RSU_LOCK(sc); 1486 return; 1487 } 1488 1489 tmp = le32toh(rsp->associd); 1490 if (tmp >= vap->iv_max_aid) { 1491 DPRINTF("Assoc ID overflow\n"); 1492 tmp = 1; 1493 } 1494 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1495 "%s: associated with %s associd=%d\n", 1496 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1497 /* XXX is this required? What's the top two bits for again? */ 1498 ni->ni_associd = tmp | 0xc000; 1499 RSU_UNLOCK(sc); 1500 ieee80211_new_state(vap, IEEE80211_S_RUN, 1501 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1502 RSU_LOCK(sc); 1503} 1504 1505static void 1506rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1507{ 1508 struct ieee80211com *ic = &sc->sc_ic; 1509 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1510 struct r92s_add_ba_event *ba = (void *) buf; 1511 struct ieee80211_node *ni; 1512 1513 if (len < sizeof(*ba)) { 1514 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1515 return; 1516 } 1517 1518 if (vap == NULL) 1519 return; 1520 1521 device_printf(sc->sc_dev, "%s: mac=%s, tid=%d, ssn=%d\n", 1522 __func__, 1523 ether_sprintf(ba->mac_addr), 1524 (int) ba->tid, 1525 (int) le16toh(ba->ssn)); 1526 1527 /* XXX do node lookup; this is STA specific */ 1528 1529 ni = ieee80211_ref_node(vap->iv_bss); 1530 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1531 ieee80211_free_node(ni); 1532} 1533 1534static void 1535rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1536{ 1537 struct ieee80211com *ic = &sc->sc_ic; 1538 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1539 1540 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1541 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1542 switch (code) { 1543 case R92S_EVT_SURVEY: 1544 rsu_event_survey(sc, buf, len); 1545 break; 1546 case R92S_EVT_SURVEY_DONE: 1547 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1548 "%s: site survey pass %d done, found %d BSS\n", 1549 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1550 sc->sc_scanning = 0; 1551 if (vap->iv_state != IEEE80211_S_SCAN) 1552 break; /* Ignore if not scanning. */ 1553 1554 /* 1555 * XXX TODO: This needs to be done without a transition to 1556 * the SCAN state again. Grr. 1557 */ 1558 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1559 /* Schedule a directed scan for hidden APs. */ 1560 /* XXX bad! */ 1561 sc->sc_scan_pass = 1; 1562 RSU_UNLOCK(sc); 1563 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1564 RSU_LOCK(sc); 1565 break; 1566 } 1567 sc->sc_scan_pass = 0; 1568 break; 1569 case R92S_EVT_JOIN_BSS: 1570 if (vap->iv_state == IEEE80211_S_AUTH) 1571 rsu_event_join_bss(sc, buf, len); 1572 break; 1573 case R92S_EVT_DEL_STA: 1574 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1575 "%s: disassociated from %s\n", __func__, 1576 ether_sprintf(buf)); 1577 if (vap->iv_state == IEEE80211_S_RUN && 1578 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1579 RSU_UNLOCK(sc); 1580 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1581 RSU_LOCK(sc); 1582 } 1583 break; 1584 case R92S_EVT_WPS_PBC: 1585 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1586 "%s: WPS PBC pushed.\n", __func__); 1587 break; 1588 case R92S_EVT_FWDBG: 1589 buf[60] = '\0'; 1590 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1591 break; 1592 case R92S_EVT_ADDBA_REQ_REPORT: 1593 rsu_event_addba_req_report(sc, buf, len); 1594 break; 1595 default: 1596 device_printf(sc->sc_dev, "%s: unhandled code (%d)\n", __func__, code); 1597 break; 1598 } 1599} 1600 1601static void 1602rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1603{ 1604 struct r92s_fw_cmd_hdr *cmd; 1605 int cmdsz; 1606 1607 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1608 1609 /* Skip Rx status. */ 1610 buf += sizeof(struct r92s_rx_stat); 1611 len -= sizeof(struct r92s_rx_stat); 1612 1613 /* Process all events. */ 1614 for (;;) { 1615 /* Check that command header fits. */ 1616 if (__predict_false(len < sizeof(*cmd))) 1617 break; 1618 cmd = (struct r92s_fw_cmd_hdr *)buf; 1619 /* Check that command payload fits. */ 1620 cmdsz = le16toh(cmd->len); 1621 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1622 break; 1623 1624 /* Process firmware event. */ 1625 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1626 1627 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1628 break; 1629 buf += sizeof(*cmd) + cmdsz; 1630 len -= sizeof(*cmd) + cmdsz; 1631 } 1632} 1633 1634static int8_t 1635rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1636{ 1637 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1638 struct r92s_rx_phystat *phy; 1639 struct r92s_rx_cck *cck; 1640 uint8_t rpt; 1641 int8_t rssi; 1642 1643 if (rate <= 3) { 1644 cck = (struct r92s_rx_cck *)physt; 1645 rpt = (cck->agc_rpt >> 6) & 0x3; 1646 rssi = cck->agc_rpt & 0x3e; 1647 rssi = cckoff[rpt] - rssi; 1648 } else { /* OFDM/HT. */ 1649 phy = (struct r92s_rx_phystat *)physt; 1650 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1651 } 1652 return (rssi); 1653} 1654 1655static struct mbuf * 1656rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1657{ 1658 struct ieee80211com *ic = &sc->sc_ic; 1659 struct ieee80211_frame *wh; 1660 struct r92s_rx_stat *stat; 1661 uint32_t rxdw0, rxdw3; 1662 struct mbuf *m; 1663 uint8_t rate; 1664 int infosz; 1665 1666 stat = (struct r92s_rx_stat *)buf; 1667 rxdw0 = le32toh(stat->rxdw0); 1668 rxdw3 = le32toh(stat->rxdw3); 1669 1670 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1671 counter_u64_add(ic->ic_ierrors, 1); 1672 return NULL; 1673 } 1674 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1675 counter_u64_add(ic->ic_ierrors, 1); 1676 return NULL; 1677 } 1678 1679 rate = MS(rxdw3, R92S_RXDW3_RATE); 1680 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1681 1682 /* Get RSSI from PHY status descriptor if present. */ 1683 if (infosz != 0) 1684 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1685 else 1686 *rssi = 0; 1687 1688 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1689 "%s: Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1690 __func__, 1691 pktlen, rate, infosz, *rssi); 1692 1693 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1694 if (__predict_false(m == NULL)) { 1695 counter_u64_add(ic->ic_ierrors, 1); 1696 return NULL; 1697 } 1698 /* Hardware does Rx TCP checksum offload. */ 1699 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1700 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1701 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1702 } 1703 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1704 memcpy(mtod(m, uint8_t *), wh, pktlen); 1705 m->m_pkthdr.len = m->m_len = pktlen; 1706 1707 if (ieee80211_radiotap_active(ic)) { 1708 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1709 1710 /* Map HW rate index to 802.11 rate. */ 1711 tap->wr_flags = 2; 1712 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1713 switch (rate) { 1714 /* CCK. */ 1715 case 0: tap->wr_rate = 2; break; 1716 case 1: tap->wr_rate = 4; break; 1717 case 2: tap->wr_rate = 11; break; 1718 case 3: tap->wr_rate = 22; break; 1719 /* OFDM. */ 1720 case 4: tap->wr_rate = 12; break; 1721 case 5: tap->wr_rate = 18; break; 1722 case 6: tap->wr_rate = 24; break; 1723 case 7: tap->wr_rate = 36; break; 1724 case 8: tap->wr_rate = 48; break; 1725 case 9: tap->wr_rate = 72; break; 1726 case 10: tap->wr_rate = 96; break; 1727 case 11: tap->wr_rate = 108; break; 1728 } 1729 } else if (rate >= 12) { /* MCS0~15. */ 1730 /* Bit 7 set means HT MCS instead of rate. */ 1731 tap->wr_rate = 0x80 | (rate - 12); 1732 } 1733 tap->wr_dbm_antsignal = *rssi; 1734 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1735 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1736 } 1737 1738 return (m); 1739} 1740 1741static struct mbuf * 1742rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1743{ 1744 struct r92s_rx_stat *stat; 1745 uint32_t rxdw0; 1746 int totlen, pktlen, infosz, npkts; 1747 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1748 1749 /* Get the number of encapsulated frames. */ 1750 stat = (struct r92s_rx_stat *)buf; 1751 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1752 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1753 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1754 1755 /* Process all of them. */ 1756 while (npkts-- > 0) { 1757 if (__predict_false(len < sizeof(*stat))) 1758 break; 1759 stat = (struct r92s_rx_stat *)buf; 1760 rxdw0 = le32toh(stat->rxdw0); 1761 1762 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1763 if (__predict_false(pktlen == 0)) 1764 break; 1765 1766 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1767 1768 /* Make sure everything fits in xfer. */ 1769 totlen = sizeof(*stat) + infosz + pktlen; 1770 if (__predict_false(totlen > len)) 1771 break; 1772 1773 /* Process 802.11 frame. */ 1774 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1775 if (m0 == NULL) 1776 m0 = m; 1777 if (prevm == NULL) 1778 prevm = m; 1779 else { 1780 prevm->m_next = m; 1781 prevm = m; 1782 } 1783 /* Next chunk is 128-byte aligned. */ 1784 totlen = (totlen + 127) & ~127; 1785 buf += totlen; 1786 len -= totlen; 1787 } 1788 1789 return (m0); 1790} 1791 1792static struct mbuf * 1793rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1794{ 1795 struct rsu_softc *sc = data->sc; 1796 struct ieee80211com *ic = &sc->sc_ic; 1797 struct r92s_rx_stat *stat; 1798 int len; 1799 1800 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1801 1802 if (__predict_false(len < sizeof(*stat))) { 1803 DPRINTF("xfer too short %d\n", len); 1804 counter_u64_add(ic->ic_ierrors, 1); 1805 return (NULL); 1806 } 1807 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1808 stat = (struct r92s_rx_stat *)data->buf; 1809 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1810 rsu_rx_multi_event(sc, data->buf, len); 1811 /* No packets to process. */ 1812 return (NULL); 1813 } else 1814 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1815} 1816 1817static void 1818rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1819{ 1820 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1821 struct ieee80211com *ic = &sc->sc_ic; 1822 struct ieee80211_frame *wh; 1823 struct ieee80211_node *ni; 1824 struct mbuf *m = NULL, *next; 1825 struct rsu_data *data; 1826 int rssi = 1; 1827 1828 RSU_ASSERT_LOCKED(sc); 1829 1830 switch (USB_GET_STATE(xfer)) { 1831 case USB_ST_TRANSFERRED: 1832 data = STAILQ_FIRST(&sc->sc_rx_active); 1833 if (data == NULL) 1834 goto tr_setup; 1835 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1836 m = rsu_rxeof(xfer, data, &rssi); 1837 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1838 /* FALLTHROUGH */ 1839 case USB_ST_SETUP: 1840tr_setup: 1841 /* 1842 * XXX TODO: if we have an mbuf list, but then 1843 * we hit data == NULL, what now? 1844 */ 1845 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1846 if (data == NULL) { 1847 KASSERT(m == NULL, ("mbuf isn't NULL")); 1848 return; 1849 } 1850 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1851 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1852 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1853 usbd_xfer_max_len(xfer)); 1854 usbd_transfer_submit(xfer); 1855 /* 1856 * To avoid LOR we should unlock our private mutex here to call 1857 * ieee80211_input() because here is at the end of a USB 1858 * callback and safe to unlock. 1859 */ 1860 RSU_UNLOCK(sc); 1861 while (m != NULL) { 1862 next = m->m_next; 1863 m->m_next = NULL; 1864 wh = mtod(m, struct ieee80211_frame *); 1865 ni = ieee80211_find_rxnode(ic, 1866 (struct ieee80211_frame_min *)wh); 1867 if (ni != NULL) { 1868 if (ni->ni_flags & IEEE80211_NODE_HT) 1869 m->m_flags |= M_AMPDU; 1870 (void)ieee80211_input(ni, m, rssi, 0); 1871 ieee80211_free_node(ni); 1872 } else 1873 (void)ieee80211_input_all(ic, m, rssi, 0); 1874 m = next; 1875 } 1876 RSU_LOCK(sc); 1877 break; 1878 default: 1879 /* needs it to the inactive queue due to a error. */ 1880 data = STAILQ_FIRST(&sc->sc_rx_active); 1881 if (data != NULL) { 1882 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1883 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1884 } 1885 if (error != USB_ERR_CANCELLED) { 1886 usbd_xfer_set_stall(xfer); 1887 counter_u64_add(ic->ic_ierrors, 1); 1888 goto tr_setup; 1889 } 1890 break; 1891 } 1892 1893} 1894 1895static void 1896rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1897{ 1898#ifdef USB_DEBUG 1899 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1900#endif 1901 1902 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 1903 __func__, 1904 data); 1905 1906 if (data->m) { 1907 /* XXX status? */ 1908 ieee80211_tx_complete(data->ni, data->m, 0); 1909 data->m = NULL; 1910 data->ni = NULL; 1911 } 1912} 1913 1914static void 1915rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 1916 uint8_t which) 1917{ 1918 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1919 struct ieee80211com *ic = &sc->sc_ic; 1920 struct rsu_data *data; 1921 1922 RSU_ASSERT_LOCKED(sc); 1923 1924 switch (USB_GET_STATE(xfer)) { 1925 case USB_ST_TRANSFERRED: 1926 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1927 if (data == NULL) 1928 goto tr_setup; 1929 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 1930 __func__, data); 1931 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1932 rsu_txeof(xfer, data); 1933 rsu_freebuf(sc, data); 1934 /* FALLTHROUGH */ 1935 case USB_ST_SETUP: 1936tr_setup: 1937 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 1938 if (data == NULL) { 1939 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1940 "%s: empty pending queue sc %p\n", __func__, sc); 1941 return; 1942 } 1943 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 1944 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 1945 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1946 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1947 "%s: submitting transfer %p\n", 1948 __func__, 1949 data); 1950 usbd_transfer_submit(xfer); 1951 break; 1952 default: 1953 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1954 if (data != NULL) { 1955 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1956 rsu_txeof(xfer, data); 1957 rsu_freebuf(sc, data); 1958 } 1959 counter_u64_add(ic->ic_oerrors, 1); 1960 1961 if (error != USB_ERR_CANCELLED) { 1962 usbd_xfer_set_stall(xfer); 1963 goto tr_setup; 1964 } 1965 break; 1966 } 1967} 1968 1969static void 1970rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 1971{ 1972 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1973 1974 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 1975 1976 /* This kicks the TX taskqueue */ 1977 rsu_start(sc); 1978} 1979 1980static void 1981rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 1982{ 1983 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1984 1985 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 1986 1987 /* This kicks the TX taskqueue */ 1988 rsu_start(sc); 1989} 1990 1991static void 1992rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 1993{ 1994 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1995 1996 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 1997 1998 /* This kicks the TX taskqueue */ 1999 rsu_start(sc); 2000} 2001 2002/* 2003 * Transmit the given frame. 2004 * 2005 * This doesn't free the node or mbuf upon failure. 2006 */ 2007static int 2008rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 2009 struct mbuf *m0, struct rsu_data *data) 2010{ 2011 struct ieee80211com *ic = &sc->sc_ic; 2012 struct ieee80211vap *vap = ni->ni_vap; 2013 struct ieee80211_frame *wh; 2014 struct ieee80211_key *k = NULL; 2015 struct r92s_tx_desc *txd; 2016 uint8_t type; 2017 int prio = 0; 2018 uint8_t which; 2019 int hasqos; 2020 int xferlen; 2021 int qid; 2022 2023 RSU_ASSERT_LOCKED(sc); 2024 2025 wh = mtod(m0, struct ieee80211_frame *); 2026 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2027 2028 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 2029 __func__, data, m0); 2030 2031 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2032 k = ieee80211_crypto_encap(ni, m0); 2033 if (k == NULL) { 2034 device_printf(sc->sc_dev, 2035 "ieee80211_crypto_encap returns NULL.\n"); 2036 /* XXX we don't expect the fragmented frames */ 2037 return (ENOBUFS); 2038 } 2039 wh = mtod(m0, struct ieee80211_frame *); 2040 } 2041 /* If we have QoS then use it */ 2042 /* XXX TODO: mbuf WME/PRI versus TID? */ 2043 if (IEEE80211_QOS_HAS_SEQ(wh)) { 2044 /* Has QoS */ 2045 prio = M_WME_GETAC(m0); 2046 which = rsu_wme_ac_xfer_map[prio]; 2047 hasqos = 1; 2048 } else { 2049 /* Non-QoS TID */ 2050 /* XXX TODO: tid=0 for non-qos TID? */ 2051 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 2052 hasqos = 0; 2053 prio = 0; 2054 } 2055 2056 qid = rsu_ac2qid[prio]; 2057#if 0 2058 switch (type) { 2059 case IEEE80211_FC0_TYPE_CTL: 2060 case IEEE80211_FC0_TYPE_MGT: 2061 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2062 break; 2063 default: 2064 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 2065 break; 2066 } 2067 hasqos = 0; 2068#endif 2069 2070 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 2071 __func__, 2072 prio, 2073 which, 2074 hasqos); 2075 2076 /* Fill Tx descriptor. */ 2077 txd = (struct r92s_tx_desc *)data->buf; 2078 memset(txd, 0, sizeof(*txd)); 2079 2080 txd->txdw0 |= htole32( 2081 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 2082 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 2083 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 2084 2085 txd->txdw1 |= htole32( 2086 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 2087 if (!hasqos) 2088 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 2089#ifdef notyet 2090 if (k != NULL) { 2091 switch (k->wk_cipher->ic_cipher) { 2092 case IEEE80211_CIPHER_WEP: 2093 cipher = R92S_TXDW1_CIPHER_WEP; 2094 break; 2095 case IEEE80211_CIPHER_TKIP: 2096 cipher = R92S_TXDW1_CIPHER_TKIP; 2097 break; 2098 case IEEE80211_CIPHER_AES_CCM: 2099 cipher = R92S_TXDW1_CIPHER_AES; 2100 break; 2101 default: 2102 cipher = R92S_TXDW1_CIPHER_NONE; 2103 } 2104 txd->txdw1 |= htole32( 2105 SM(R92S_TXDW1_CIPHER, cipher) | 2106 SM(R92S_TXDW1_KEYIDX, k->k_id)); 2107 } 2108#endif 2109 /* XXX todo: set AGGEN bit if appropriate? */ 2110 txd->txdw2 |= htole32(R92S_TXDW2_BK); 2111 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2112 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 2113 /* 2114 * Firmware will use and increment the sequence number for the 2115 * specified priority. 2116 */ 2117 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 2118 2119 if (ieee80211_radiotap_active_vap(vap)) { 2120 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 2121 2122 tap->wt_flags = 0; 2123 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2124 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2125 ieee80211_radiotap_tx(vap, m0); 2126 } 2127 2128 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 2129 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 2130 2131 data->buflen = xferlen; 2132 data->ni = ni; 2133 data->m = m0; 2134 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2135 2136 /* start transfer, if any */ 2137 usbd_transfer_start(sc->sc_xfer[which]); 2138 return (0); 2139} 2140 2141static int 2142rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 2143{ 2144 struct rsu_softc *sc = ic->ic_softc; 2145 int error; 2146 2147 RSU_LOCK(sc); 2148 if (!sc->sc_running) { 2149 RSU_UNLOCK(sc); 2150 return (ENXIO); 2151 } 2152 2153 /* 2154 * XXX TODO: ensure that we treat 'm' as a list of frames 2155 * to transmit! 2156 */ 2157 error = mbufq_enqueue(&sc->sc_snd, m); 2158 if (error) { 2159 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2160 "%s: mbufq_enable: failed (%d)\n", 2161 __func__, 2162 error); 2163 RSU_UNLOCK(sc); 2164 return (error); 2165 } 2166 RSU_UNLOCK(sc); 2167 2168 /* This kicks the TX taskqueue */ 2169 rsu_start(sc); 2170 2171 return (0); 2172} 2173 2174static void 2175rsu_drain_mbufq(struct rsu_softc *sc) 2176{ 2177 struct mbuf *m; 2178 struct ieee80211_node *ni; 2179 2180 RSU_ASSERT_LOCKED(sc); 2181 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2182 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2183 m->m_pkthdr.rcvif = NULL; 2184 ieee80211_free_node(ni); 2185 m_freem(m); 2186 } 2187} 2188 2189static void 2190_rsu_start(struct rsu_softc *sc) 2191{ 2192 struct ieee80211_node *ni; 2193 struct rsu_data *bf; 2194 struct mbuf *m; 2195 2196 RSU_ASSERT_LOCKED(sc); 2197 2198 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2199 bf = rsu_getbuf(sc); 2200 if (bf == NULL) { 2201 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2202 "%s: failed to get buffer\n", __func__); 2203 mbufq_prepend(&sc->sc_snd, m); 2204 break; 2205 } 2206 2207 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2208 m->m_pkthdr.rcvif = NULL; 2209 2210 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2211 RSU_DPRINTF(sc, RSU_DEBUG_TX, 2212 "%s: failed to transmit\n", __func__); 2213 if_inc_counter(ni->ni_vap->iv_ifp, 2214 IFCOUNTER_OERRORS, 1); 2215 rsu_freebuf(sc, bf); 2216 ieee80211_free_node(ni); 2217 m_freem(m); 2218 break; 2219 } 2220 } 2221} 2222 2223static void 2224rsu_start(struct rsu_softc *sc) 2225{ 2226 2227 taskqueue_enqueue(taskqueue_thread, &sc->tx_task); 2228} 2229 2230static void 2231rsu_parent(struct ieee80211com *ic) 2232{ 2233 struct rsu_softc *sc = ic->ic_softc; 2234 int startall = 0; 2235 2236 RSU_LOCK(sc); 2237 if (ic->ic_nrunning > 0) { 2238 if (!sc->sc_running) { 2239 rsu_init(sc); 2240 startall = 1; 2241 } 2242 } else if (sc->sc_running) 2243 rsu_stop(sc); 2244 RSU_UNLOCK(sc); 2245 2246 if (startall) 2247 ieee80211_start_all(ic); 2248} 2249 2250/* 2251 * Power on sequence for A-cut adapters. 2252 */ 2253static void 2254rsu_power_on_acut(struct rsu_softc *sc) 2255{ 2256 uint32_t reg; 2257 2258 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2259 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2260 2261 /* Enable AFE macro block's bandgap and Mbias. */ 2262 rsu_write_1(sc, R92S_AFE_MISC, 2263 rsu_read_1(sc, R92S_AFE_MISC) | 2264 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2265 /* Enable LDOA15 block. */ 2266 rsu_write_1(sc, R92S_LDOA15_CTRL, 2267 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2268 2269 rsu_write_1(sc, R92S_SPS1_CTRL, 2270 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2271 rsu_ms_delay(sc, 2000); 2272 /* Enable switch regulator block. */ 2273 rsu_write_1(sc, R92S_SPS1_CTRL, 2274 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2275 2276 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2277 2278 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2279 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2280 2281 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2282 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2283 2284 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2285 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2286 2287 /* Enable AFE clock. */ 2288 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2289 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2290 /* Enable AFE PLL macro block. */ 2291 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2292 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2293 /* Attach AFE PLL to MACTOP/BB. */ 2294 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2295 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2296 2297 /* Switch to 40MHz clock instead of 80MHz. */ 2298 rsu_write_2(sc, R92S_SYS_CLKR, 2299 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2300 2301 /* Enable MAC clock. */ 2302 rsu_write_2(sc, R92S_SYS_CLKR, 2303 rsu_read_2(sc, R92S_SYS_CLKR) | 2304 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2305 2306 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2307 2308 /* Enable digital core and IOREG R/W. */ 2309 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2310 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2311 2312 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2313 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2314 2315 /* Switch the control path to firmware. */ 2316 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2317 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2318 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2319 2320 rsu_write_2(sc, R92S_CR, 0x37fc); 2321 2322 /* Fix USB RX FIFO issue. */ 2323 rsu_write_1(sc, 0xfe5c, 2324 rsu_read_1(sc, 0xfe5c) | 0x80); 2325 rsu_write_1(sc, 0x00ab, 2326 rsu_read_1(sc, 0x00ab) | 0xc0); 2327 2328 rsu_write_1(sc, R92S_SYS_CLKR, 2329 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2330} 2331 2332/* 2333 * Power on sequence for B-cut and C-cut adapters. 2334 */ 2335static void 2336rsu_power_on_bcut(struct rsu_softc *sc) 2337{ 2338 uint32_t reg; 2339 int ntries; 2340 2341 /* Prevent eFuse leakage. */ 2342 rsu_write_1(sc, 0x37, 0xb0); 2343 rsu_ms_delay(sc, 10); 2344 rsu_write_1(sc, 0x37, 0x30); 2345 2346 /* Switch the control path to hardware. */ 2347 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2348 if (reg & R92S_FWHW_SEL) { 2349 rsu_write_2(sc, R92S_SYS_CLKR, 2350 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2351 } 2352 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2353 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2354 rsu_ms_delay(sc, 1); 2355 2356 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2357 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2358 2359 reg = rsu_read_1(sc, R92S_AFE_MISC); 2360 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2361 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2362 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2363 2364 /* Enable PLL. */ 2365 rsu_write_1(sc, R92S_LDOA15_CTRL, 2366 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2367 2368 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2369 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2370 2371 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2372 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2373 2374 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2375 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2376 2377 /* Support 64KB IMEM. */ 2378 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2379 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2380 2381 /* Enable AFE clock. */ 2382 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2383 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2384 /* Enable AFE PLL macro block. */ 2385 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2386 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2387 rsu_ms_delay(sc, 1); 2388 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2389 rsu_ms_delay(sc, 1); 2390 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2391 rsu_ms_delay(sc, 1); 2392 2393 /* Attach AFE PLL to MACTOP/BB. */ 2394 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2395 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2396 2397 /* Switch to 40MHz clock. */ 2398 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2399 /* Disable CPU clock and 80MHz SSC. */ 2400 rsu_write_1(sc, R92S_SYS_CLKR, 2401 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2402 /* Enable MAC clock. */ 2403 rsu_write_2(sc, R92S_SYS_CLKR, 2404 rsu_read_2(sc, R92S_SYS_CLKR) | 2405 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2406 2407 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2408 2409 /* Enable digital core and IOREG R/W. */ 2410 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2411 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2412 2413 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2414 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2415 2416 /* Switch the control path to firmware. */ 2417 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2418 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2419 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2420 2421 rsu_write_2(sc, R92S_CR, 0x37fc); 2422 2423 /* Fix USB RX FIFO issue. */ 2424 rsu_write_1(sc, 0xfe5c, 2425 rsu_read_1(sc, 0xfe5c) | 0x80); 2426 2427 rsu_write_1(sc, R92S_SYS_CLKR, 2428 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2429 2430 rsu_write_1(sc, 0xfe1c, 0x80); 2431 2432 /* Make sure TxDMA is ready to download firmware. */ 2433 for (ntries = 0; ntries < 20; ntries++) { 2434 reg = rsu_read_1(sc, R92S_TCR); 2435 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2436 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2437 break; 2438 rsu_ms_delay(sc, 1); 2439 } 2440 if (ntries == 20) { 2441 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2442 "%s: TxDMA is not ready\n", 2443 __func__); 2444 /* Reset TxDMA. */ 2445 reg = rsu_read_1(sc, R92S_CR); 2446 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2447 rsu_ms_delay(sc, 1); 2448 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2449 } 2450} 2451 2452static void 2453rsu_power_off(struct rsu_softc *sc) 2454{ 2455 /* Turn RF off. */ 2456 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2457 rsu_ms_delay(sc, 5); 2458 2459 /* Turn MAC off. */ 2460 /* Switch control path. */ 2461 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2462 /* Reset MACTOP. */ 2463 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2464 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2465 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2466 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2467 2468 /* Disable AFE PLL. */ 2469 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2470 /* Disable A15V. */ 2471 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2472 /* Disable eFuse 1.2V. */ 2473 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2474 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2475 /* Enable AFE macro block's bandgap and Mbias. */ 2476 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2477 /* Disable 1.6V LDO. */ 2478 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2479 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2480 2481 /* Firmware - tell it to switch things off */ 2482 (void) rsu_set_fw_power_state(sc, RSU_PWR_OFF); 2483} 2484 2485static int 2486rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2487{ 2488 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2489 struct rsu_data *data; 2490 struct r92s_tx_desc *txd; 2491 int mlen; 2492 2493 while (len > 0) { 2494 data = rsu_getbuf(sc); 2495 if (data == NULL) 2496 return (ENOMEM); 2497 txd = (struct r92s_tx_desc *)data->buf; 2498 memset(txd, 0, sizeof(*txd)); 2499 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2500 /* Last chunk. */ 2501 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2502 mlen = len; 2503 } else 2504 mlen = RSU_TXBUFSZ - sizeof(*txd); 2505 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2506 memcpy(&txd[1], buf, mlen); 2507 data->buflen = sizeof(*txd) + mlen; 2508 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2509 "%s: starting transfer %p\n", 2510 __func__, data); 2511 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2512 buf += mlen; 2513 len -= mlen; 2514 } 2515 usbd_transfer_start(sc->sc_xfer[which]); 2516 return (0); 2517} 2518 2519static int 2520rsu_load_firmware(struct rsu_softc *sc) 2521{ 2522 const struct r92s_fw_hdr *hdr; 2523 struct r92s_fw_priv *dmem; 2524 struct ieee80211com *ic = &sc->sc_ic; 2525 const uint8_t *imem, *emem; 2526 int imemsz, ememsz; 2527 const struct firmware *fw; 2528 size_t size; 2529 uint32_t reg; 2530 int ntries, error; 2531 2532 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2533 RSU_DPRINTF(sc, RSU_DEBUG_ANY, 2534 "%s: Firmware already loaded\n", 2535 __func__); 2536 return (0); 2537 } 2538 2539 RSU_UNLOCK(sc); 2540 /* Read firmware image from the filesystem. */ 2541 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2542 device_printf(sc->sc_dev, 2543 "%s: failed load firmware of file rsu-rtl8712fw\n", 2544 __func__); 2545 RSU_LOCK(sc); 2546 return (ENXIO); 2547 } 2548 RSU_LOCK(sc); 2549 size = fw->datasize; 2550 if (size < sizeof(*hdr)) { 2551 device_printf(sc->sc_dev, "firmware too short\n"); 2552 error = EINVAL; 2553 goto fail; 2554 } 2555 hdr = (const struct r92s_fw_hdr *)fw->data; 2556 if (hdr->signature != htole16(0x8712) && 2557 hdr->signature != htole16(0x8192)) { 2558 device_printf(sc->sc_dev, 2559 "invalid firmware signature 0x%x\n", 2560 le16toh(hdr->signature)); 2561 error = EINVAL; 2562 goto fail; 2563 } 2564 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2565 hdr->month, hdr->day, hdr->hour, hdr->minute); 2566 2567 /* Make sure that driver and firmware are in sync. */ 2568 if (hdr->privsz != htole32(sizeof(*dmem))) { 2569 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2570 error = EINVAL; 2571 goto fail; 2572 } 2573 /* Get FW sections sizes. */ 2574 imemsz = le32toh(hdr->imemsz); 2575 ememsz = le32toh(hdr->sramsz); 2576 /* Check that all FW sections fit in image. */ 2577 if (size < sizeof(*hdr) + imemsz + ememsz) { 2578 device_printf(sc->sc_dev, "firmware too short\n"); 2579 error = EINVAL; 2580 goto fail; 2581 } 2582 imem = (const uint8_t *)&hdr[1]; 2583 emem = imem + imemsz; 2584 2585 /* Load IMEM section. */ 2586 error = rsu_fw_loadsection(sc, imem, imemsz); 2587 if (error != 0) { 2588 device_printf(sc->sc_dev, 2589 "could not load firmware section %s\n", "IMEM"); 2590 goto fail; 2591 } 2592 /* Wait for load to complete. */ 2593 for (ntries = 0; ntries != 50; ntries++) { 2594 rsu_ms_delay(sc, 10); 2595 reg = rsu_read_1(sc, R92S_TCR); 2596 if (reg & R92S_TCR_IMEM_CODE_DONE) 2597 break; 2598 } 2599 if (ntries == 50) { 2600 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2601 error = ETIMEDOUT; 2602 goto fail; 2603 } 2604 /* Load EMEM section. */ 2605 error = rsu_fw_loadsection(sc, emem, ememsz); 2606 if (error != 0) { 2607 device_printf(sc->sc_dev, 2608 "could not load firmware section %s\n", "EMEM"); 2609 goto fail; 2610 } 2611 /* Wait for load to complete. */ 2612 for (ntries = 0; ntries != 50; ntries++) { 2613 rsu_ms_delay(sc, 10); 2614 reg = rsu_read_2(sc, R92S_TCR); 2615 if (reg & R92S_TCR_EMEM_CODE_DONE) 2616 break; 2617 } 2618 if (ntries == 50) { 2619 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2620 error = ETIMEDOUT; 2621 goto fail; 2622 } 2623 /* Enable CPU. */ 2624 rsu_write_1(sc, R92S_SYS_CLKR, 2625 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2626 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2627 device_printf(sc->sc_dev, "could not enable system clock\n"); 2628 error = EIO; 2629 goto fail; 2630 } 2631 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2632 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2633 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2634 device_printf(sc->sc_dev, 2635 "could not enable microcontroller\n"); 2636 error = EIO; 2637 goto fail; 2638 } 2639 /* Wait for CPU to initialize. */ 2640 for (ntries = 0; ntries < 100; ntries++) { 2641 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2642 break; 2643 rsu_ms_delay(sc, 1); 2644 } 2645 if (ntries == 100) { 2646 device_printf(sc->sc_dev, 2647 "timeout waiting for microcontroller\n"); 2648 error = ETIMEDOUT; 2649 goto fail; 2650 } 2651 2652 /* Update DMEM section before loading. */ 2653 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2654 memset(dmem, 0, sizeof(*dmem)); 2655 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2656 dmem->nendpoints = sc->sc_nendpoints; 2657 dmem->chip_version = sc->cut; 2658 /* XXX TODO: rf_config should come from ROM */ 2659 dmem->rf_config = 0x11; /* 1T1R */ 2660 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2661 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2662 dmem->turbo_mode = 0; 2663 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2664 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2665 dmem->ampdu_en = !! (sc->sc_ht); 2666 dmem->agg_offload = !! (sc->sc_ht); 2667 dmem->qos_en = 1; 2668 dmem->ps_offload = 1; 2669 dmem->lowpower_mode = 1; /* XXX TODO: configurable? */ 2670 /* Load DMEM section. */ 2671 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2672 if (error != 0) { 2673 device_printf(sc->sc_dev, 2674 "could not load firmware section %s\n", "DMEM"); 2675 goto fail; 2676 } 2677 /* Wait for load to complete. */ 2678 for (ntries = 0; ntries < 100; ntries++) { 2679 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2680 break; 2681 rsu_ms_delay(sc, 1); 2682 } 2683 if (ntries == 100) { 2684 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2685 "DMEM"); 2686 error = ETIMEDOUT; 2687 goto fail; 2688 } 2689 /* Wait for firmware readiness. */ 2690 for (ntries = 0; ntries < 60; ntries++) { 2691 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2692 break; 2693 rsu_ms_delay(sc, 1); 2694 } 2695 if (ntries == 60) { 2696 device_printf(sc->sc_dev, 2697 "timeout waiting for firmware readiness\n"); 2698 error = ETIMEDOUT; 2699 goto fail; 2700 } 2701 fail: 2702 firmware_put(fw, FIRMWARE_UNLOAD); 2703 return (error); 2704} 2705 2706 2707static int 2708rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2709 const struct ieee80211_bpf_params *params) 2710{ 2711 struct ieee80211com *ic = ni->ni_ic; 2712 struct rsu_softc *sc = ic->ic_softc; 2713 struct rsu_data *bf; 2714 2715 /* prevent management frames from being sent if we're not ready */ 2716 if (!sc->sc_running) { 2717 m_freem(m); 2718 ieee80211_free_node(ni); 2719 return (ENETDOWN); 2720 } 2721 RSU_LOCK(sc); 2722 bf = rsu_getbuf(sc); 2723 if (bf == NULL) { 2724 ieee80211_free_node(ni); 2725 m_freem(m); 2726 RSU_UNLOCK(sc); 2727 return (ENOBUFS); 2728 } 2729 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2730 ieee80211_free_node(ni); 2731 m_freem(m); 2732 rsu_freebuf(sc, bf); 2733 RSU_UNLOCK(sc); 2734 return (EIO); 2735 } 2736 RSU_UNLOCK(sc); 2737 2738 return (0); 2739} 2740 2741static void 2742rsu_init(struct rsu_softc *sc) 2743{ 2744 struct ieee80211com *ic = &sc->sc_ic; 2745 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2746 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2747 int error; 2748 int i; 2749 2750 RSU_ASSERT_LOCKED(sc); 2751 2752 /* Ensure the mbuf queue is drained */ 2753 rsu_drain_mbufq(sc); 2754 2755 /* Init host async commands ring. */ 2756 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2757 2758 /* Reset power management state. */ 2759 rsu_write_1(sc, R92S_USB_HRPWM, 0); 2760 2761 /* Power on adapter. */ 2762 if (sc->cut == 1) 2763 rsu_power_on_acut(sc); 2764 else 2765 rsu_power_on_bcut(sc); 2766 2767 /* Load firmware. */ 2768 error = rsu_load_firmware(sc); 2769 if (error != 0) 2770 goto fail; 2771 2772 /* Enable Rx TCP checksum offload. */ 2773 rsu_write_4(sc, R92S_RCR, 2774 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2775 /* Append PHY status. */ 2776 rsu_write_4(sc, R92S_RCR, 2777 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2778 2779 rsu_write_4(sc, R92S_CR, 2780 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2781 2782 /* Use 128 bytes pages. */ 2783 rsu_write_1(sc, 0x00b5, 2784 rsu_read_1(sc, 0x00b5) | 0x01); 2785 /* Enable USB Rx aggregation. */ 2786 rsu_write_1(sc, 0x00bd, 2787 rsu_read_1(sc, 0x00bd) | 0x80); 2788 /* Set USB Rx aggregation threshold. */ 2789 rsu_write_1(sc, 0x00d9, 0x01); 2790 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2791 rsu_write_1(sc, 0xfe5b, 0x04); 2792 /* Fix USB Rx FIFO issue. */ 2793 rsu_write_1(sc, 0xfe5c, 2794 rsu_read_1(sc, 0xfe5c) | 0x80); 2795 2796 /* Set MAC address. */ 2797 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2798 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2799 2800 /* It really takes 1.5 seconds for the firmware to boot: */ 2801 rsu_ms_delay(sc, 2000); 2802 2803 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2804 __func__, 2805 ether_sprintf(macaddr)); 2806 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2807 IEEE80211_ADDR_LEN); 2808 if (error != 0) { 2809 device_printf(sc->sc_dev, "could not set MAC address\n"); 2810 goto fail; 2811 } 2812 2813 /* Set PS mode fully active */ 2814 error = rsu_set_fw_power_state(sc, RSU_PWR_ACTIVE); 2815 2816 if (error != 0) { 2817 device_printf(sc->sc_dev, "could not set PS mode\n"); 2818 goto fail; 2819 } 2820 2821 sc->sc_scan_pass = 0; 2822 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2823 2824 /* We're ready to go. */ 2825 sc->sc_running = 1; 2826 sc->sc_scanning = 0; 2827 return; 2828fail: 2829 /* Need to stop all failed transfers, if any */ 2830 for (i = 0; i != RSU_N_TRANSFER; i++) 2831 usbd_transfer_stop(sc->sc_xfer[i]); 2832} 2833 2834static void 2835rsu_stop(struct rsu_softc *sc) 2836{ 2837 int i; 2838 2839 RSU_ASSERT_LOCKED(sc); 2840 2841 sc->sc_running = 0; 2842 sc->sc_calibrating = 0; 2843 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2844 taskqueue_cancel(taskqueue_thread, &sc->tx_task, NULL); 2845 2846 /* Power off adapter. */ 2847 rsu_power_off(sc); 2848 2849 for (i = 0; i < RSU_N_TRANSFER; i++) 2850 usbd_transfer_stop(sc->sc_xfer[i]); 2851 2852 /* Ensure the mbuf queue is drained */ 2853 rsu_drain_mbufq(sc); 2854} 2855 2856/* 2857 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2858 * which breaks any kind of driver serialisation. 2859 */ 2860static void 2861rsu_ms_delay(struct rsu_softc *sc, int ms) 2862{ 2863 2864 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2865 DELAY(ms * 1000); 2866} 2867