if_rsu.c revision 288049
1/* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3/*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18#include <sys/cdefs.h> 19__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_rsu.c 288049 2015-09-20 22:52:40Z adrian $"); 20 21/* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o 11n support 26 * o h/w crypto 27 * o hostap / ibss / mesh 28 */ 29 30#include <sys/param.h> 31#include <sys/endian.h> 32#include <sys/sockio.h> 33#include <sys/mbuf.h> 34#include <sys/kernel.h> 35#include <sys/socket.h> 36#include <sys/systm.h> 37#include <sys/conf.h> 38#include <sys/bus.h> 39#include <sys/rman.h> 40#include <sys/firmware.h> 41#include <sys/module.h> 42 43#include <machine/bus.h> 44#include <machine/resource.h> 45 46#include <net/bpf.h> 47#include <net/if.h> 48#include <net/if_var.h> 49#include <net/if_arp.h> 50#include <net/if_dl.h> 51#include <net/if_media.h> 52#include <net/if_types.h> 53 54#include <netinet/in.h> 55#include <netinet/in_systm.h> 56#include <netinet/in_var.h> 57#include <netinet/if_ether.h> 58#include <netinet/ip.h> 59 60#include <net80211/ieee80211_var.h> 61#include <net80211/ieee80211_regdomain.h> 62#include <net80211/ieee80211_radiotap.h> 63 64#include <dev/usb/usb.h> 65#include <dev/usb/usbdi.h> 66#include "usbdevs.h" 67 68#define USB_DEBUG_VAR rsu_debug 69#include <dev/usb/usb_debug.h> 70 71#include <dev/usb/wlan/if_rsureg.h> 72 73#ifdef USB_DEBUG 74static int rsu_debug = 0; 75SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 76SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 77 "Debug level"); 78#define RSU_DPRINTF(_sc, _flg, ...) \ 79 do \ 80 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 81 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 82 while (0) 83#else 84#define RSU_DPRINTF(_sc, _flg, ...) 85#endif 86 87static int rsu_enable_11n = 0; 88TUNABLE_INT("hw.usb.rsu.enable_11n", &rsu_enable_11n); 89 90#define RSU_DEBUG_ANY 0xffffffff 91#define RSU_DEBUG_TX 0x00000001 92#define RSU_DEBUG_RX 0x00000002 93#define RSU_DEBUG_RESET 0x00000004 94#define RSU_DEBUG_CALIB 0x00000008 95#define RSU_DEBUG_STATE 0x00000010 96#define RSU_DEBUG_SCAN 0x00000020 97#define RSU_DEBUG_FWCMD 0x00000040 98#define RSU_DEBUG_TXDONE 0x00000080 99#define RSU_DEBUG_FW 0x00000100 100#define RSU_DEBUG_FWDBG 0x00000200 101 102static const STRUCT_USB_HOST_ID rsu_devs[] = { 103#define RSU_HT_NOT_SUPPORTED 0 104#define RSU_HT_SUPPORTED 1 105#define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 106 RSU_HT_SUPPORTED) } 107#define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 108 RSU_HT_NOT_SUPPORTED) } 109 RSU_DEV(ASUS, RTL8192SU), 110 RSU_DEV(AZUREWAVE, RTL8192SU_4), 111 RSU_DEV_HT(ACCTON, RTL8192SU), 112 RSU_DEV_HT(ASUS, USBN10), 113 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 114 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 115 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 116 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 117 RSU_DEV_HT(BELKIN, RTL8192SU_1), 118 RSU_DEV_HT(BELKIN, RTL8192SU_2), 119 RSU_DEV_HT(BELKIN, RTL8192SU_3), 120 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 121 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 122 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 123 RSU_DEV_HT(COREGA, RTL8192SU), 124 RSU_DEV_HT(DLINK2, DWA131A1), 125 RSU_DEV_HT(DLINK2, RTL8192SU_1), 126 RSU_DEV_HT(DLINK2, RTL8192SU_2), 127 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 128 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 129 RSU_DEV_HT(EDIMAX, EW7622UMN), 130 RSU_DEV_HT(GUILLEMOT, HWGUN54), 131 RSU_DEV_HT(GUILLEMOT, HWNUM300), 132 RSU_DEV_HT(HAWKING, RTL8192SU_1), 133 RSU_DEV_HT(HAWKING, RTL8192SU_2), 134 RSU_DEV_HT(PLANEX2, GWUSNANO), 135 RSU_DEV_HT(REALTEK, RTL8171), 136 RSU_DEV_HT(REALTEK, RTL8172), 137 RSU_DEV_HT(REALTEK, RTL8173), 138 RSU_DEV_HT(REALTEK, RTL8174), 139 RSU_DEV_HT(REALTEK, RTL8192SU), 140 RSU_DEV_HT(REALTEK, RTL8712), 141 RSU_DEV_HT(REALTEK, RTL8713), 142 RSU_DEV_HT(SENAO, RTL8192SU_1), 143 RSU_DEV_HT(SENAO, RTL8192SU_2), 144 RSU_DEV_HT(SITECOMEU, WL349V1), 145 RSU_DEV_HT(SITECOMEU, WL353), 146 RSU_DEV_HT(SWEEX2, LW154), 147 RSU_DEV_HT(TRENDNET, TEW646UBH), 148#undef RSU_DEV_HT 149#undef RSU_DEV 150}; 151 152static device_probe_t rsu_match; 153static device_attach_t rsu_attach; 154static device_detach_t rsu_detach; 155static usb_callback_t rsu_bulk_tx_callback_be_bk; 156static usb_callback_t rsu_bulk_tx_callback_vi_vo; 157static usb_callback_t rsu_bulk_tx_callback_h2c; 158static usb_callback_t rsu_bulk_rx_callback; 159static usb_error_t rsu_do_request(struct rsu_softc *, 160 struct usb_device_request *, void *); 161static struct ieee80211vap * 162 rsu_vap_create(struct ieee80211com *, const char name[], 163 int, enum ieee80211_opmode, int, const uint8_t bssid[], 164 const uint8_t mac[]); 165static void rsu_vap_delete(struct ieee80211vap *); 166static void rsu_scan_start(struct ieee80211com *); 167static void rsu_scan_end(struct ieee80211com *); 168static void rsu_set_channel(struct ieee80211com *); 169static void rsu_update_mcast(struct ieee80211com *); 170static int rsu_alloc_rx_list(struct rsu_softc *); 171static void rsu_free_rx_list(struct rsu_softc *); 172static int rsu_alloc_tx_list(struct rsu_softc *); 173static void rsu_free_tx_list(struct rsu_softc *); 174static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 175static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 176static struct rsu_data *rsu_getbuf(struct rsu_softc *); 177static void rsu_freebuf(struct rsu_softc *, struct rsu_data *); 178static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 179 int); 180static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 181static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 182static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 183static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 184 int); 185static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 186static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 187static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 188static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 189static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 190static int rsu_read_rom(struct rsu_softc *); 191static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 192static void rsu_calib_task(void *, int); 193static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 194#ifdef notyet 195static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 196static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 197#endif 198static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 199static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 200static int rsu_disconnect(struct rsu_softc *); 201static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 202static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 203static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 204static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 205static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 206static struct mbuf * 207 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 208static struct mbuf * 209 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 210static struct mbuf * 211 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 212static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 213static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 214 const struct ieee80211_bpf_params *); 215static void rsu_init(struct rsu_softc *); 216static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 217 struct mbuf *, struct rsu_data *); 218static int rsu_transmit(struct ieee80211com *, struct mbuf *); 219static void rsu_start(struct rsu_softc *); 220static void rsu_parent(struct ieee80211com *); 221static void rsu_stop(struct rsu_softc *); 222static void rsu_ms_delay(struct rsu_softc *, int); 223 224static device_method_t rsu_methods[] = { 225 DEVMETHOD(device_probe, rsu_match), 226 DEVMETHOD(device_attach, rsu_attach), 227 DEVMETHOD(device_detach, rsu_detach), 228 229 DEVMETHOD_END 230}; 231 232static driver_t rsu_driver = { 233 .name = "rsu", 234 .methods = rsu_methods, 235 .size = sizeof(struct rsu_softc) 236}; 237 238static devclass_t rsu_devclass; 239 240DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 241MODULE_DEPEND(rsu, wlan, 1, 1, 1); 242MODULE_DEPEND(rsu, usb, 1, 1, 1); 243MODULE_DEPEND(rsu, firmware, 1, 1, 1); 244MODULE_VERSION(rsu, 1); 245 246static uint8_t rsu_wme_ac_xfer_map[4] = { 247 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 248 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 249 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 250 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 251}; 252 253/* XXX hard-coded */ 254#define RSU_H2C_ENDPOINT 3 255 256static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 257 [RSU_BULK_RX] = { 258 .type = UE_BULK, 259 .endpoint = UE_ADDR_ANY, 260 .direction = UE_DIR_IN, 261 .bufsize = RSU_RXBUFSZ, 262 .flags = { 263 .pipe_bof = 1, 264 .short_xfer_ok = 1 265 }, 266 .callback = rsu_bulk_rx_callback 267 }, 268 [RSU_BULK_TX_BE_BK] = { 269 .type = UE_BULK, 270 .endpoint = 0x06, 271 .direction = UE_DIR_OUT, 272 .bufsize = RSU_TXBUFSZ, 273 .flags = { 274 .ext_buffer = 1, 275 .pipe_bof = 1, 276 .force_short_xfer = 1 277 }, 278 .callback = rsu_bulk_tx_callback_be_bk, 279 .timeout = RSU_TX_TIMEOUT 280 }, 281 [RSU_BULK_TX_VI_VO] = { 282 .type = UE_BULK, 283 .endpoint = 0x04, 284 .direction = UE_DIR_OUT, 285 .bufsize = RSU_TXBUFSZ, 286 .flags = { 287 .ext_buffer = 1, 288 .pipe_bof = 1, 289 .force_short_xfer = 1 290 }, 291 .callback = rsu_bulk_tx_callback_vi_vo, 292 .timeout = RSU_TX_TIMEOUT 293 }, 294 [RSU_BULK_TX_H2C] = { 295 .type = UE_BULK, 296 .endpoint = 0x0d, 297 .direction = UE_DIR_OUT, 298 .bufsize = RSU_TXBUFSZ, 299 .flags = { 300 .ext_buffer = 1, 301 .pipe_bof = 1, 302 .short_xfer_ok = 1 303 }, 304 .callback = rsu_bulk_tx_callback_h2c, 305 .timeout = RSU_TX_TIMEOUT 306 }, 307}; 308 309static int 310rsu_match(device_t self) 311{ 312 struct usb_attach_arg *uaa = device_get_ivars(self); 313 314 if (uaa->usb_mode != USB_MODE_HOST || 315 uaa->info.bIfaceIndex != 0 || 316 uaa->info.bConfigIndex != 0) 317 return (ENXIO); 318 319 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 320} 321 322static int 323rsu_send_mgmt(struct ieee80211_node *ni, int type, int arg) 324{ 325 326 return (ENOTSUP); 327} 328 329static void 330rsu_update_chw(struct ieee80211com *ic) 331{ 332 333} 334 335static int 336rsu_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 337{ 338 339 /* Firmware handles this; not our problem */ 340 return (0); 341} 342 343static int 344rsu_wme_update(struct ieee80211com *ic) 345{ 346 347 /* Firmware handles this; not our problem */ 348 return (0); 349} 350 351static int 352rsu_attach(device_t self) 353{ 354 struct usb_attach_arg *uaa = device_get_ivars(self); 355 struct rsu_softc *sc = device_get_softc(self); 356 struct ieee80211com *ic = &sc->sc_ic; 357 int error; 358 uint8_t iface_index, bands; 359 struct usb_interface *iface; 360 361 device_set_usb_desc(self); 362 sc->sc_udev = uaa->device; 363 sc->sc_dev = self; 364 if (rsu_enable_11n) 365 sc->sc_ht = !! (USB_GET_DRIVER_INFO(uaa) & RSU_HT_SUPPORTED); 366 367 /* Get number of endpoints */ 368 iface = usbd_get_iface(sc->sc_udev, 0); 369 sc->sc_nendpoints = iface->idesc->bNumEndpoints; 370 371 /* Endpoints are hard-coded for now, so enforce 4-endpoint only */ 372 if (sc->sc_nendpoints != 4) { 373 device_printf(sc->sc_dev, 374 "the driver currently only supports 4-endpoint devices\n"); 375 return (ENXIO); 376 } 377 378 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 379 MTX_DEF); 380 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 381 rsu_calib_task, sc); 382 mbufq_init(&sc->sc_snd, ifqmaxlen); 383 384 /* Allocate Tx/Rx buffers. */ 385 error = rsu_alloc_rx_list(sc); 386 if (error != 0) { 387 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 388 goto fail_usb; 389 } 390 391 error = rsu_alloc_tx_list(sc); 392 if (error != 0) { 393 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 394 rsu_free_rx_list(sc); 395 goto fail_usb; 396 } 397 398 iface_index = 0; 399 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 400 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 401 if (error) { 402 device_printf(sc->sc_dev, 403 "could not allocate USB transfers, err=%s\n", 404 usbd_errstr(error)); 405 goto fail_usb; 406 } 407 RSU_LOCK(sc); 408 /* Read chip revision. */ 409 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 410 if (sc->cut != 3) 411 sc->cut = (sc->cut >> 1) + 1; 412 error = rsu_read_rom(sc); 413 RSU_UNLOCK(sc); 414 if (error != 0) { 415 device_printf(self, "could not read ROM\n"); 416 goto fail_rom; 417 } 418 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 419 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 420 421 ic->ic_softc = sc; 422 ic->ic_name = device_get_nameunit(self); 423 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 424 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 425 426 /* Set device capabilities. */ 427 ic->ic_caps = 428 IEEE80211_C_STA | /* station mode */ 429#if 0 430 IEEE80211_C_BGSCAN | /* Background scan. */ 431#endif 432 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 433 IEEE80211_C_WME | /* WME/QoS */ 434 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 435 IEEE80211_C_WPA; /* WPA/RSN. */ 436 437 /* Check if HT support is present. */ 438 if (sc->sc_ht) { 439 device_printf(sc->sc_dev, "%s: enabling 11n\n", __func__); 440 441 /* Enable basic HT */ 442 ic->ic_htcaps = IEEE80211_HTC_HT | 443 IEEE80211_HTC_AMPDU | 444 IEEE80211_HTC_AMSDU | 445 IEEE80211_HTCAP_MAXAMSDU_3839 | 446 IEEE80211_HTCAP_SMPS_OFF; 447 448 /* 449 * XXX HT40 isn't working in this driver yet - there's 450 * something missing. Disable it for now. 451 */ 452#if 0 453 ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 454#endif 455 456 /* set number of spatial streams */ 457 ic->ic_txstream = 1; 458 ic->ic_rxstream = 1; 459 } 460 461 /* Set supported .11b and .11g rates. */ 462 bands = 0; 463 setbit(&bands, IEEE80211_MODE_11B); 464 setbit(&bands, IEEE80211_MODE_11G); 465 if (sc->sc_ht) 466 setbit(&bands, IEEE80211_MODE_11NG); 467 ieee80211_init_channels(ic, NULL, &bands); 468 469 ieee80211_ifattach(ic); 470 ic->ic_raw_xmit = rsu_raw_xmit; 471 ic->ic_scan_start = rsu_scan_start; 472 ic->ic_scan_end = rsu_scan_end; 473 ic->ic_set_channel = rsu_set_channel; 474 ic->ic_vap_create = rsu_vap_create; 475 ic->ic_vap_delete = rsu_vap_delete; 476 ic->ic_update_mcast = rsu_update_mcast; 477 ic->ic_parent = rsu_parent; 478 ic->ic_transmit = rsu_transmit; 479 ic->ic_send_mgmt = rsu_send_mgmt; 480 ic->ic_update_chw = rsu_update_chw; 481 ic->ic_ampdu_enable = rsu_ampdu_enable; 482 ic->ic_wme.wme_update = rsu_wme_update; 483 484 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 485 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 486 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 487 RSU_RX_RADIOTAP_PRESENT); 488 489 if (bootverbose) 490 ieee80211_announce(ic); 491 492 return (0); 493 494fail_rom: 495 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 496fail_usb: 497 mtx_destroy(&sc->sc_mtx); 498 return (ENXIO); 499} 500 501static int 502rsu_detach(device_t self) 503{ 504 struct rsu_softc *sc = device_get_softc(self); 505 struct ieee80211com *ic = &sc->sc_ic; 506 507 RSU_LOCK(sc); 508 rsu_stop(sc); 509 RSU_UNLOCK(sc); 510 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 511 ieee80211_ifdetach(ic); 512 513 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 514 515 /* Free Tx/Rx buffers. */ 516 rsu_free_tx_list(sc); 517 rsu_free_rx_list(sc); 518 519 mbufq_drain(&sc->sc_snd); 520 mtx_destroy(&sc->sc_mtx); 521 522 return (0); 523} 524 525static usb_error_t 526rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 527 void *data) 528{ 529 usb_error_t err; 530 int ntries = 10; 531 532 RSU_ASSERT_LOCKED(sc); 533 534 while (ntries--) { 535 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 536 req, data, 0, NULL, 250 /* ms */); 537 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 538 break; 539 DPRINTFN(1, "Control request failed, %s (retrying)\n", 540 usbd_errstr(err)); 541 rsu_ms_delay(sc, 10); 542 } 543 544 return (err); 545} 546 547static struct ieee80211vap * 548rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 549 enum ieee80211_opmode opmode, int flags, 550 const uint8_t bssid[IEEE80211_ADDR_LEN], 551 const uint8_t mac[IEEE80211_ADDR_LEN]) 552{ 553 struct rsu_vap *uvp; 554 struct ieee80211vap *vap; 555 556 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 557 return (NULL); 558 559 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 560 vap = &uvp->vap; 561 562 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 563 flags, bssid) != 0) { 564 /* out of memory */ 565 free(uvp, M_80211_VAP); 566 return (NULL); 567 } 568 569 /* override state transition machine */ 570 uvp->newstate = vap->iv_newstate; 571 vap->iv_newstate = rsu_newstate; 572 573 /* Limits from the r92su driver */ 574 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 575 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K; 576 577 /* complete setup */ 578 ieee80211_vap_attach(vap, ieee80211_media_change, 579 ieee80211_media_status, mac); 580 ic->ic_opmode = opmode; 581 582 return (vap); 583} 584 585static void 586rsu_vap_delete(struct ieee80211vap *vap) 587{ 588 struct rsu_vap *uvp = RSU_VAP(vap); 589 590 ieee80211_vap_detach(vap); 591 free(uvp, M_80211_VAP); 592} 593 594static void 595rsu_scan_start(struct ieee80211com *ic) 596{ 597 struct rsu_softc *sc = ic->ic_softc; 598 int error; 599 600 /* Scanning is done by the firmware. */ 601 RSU_LOCK(sc); 602 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 603 RSU_UNLOCK(sc); 604 if (error != 0) 605 device_printf(sc->sc_dev, 606 "could not send site survey command\n"); 607} 608 609static void 610rsu_scan_end(struct ieee80211com *ic) 611{ 612 /* Nothing to do here. */ 613} 614 615static void 616rsu_set_channel(struct ieee80211com *ic __unused) 617{ 618 /* We are unable to switch channels, yet. */ 619} 620 621static void 622rsu_update_mcast(struct ieee80211com *ic) 623{ 624 /* XXX do nothing? */ 625} 626 627static int 628rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 629 int ndata, int maxsz) 630{ 631 int i, error; 632 633 for (i = 0; i < ndata; i++) { 634 struct rsu_data *dp = &data[i]; 635 dp->sc = sc; 636 dp->m = NULL; 637 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 638 if (dp->buf == NULL) { 639 device_printf(sc->sc_dev, 640 "could not allocate buffer\n"); 641 error = ENOMEM; 642 goto fail; 643 } 644 dp->ni = NULL; 645 } 646 647 return (0); 648fail: 649 rsu_free_list(sc, data, ndata); 650 return (error); 651} 652 653static int 654rsu_alloc_rx_list(struct rsu_softc *sc) 655{ 656 int error, i; 657 658 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 659 RSU_RXBUFSZ); 660 if (error != 0) 661 return (error); 662 663 STAILQ_INIT(&sc->sc_rx_active); 664 STAILQ_INIT(&sc->sc_rx_inactive); 665 666 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 667 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 668 669 return (0); 670} 671 672static int 673rsu_alloc_tx_list(struct rsu_softc *sc) 674{ 675 int error, i; 676 677 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 678 RSU_TXBUFSZ); 679 if (error != 0) 680 return (error); 681 682 STAILQ_INIT(&sc->sc_tx_inactive); 683 684 for (i = 0; i != RSU_N_TRANSFER; i++) { 685 STAILQ_INIT(&sc->sc_tx_active[i]); 686 STAILQ_INIT(&sc->sc_tx_pending[i]); 687 } 688 689 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 690 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 691 } 692 693 return (0); 694} 695 696static void 697rsu_free_tx_list(struct rsu_softc *sc) 698{ 699 int i; 700 701 /* prevent further allocations from TX list(s) */ 702 STAILQ_INIT(&sc->sc_tx_inactive); 703 704 for (i = 0; i != RSU_N_TRANSFER; i++) { 705 STAILQ_INIT(&sc->sc_tx_active[i]); 706 STAILQ_INIT(&sc->sc_tx_pending[i]); 707 } 708 709 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 710} 711 712static void 713rsu_free_rx_list(struct rsu_softc *sc) 714{ 715 /* prevent further allocations from RX list(s) */ 716 STAILQ_INIT(&sc->sc_rx_inactive); 717 STAILQ_INIT(&sc->sc_rx_active); 718 719 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 720} 721 722static void 723rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 724{ 725 int i; 726 727 for (i = 0; i < ndata; i++) { 728 struct rsu_data *dp = &data[i]; 729 730 if (dp->buf != NULL) { 731 free(dp->buf, M_USBDEV); 732 dp->buf = NULL; 733 } 734 if (dp->ni != NULL) { 735 ieee80211_free_node(dp->ni); 736 dp->ni = NULL; 737 } 738 } 739} 740 741static struct rsu_data * 742_rsu_getbuf(struct rsu_softc *sc) 743{ 744 struct rsu_data *bf; 745 746 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 747 if (bf != NULL) 748 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 749 else 750 bf = NULL; 751 return (bf); 752} 753 754static struct rsu_data * 755rsu_getbuf(struct rsu_softc *sc) 756{ 757 struct rsu_data *bf; 758 759 RSU_ASSERT_LOCKED(sc); 760 761 bf = _rsu_getbuf(sc); 762 return (bf); 763} 764 765static void 766rsu_freebuf(struct rsu_softc *sc, struct rsu_data *bf) 767{ 768 769 RSU_ASSERT_LOCKED(sc); 770 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next); 771} 772 773static int 774rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 775 int len) 776{ 777 usb_device_request_t req; 778 779 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 780 req.bRequest = R92S_REQ_REGS; 781 USETW(req.wValue, addr); 782 USETW(req.wIndex, 0); 783 USETW(req.wLength, len); 784 785 return (rsu_do_request(sc, &req, buf)); 786} 787 788static void 789rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 790{ 791 rsu_write_region_1(sc, addr, &val, 1); 792} 793 794static void 795rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 796{ 797 val = htole16(val); 798 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 799} 800 801static void 802rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 803{ 804 val = htole32(val); 805 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 806} 807 808static int 809rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 810 int len) 811{ 812 usb_device_request_t req; 813 814 req.bmRequestType = UT_READ_VENDOR_DEVICE; 815 req.bRequest = R92S_REQ_REGS; 816 USETW(req.wValue, addr); 817 USETW(req.wIndex, 0); 818 USETW(req.wLength, len); 819 820 return (rsu_do_request(sc, &req, buf)); 821} 822 823static uint8_t 824rsu_read_1(struct rsu_softc *sc, uint16_t addr) 825{ 826 uint8_t val; 827 828 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 829 return (0xff); 830 return (val); 831} 832 833static uint16_t 834rsu_read_2(struct rsu_softc *sc, uint16_t addr) 835{ 836 uint16_t val; 837 838 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 839 return (0xffff); 840 return (le16toh(val)); 841} 842 843static uint32_t 844rsu_read_4(struct rsu_softc *sc, uint16_t addr) 845{ 846 uint32_t val; 847 848 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 849 return (0xffffffff); 850 return (le32toh(val)); 851} 852 853static int 854rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 855{ 856 int ntries; 857 858 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 859 rsu_ms_delay(sc, 1); 860 for (ntries = 0; ntries < 50; ntries++) { 861 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 862 return (0); 863 rsu_ms_delay(sc, 1); 864 } 865 return (ETIMEDOUT); 866} 867 868static uint8_t 869rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 870{ 871 uint32_t reg; 872 int ntries; 873 874 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 875 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 876 reg &= ~R92S_EFUSE_CTRL_VALID; 877 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 878 /* Wait for read operation to complete. */ 879 for (ntries = 0; ntries < 100; ntries++) { 880 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 881 if (reg & R92S_EFUSE_CTRL_VALID) 882 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 883 rsu_ms_delay(sc, 1); 884 } 885 device_printf(sc->sc_dev, 886 "could not read efuse byte at address 0x%x\n", addr); 887 return (0xff); 888} 889 890static int 891rsu_read_rom(struct rsu_softc *sc) 892{ 893 uint8_t *rom = sc->rom; 894 uint16_t addr = 0; 895 uint32_t reg; 896 uint8_t off, msk; 897 int i; 898 899 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 900 reg = rsu_read_1(sc, R92S_EE_9346CR); 901 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 902 return (EIO); 903 904 /* Turn on 2.5V to prevent eFuse leakage. */ 905 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 906 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 907 rsu_ms_delay(sc, 1); 908 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 909 910 /* Read full ROM image. */ 911 memset(&sc->rom, 0xff, sizeof(sc->rom)); 912 while (addr < 512) { 913 reg = rsu_efuse_read_1(sc, addr); 914 if (reg == 0xff) 915 break; 916 addr++; 917 off = reg >> 4; 918 msk = reg & 0xf; 919 for (i = 0; i < 4; i++) { 920 if (msk & (1 << i)) 921 continue; 922 rom[off * 8 + i * 2 + 0] = 923 rsu_efuse_read_1(sc, addr); 924 addr++; 925 rom[off * 8 + i * 2 + 1] = 926 rsu_efuse_read_1(sc, addr); 927 addr++; 928 } 929 } 930#ifdef USB_DEBUG 931 if (rsu_debug >= 5) { 932 /* Dump ROM content. */ 933 printf("\n"); 934 for (i = 0; i < sizeof(sc->rom); i++) 935 printf("%02x:", rom[i]); 936 printf("\n"); 937 } 938#endif 939 return (0); 940} 941 942static int 943rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 944{ 945 const uint8_t which = RSU_H2C_ENDPOINT; 946 struct rsu_data *data; 947 struct r92s_tx_desc *txd; 948 struct r92s_fw_cmd_hdr *cmd; 949 int cmdsz; 950 int xferlen; 951 952 RSU_ASSERT_LOCKED(sc); 953 954 data = rsu_getbuf(sc); 955 if (data == NULL) 956 return (ENOMEM); 957 958 /* Round-up command length to a multiple of 8 bytes. */ 959 cmdsz = (len + 7) & ~7; 960 961 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 962 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 963 memset(data->buf, 0, xferlen); 964 965 /* Setup Tx descriptor. */ 966 txd = (struct r92s_tx_desc *)data->buf; 967 txd->txdw0 = htole32( 968 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 969 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 970 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 971 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 972 973 /* Setup command header. */ 974 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 975 cmd->len = htole16(cmdsz); 976 cmd->code = code; 977 cmd->seq = sc->cmd_seq; 978 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 979 980 /* Copy command payload. */ 981 memcpy(&cmd[1], buf, len); 982 983 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 984 "%s: Tx cmd code=0x%x len=0x%x\n", 985 __func__, code, cmdsz); 986 data->buflen = xferlen; 987 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 988 usbd_transfer_start(sc->sc_xfer[which]); 989 990 return (0); 991} 992 993/* ARGSUSED */ 994static void 995rsu_calib_task(void *arg, int pending __unused) 996{ 997 struct rsu_softc *sc = arg; 998 uint32_t reg; 999 1000 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 1001 __func__); 1002 1003 RSU_LOCK(sc); 1004#ifdef notyet 1005 /* Read WPS PBC status. */ 1006 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 1007 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 1008 rsu_write_1(sc, R92S_GPIO_IO_SEL, 1009 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 1010 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 1011 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 1012 DPRINTF(("WPS PBC is pushed\n")); 1013#endif 1014 /* Read current signal level. */ 1015 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 1016 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 1017 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d%%\n", 1018 __func__, reg >> 4); 1019 } 1020 if (sc->sc_calibrating) 1021 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1022 RSU_UNLOCK(sc); 1023} 1024 1025static int 1026rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1027{ 1028 struct rsu_vap *uvp = RSU_VAP(vap); 1029 struct ieee80211com *ic = vap->iv_ic; 1030 struct rsu_softc *sc = ic->ic_softc; 1031 struct ieee80211_node *ni; 1032 struct ieee80211_rateset *rs; 1033 enum ieee80211_state ostate; 1034 int error, startcal = 0; 1035 1036 ostate = vap->iv_state; 1037 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 1038 __func__, 1039 ieee80211_state_name[ostate], 1040 ieee80211_state_name[nstate]); 1041 1042 IEEE80211_UNLOCK(ic); 1043 if (ostate == IEEE80211_S_RUN) { 1044 RSU_LOCK(sc); 1045 /* Stop calibration. */ 1046 sc->sc_calibrating = 0; 1047 RSU_UNLOCK(sc); 1048 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 1049 /* Disassociate from our current BSS. */ 1050 RSU_LOCK(sc); 1051 rsu_disconnect(sc); 1052 } else 1053 RSU_LOCK(sc); 1054 switch (nstate) { 1055 case IEEE80211_S_INIT: 1056 break; 1057 case IEEE80211_S_AUTH: 1058 ni = ieee80211_ref_node(vap->iv_bss); 1059 error = rsu_join_bss(sc, ni); 1060 ieee80211_free_node(ni); 1061 if (error != 0) { 1062 device_printf(sc->sc_dev, 1063 "could not send join command\n"); 1064 } 1065 break; 1066 case IEEE80211_S_RUN: 1067 ni = ieee80211_ref_node(vap->iv_bss); 1068 rs = &ni->ni_rates; 1069 /* Indicate highest supported rate. */ 1070 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1071 ieee80211_free_node(ni); 1072 startcal = 1; 1073 break; 1074 default: 1075 break; 1076 } 1077 sc->sc_calibrating = 1; 1078 /* Start periodic calibration. */ 1079 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 1080 RSU_UNLOCK(sc); 1081 IEEE80211_LOCK(ic); 1082 return (uvp->newstate(vap, nstate, arg)); 1083} 1084 1085#ifdef notyet 1086static void 1087rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1088{ 1089 struct r92s_fw_cmd_set_key key; 1090 1091 memset(&key, 0, sizeof(key)); 1092 /* Map net80211 cipher to HW crypto algorithm. */ 1093 switch (k->wk_cipher->ic_cipher) { 1094 case IEEE80211_CIPHER_WEP: 1095 if (k->wk_keylen < 8) 1096 key.algo = R92S_KEY_ALGO_WEP40; 1097 else 1098 key.algo = R92S_KEY_ALGO_WEP104; 1099 break; 1100 case IEEE80211_CIPHER_TKIP: 1101 key.algo = R92S_KEY_ALGO_TKIP; 1102 break; 1103 case IEEE80211_CIPHER_AES_CCM: 1104 key.algo = R92S_KEY_ALGO_AES; 1105 break; 1106 default: 1107 return; 1108 } 1109 key.id = k->wk_keyix; 1110 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1111 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1112 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1113} 1114 1115static void 1116rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1117{ 1118 struct r92s_fw_cmd_set_key key; 1119 1120 memset(&key, 0, sizeof(key)); 1121 key.id = k->wk_keyix; 1122 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1123} 1124#endif 1125 1126static int 1127rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1128{ 1129 struct r92s_fw_cmd_sitesurvey cmd; 1130 struct ieee80211com *ic = &sc->sc_ic; 1131 int r; 1132 1133 RSU_ASSERT_LOCKED(sc); 1134 1135 memset(&cmd, 0, sizeof(cmd)); 1136 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1137 cmd.active = htole32(1); 1138 cmd.limit = htole32(48); 1139 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1140 /* Do a directed scan for second pass. */ 1141 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1142 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1143 vap->iv_des_ssid[0].len); 1144 1145 } 1146 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1147 r = rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd)); 1148 if (r == 0) { 1149 sc->sc_scanning = 1; 1150 } 1151 return (r); 1152} 1153 1154static int 1155rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1156{ 1157 struct ieee80211com *ic = &sc->sc_ic; 1158 struct ieee80211vap *vap = ni->ni_vap; 1159 struct ndis_wlan_bssid_ex *bss; 1160 struct ndis_802_11_fixed_ies *fixed; 1161 struct r92s_fw_cmd_auth auth; 1162 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1163 uint8_t *frm; 1164 uint8_t opmode; 1165 int error; 1166 int cnt; 1167 char *msg = "rsujoin"; 1168 1169 RSU_ASSERT_LOCKED(sc); 1170 1171 /* 1172 * Until net80211 scanning doesn't automatically finish 1173 * before we tell it to, let's just wait until any pending 1174 * scan is done. 1175 * 1176 * XXX TODO: yes, this releases and re-acquires the lock. 1177 * We should re-verify the state whenever we re-attempt this! 1178 */ 1179 cnt = 0; 1180 while (sc->sc_scanning && cnt < 10) { 1181 device_printf(sc->sc_dev, 1182 "%s: still scanning! (attempt %d)\n", 1183 __func__, cnt); 1184 msleep(msg, &sc->sc_mtx, 0, msg, hz / 2); 1185 cnt++; 1186 } 1187 1188 /* Let the FW decide the opmode based on the capinfo field. */ 1189 opmode = NDIS802_11AUTOUNKNOWN; 1190 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1191 "%s: setting operating mode to %d\n", 1192 __func__, opmode); 1193 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1194 if (error != 0) 1195 return (error); 1196 1197 memset(&auth, 0, sizeof(auth)); 1198 if (vap->iv_flags & IEEE80211_F_WPA) { 1199 auth.mode = R92S_AUTHMODE_WPA; 1200 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1201 } else 1202 auth.mode = R92S_AUTHMODE_OPEN; 1203 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1204 "%s: setting auth mode to %d\n", 1205 __func__, auth.mode); 1206 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1207 if (error != 0) 1208 return (error); 1209 1210 memset(buf, 0, sizeof(buf)); 1211 bss = (struct ndis_wlan_bssid_ex *)buf; 1212 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1213 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1214 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1215 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1216 bss->privacy = htole32(1); 1217 bss->rssi = htole32(ni->ni_avgrssi); 1218 if (ic->ic_curmode == IEEE80211_MODE_11B) 1219 bss->networktype = htole32(NDIS802_11DS); 1220 else 1221 bss->networktype = htole32(NDIS802_11OFDM24); 1222 bss->config.len = htole32(sizeof(bss->config)); 1223 bss->config.bintval = htole32(ni->ni_intval); 1224 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1225 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1226 /* XXX verify how this is supposed to look! */ 1227 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1228 ni->ni_rates.rs_nrates); 1229 /* Write the fixed fields of the beacon frame. */ 1230 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1231 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1232 fixed->bintval = htole16(ni->ni_intval); 1233 fixed->capabilities = htole16(ni->ni_capinfo); 1234 /* Write IEs to be included in the association request. */ 1235 frm = (uint8_t *)&fixed[1]; 1236 frm = ieee80211_add_rsn(frm, vap); 1237 frm = ieee80211_add_wpa(frm, vap); 1238 frm = ieee80211_add_qos(frm, ni); 1239 if ((ic->ic_flags & IEEE80211_F_WME) && 1240 (ni->ni_ies.wme_ie != NULL)) 1241 frm = ieee80211_add_wme_info(frm, &ic->ic_wme); 1242 if (ni->ni_flags & IEEE80211_NODE_HT) 1243 frm = ieee80211_add_htcap(frm, ni); 1244 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1245 bss->len = htole32(((frm - buf) + 3) & ~3); 1246 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1247 "%s: sending join bss command to %s chan %d\n", 1248 __func__, 1249 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1250 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1251} 1252 1253static int 1254rsu_disconnect(struct rsu_softc *sc) 1255{ 1256 uint32_t zero = 0; /* :-) */ 1257 1258 /* Disassociate from our current BSS. */ 1259 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1260 "%s: sending disconnect command\n", __func__); 1261 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1262} 1263 1264static void 1265rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1266{ 1267 struct ieee80211com *ic = &sc->sc_ic; 1268 struct ieee80211_frame *wh; 1269 struct ndis_wlan_bssid_ex *bss; 1270 struct ieee80211_rx_stats rxs; 1271 struct mbuf *m; 1272 int pktlen; 1273 1274 if (__predict_false(len < sizeof(*bss))) 1275 return; 1276 bss = (struct ndis_wlan_bssid_ex *)buf; 1277 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1278 return; 1279 1280 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1281 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1282 "networktype=%d privacy=%d, RSSI=%d\n", 1283 __func__, 1284 ether_sprintf(bss->macaddr), le32toh(bss->len), 1285 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1286 le32toh(bss->networktype), le32toh(bss->privacy), 1287 le32toh(bss->rssi)); 1288 1289 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1290 /* XXX TODO: just call the new scan API methods! */ 1291 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1292 if (__predict_false(pktlen > MCLBYTES)) 1293 return; 1294 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1295 if (__predict_false(m == NULL)) 1296 return; 1297 wh = mtod(m, struct ieee80211_frame *); 1298 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1299 IEEE80211_FC0_SUBTYPE_BEACON; 1300 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1301 USETW(wh->i_dur, 0); 1302 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1303 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1304 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1305 *(uint16_t *)wh->i_seq = 0; 1306 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1307 1308 /* Finalize mbuf. */ 1309 m->m_pkthdr.len = m->m_len = pktlen; 1310 1311 /* Set channel flags for input path */ 1312 bzero(&rxs, sizeof(rxs)); 1313 rxs.r_flags |= IEEE80211_R_IEEE | IEEE80211_R_FREQ; 1314 rxs.r_flags |= IEEE80211_R_NF | IEEE80211_R_RSSI; 1315 rxs.c_ieee = le32toh(bss->config.dsconfig); 1316 rxs.c_freq = ieee80211_ieee2mhz(rxs.c_ieee, IEEE80211_CHAN_2GHZ); 1317 rxs.rssi = le32toh(bss->rssi); 1318 rxs.nf = 0; /* XXX */ 1319 1320 /* XXX avoid a LOR */ 1321 RSU_UNLOCK(sc); 1322 ieee80211_input_mimo_all(ic, m, &rxs); 1323 RSU_LOCK(sc); 1324} 1325 1326static void 1327rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1328{ 1329 struct ieee80211com *ic = &sc->sc_ic; 1330 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1331 struct ieee80211_node *ni = vap->iv_bss; 1332 struct r92s_event_join_bss *rsp; 1333 uint32_t tmp; 1334 int res; 1335 1336 if (__predict_false(len < sizeof(*rsp))) 1337 return; 1338 rsp = (struct r92s_event_join_bss *)buf; 1339 res = (int)le32toh(rsp->join_res); 1340 1341 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1342 "%s: Rx join BSS event len=%d res=%d\n", 1343 __func__, len, res); 1344 1345 /* 1346 * XXX Don't do this; there's likely a better way to tell 1347 * the caller we failed. 1348 */ 1349 if (res <= 0) { 1350 RSU_UNLOCK(sc); 1351 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1352 RSU_LOCK(sc); 1353 return; 1354 } 1355 1356 tmp = le32toh(rsp->associd); 1357 if (tmp >= vap->iv_max_aid) { 1358 DPRINTF("Assoc ID overflow\n"); 1359 tmp = 1; 1360 } 1361 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1362 "%s: associated with %s associd=%d\n", 1363 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1364 /* XXX is this required? What's the top two bits for again? */ 1365 ni->ni_associd = tmp | 0xc000; 1366 RSU_UNLOCK(sc); 1367 ieee80211_new_state(vap, IEEE80211_S_RUN, 1368 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1369 RSU_LOCK(sc); 1370} 1371 1372static void 1373rsu_event_addba_req_report(struct rsu_softc *sc, uint8_t *buf, int len) 1374{ 1375 struct ieee80211com *ic = &sc->sc_ic; 1376 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1377 struct r92s_add_ba_event *ba = (void *) buf; 1378 struct ieee80211_node *ni; 1379 1380 if (len < sizeof(*ba)) { 1381 device_printf(sc->sc_dev, "%s: short read (%d)\n", __func__, len); 1382 return; 1383 } 1384 1385 if (vap == NULL) 1386 return; 1387 1388 device_printf(sc->sc_dev, "%s: mac=%s, tid=%d, ssn=%d\n", 1389 __func__, 1390 ether_sprintf(ba->mac_addr), 1391 (int) ba->tid, 1392 (int) le16toh(ba->ssn)); 1393 1394 /* XXX do node lookup; this is STA specific */ 1395 1396 ni = ieee80211_ref_node(vap->iv_bss); 1397 ieee80211_ampdu_rx_start_ext(ni, ba->tid, le16toh(ba->ssn) >> 4, 32); 1398 ieee80211_free_node(ni); 1399} 1400 1401static void 1402rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1403{ 1404 struct ieee80211com *ic = &sc->sc_ic; 1405 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1406 1407 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1408 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1409 switch (code) { 1410 case R92S_EVT_SURVEY: 1411 rsu_event_survey(sc, buf, len); 1412 break; 1413 case R92S_EVT_SURVEY_DONE: 1414 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1415 "%s: site survey pass %d done, found %d BSS\n", 1416 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1417 sc->sc_scanning = 0; 1418 if (vap->iv_state != IEEE80211_S_SCAN) 1419 break; /* Ignore if not scanning. */ 1420 1421 /* 1422 * XXX TODO: This needs to be done without a transition to 1423 * the SCAN state again. Grr. 1424 */ 1425 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1426 /* Schedule a directed scan for hidden APs. */ 1427 /* XXX bad! */ 1428 sc->sc_scan_pass = 1; 1429 RSU_UNLOCK(sc); 1430 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1431 RSU_LOCK(sc); 1432 break; 1433 } 1434 sc->sc_scan_pass = 0; 1435 break; 1436 case R92S_EVT_JOIN_BSS: 1437 if (vap->iv_state == IEEE80211_S_AUTH) 1438 rsu_event_join_bss(sc, buf, len); 1439 break; 1440 case R92S_EVT_DEL_STA: 1441 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1442 "%s: disassociated from %s\n", __func__, 1443 ether_sprintf(buf)); 1444 if (vap->iv_state == IEEE80211_S_RUN && 1445 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1446 RSU_UNLOCK(sc); 1447 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1448 RSU_LOCK(sc); 1449 } 1450 break; 1451 case R92S_EVT_WPS_PBC: 1452 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1453 "%s: WPS PBC pushed.\n", __func__); 1454 break; 1455 case R92S_EVT_FWDBG: 1456 buf[60] = '\0'; 1457 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1458 break; 1459 1460 case R92S_EVT_ADDBA_REQ_REPORT: 1461 rsu_event_addba_req_report(sc, buf, len); 1462 break; 1463 default: 1464 RSU_DPRINTF(sc, RSU_DEBUG_ANY, "%s: unhandled code (%d)\n", 1465 __func__, code); 1466 break; 1467 } 1468} 1469 1470static void 1471rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1472{ 1473 struct r92s_fw_cmd_hdr *cmd; 1474 int cmdsz; 1475 1476 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1477 1478 /* Skip Rx status. */ 1479 buf += sizeof(struct r92s_rx_stat); 1480 len -= sizeof(struct r92s_rx_stat); 1481 1482 /* Process all events. */ 1483 for (;;) { 1484 /* Check that command header fits. */ 1485 if (__predict_false(len < sizeof(*cmd))) 1486 break; 1487 cmd = (struct r92s_fw_cmd_hdr *)buf; 1488 /* Check that command payload fits. */ 1489 cmdsz = le16toh(cmd->len); 1490 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1491 break; 1492 1493 /* Process firmware event. */ 1494 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1495 1496 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1497 break; 1498 buf += sizeof(*cmd) + cmdsz; 1499 len -= sizeof(*cmd) + cmdsz; 1500 } 1501} 1502 1503static int8_t 1504rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1505{ 1506 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1507 struct r92s_rx_phystat *phy; 1508 struct r92s_rx_cck *cck; 1509 uint8_t rpt; 1510 int8_t rssi; 1511 1512 if (rate <= 3) { 1513 cck = (struct r92s_rx_cck *)physt; 1514 rpt = (cck->agc_rpt >> 6) & 0x3; 1515 rssi = cck->agc_rpt & 0x3e; 1516 rssi = cckoff[rpt] - rssi; 1517 } else { /* OFDM/HT. */ 1518 phy = (struct r92s_rx_phystat *)physt; 1519 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1520 } 1521 return (rssi); 1522} 1523 1524static struct mbuf * 1525rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1526{ 1527 struct ieee80211com *ic = &sc->sc_ic; 1528 struct ieee80211_frame *wh; 1529 struct r92s_rx_stat *stat; 1530 uint32_t rxdw0, rxdw3; 1531 struct mbuf *m; 1532 uint8_t rate; 1533 int infosz; 1534 1535 stat = (struct r92s_rx_stat *)buf; 1536 rxdw0 = le32toh(stat->rxdw0); 1537 rxdw3 = le32toh(stat->rxdw3); 1538 1539 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1540 counter_u64_add(ic->ic_ierrors, 1); 1541 return NULL; 1542 } 1543 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1544 counter_u64_add(ic->ic_ierrors, 1); 1545 return NULL; 1546 } 1547 1548 rate = MS(rxdw3, R92S_RXDW3_RATE); 1549 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1550 1551 /* Get RSSI from PHY status descriptor if present. */ 1552 if (infosz != 0) 1553 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1554 else 1555 *rssi = 0; 1556 1557 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1558 "%s: Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1559 __func__, 1560 pktlen, rate, infosz, *rssi); 1561 1562 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1563 if (__predict_false(m == NULL)) { 1564 counter_u64_add(ic->ic_ierrors, 1); 1565 return NULL; 1566 } 1567 /* Hardware does Rx TCP checksum offload. */ 1568 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1569 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1570 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1571 } 1572 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1573 memcpy(mtod(m, uint8_t *), wh, pktlen); 1574 m->m_pkthdr.len = m->m_len = pktlen; 1575 1576 if (ieee80211_radiotap_active(ic)) { 1577 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1578 1579 /* Map HW rate index to 802.11 rate. */ 1580 tap->wr_flags = 2; 1581 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1582 switch (rate) { 1583 /* CCK. */ 1584 case 0: tap->wr_rate = 2; break; 1585 case 1: tap->wr_rate = 4; break; 1586 case 2: tap->wr_rate = 11; break; 1587 case 3: tap->wr_rate = 22; break; 1588 /* OFDM. */ 1589 case 4: tap->wr_rate = 12; break; 1590 case 5: tap->wr_rate = 18; break; 1591 case 6: tap->wr_rate = 24; break; 1592 case 7: tap->wr_rate = 36; break; 1593 case 8: tap->wr_rate = 48; break; 1594 case 9: tap->wr_rate = 72; break; 1595 case 10: tap->wr_rate = 96; break; 1596 case 11: tap->wr_rate = 108; break; 1597 } 1598 } else if (rate >= 12) { /* MCS0~15. */ 1599 /* Bit 7 set means HT MCS instead of rate. */ 1600 tap->wr_rate = 0x80 | (rate - 12); 1601 } 1602 tap->wr_dbm_antsignal = *rssi; 1603 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1604 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1605 } 1606 1607 return (m); 1608} 1609 1610static struct mbuf * 1611rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1612{ 1613 struct r92s_rx_stat *stat; 1614 uint32_t rxdw0; 1615 int totlen, pktlen, infosz, npkts; 1616 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1617 1618 /* Get the number of encapsulated frames. */ 1619 stat = (struct r92s_rx_stat *)buf; 1620 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1621 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1622 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1623 1624 /* Process all of them. */ 1625 while (npkts-- > 0) { 1626 if (__predict_false(len < sizeof(*stat))) 1627 break; 1628 stat = (struct r92s_rx_stat *)buf; 1629 rxdw0 = le32toh(stat->rxdw0); 1630 1631 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1632 if (__predict_false(pktlen == 0)) 1633 break; 1634 1635 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1636 1637 /* Make sure everything fits in xfer. */ 1638 totlen = sizeof(*stat) + infosz + pktlen; 1639 if (__predict_false(totlen > len)) 1640 break; 1641 1642 /* Process 802.11 frame. */ 1643 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1644 if (m0 == NULL) 1645 m0 = m; 1646 if (prevm == NULL) 1647 prevm = m; 1648 else { 1649 prevm->m_next = m; 1650 prevm = m; 1651 } 1652 /* Next chunk is 128-byte aligned. */ 1653 totlen = (totlen + 127) & ~127; 1654 buf += totlen; 1655 len -= totlen; 1656 } 1657 1658 return (m0); 1659} 1660 1661static struct mbuf * 1662rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1663{ 1664 struct rsu_softc *sc = data->sc; 1665 struct ieee80211com *ic = &sc->sc_ic; 1666 struct r92s_rx_stat *stat; 1667 int len; 1668 1669 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1670 1671 if (__predict_false(len < sizeof(*stat))) { 1672 DPRINTF("xfer too short %d\n", len); 1673 counter_u64_add(ic->ic_ierrors, 1); 1674 return (NULL); 1675 } 1676 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1677 stat = (struct r92s_rx_stat *)data->buf; 1678 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1679 rsu_rx_multi_event(sc, data->buf, len); 1680 /* No packets to process. */ 1681 return (NULL); 1682 } else 1683 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1684} 1685 1686static void 1687rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1688{ 1689 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1690 struct ieee80211com *ic = &sc->sc_ic; 1691 struct ieee80211_frame *wh; 1692 struct ieee80211_node *ni; 1693 struct mbuf *m = NULL, *next; 1694 struct rsu_data *data; 1695 int rssi = 1; 1696 1697 RSU_ASSERT_LOCKED(sc); 1698 1699 switch (USB_GET_STATE(xfer)) { 1700 case USB_ST_TRANSFERRED: 1701 data = STAILQ_FIRST(&sc->sc_rx_active); 1702 if (data == NULL) 1703 goto tr_setup; 1704 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1705 m = rsu_rxeof(xfer, data, &rssi); 1706 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1707 /* FALLTHROUGH */ 1708 case USB_ST_SETUP: 1709tr_setup: 1710 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1711 if (data == NULL) { 1712 KASSERT(m == NULL, ("mbuf isn't NULL")); 1713 return; 1714 } 1715 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1716 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1717 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1718 usbd_xfer_max_len(xfer)); 1719 usbd_transfer_submit(xfer); 1720 /* 1721 * To avoid LOR we should unlock our private mutex here to call 1722 * ieee80211_input() because here is at the end of a USB 1723 * callback and safe to unlock. 1724 */ 1725 RSU_UNLOCK(sc); 1726 while (m != NULL) { 1727 next = m->m_next; 1728 m->m_next = NULL; 1729 wh = mtod(m, struct ieee80211_frame *); 1730 ni = ieee80211_find_rxnode(ic, 1731 (struct ieee80211_frame_min *)wh); 1732 if (ni != NULL) { 1733 if (ni->ni_flags & IEEE80211_NODE_HT) 1734 m->m_flags |= M_AMPDU; 1735 (void)ieee80211_input(ni, m, rssi, 0); 1736 ieee80211_free_node(ni); 1737 } else 1738 (void)ieee80211_input_all(ic, m, rssi, 0); 1739 m = next; 1740 } 1741 RSU_LOCK(sc); 1742 break; 1743 default: 1744 /* needs it to the inactive queue due to a error. */ 1745 data = STAILQ_FIRST(&sc->sc_rx_active); 1746 if (data != NULL) { 1747 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1748 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1749 } 1750 if (error != USB_ERR_CANCELLED) { 1751 usbd_xfer_set_stall(xfer); 1752 counter_u64_add(ic->ic_ierrors, 1); 1753 goto tr_setup; 1754 } 1755 break; 1756 } 1757 1758} 1759 1760static void 1761rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1762{ 1763#ifdef USB_DEBUG 1764 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1765#endif 1766 1767 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 1768 __func__, 1769 data); 1770 1771 if (data->m) { 1772 /* XXX status? */ 1773 ieee80211_tx_complete(data->ni, data->m, 0); 1774 data->m = NULL; 1775 data->ni = NULL; 1776 } 1777} 1778 1779static void 1780rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 1781 uint8_t which) 1782{ 1783 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1784 struct ieee80211com *ic = &sc->sc_ic; 1785 struct rsu_data *data; 1786 1787 RSU_ASSERT_LOCKED(sc); 1788 1789 switch (USB_GET_STATE(xfer)) { 1790 case USB_ST_TRANSFERRED: 1791 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1792 if (data == NULL) 1793 goto tr_setup; 1794 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 1795 __func__, data); 1796 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1797 rsu_txeof(xfer, data); 1798 rsu_freebuf(sc, data); 1799 /* FALLTHROUGH */ 1800 case USB_ST_SETUP: 1801tr_setup: 1802 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 1803 if (data == NULL) { 1804 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1805 "%s: empty pending queue sc %p\n", __func__, sc); 1806 return; 1807 } 1808 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 1809 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 1810 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1811 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1812 "%s: submitting transfer %p\n", 1813 __func__, 1814 data); 1815 usbd_transfer_submit(xfer); 1816 break; 1817 default: 1818 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1819 if (data != NULL) { 1820 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1821 rsu_txeof(xfer, data); 1822 rsu_freebuf(sc, data); 1823 } 1824 counter_u64_add(ic->ic_oerrors, 1); 1825 1826 if (error != USB_ERR_CANCELLED) { 1827 usbd_xfer_set_stall(xfer); 1828 goto tr_setup; 1829 } 1830 break; 1831 } 1832} 1833 1834static void 1835rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 1836{ 1837 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 1838} 1839 1840static void 1841rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 1842{ 1843 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 1844} 1845 1846static void 1847rsu_bulk_tx_callback_h2c(struct usb_xfer *xfer, usb_error_t error) 1848{ 1849 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_H2C); 1850} 1851 1852static int 1853rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 1854 struct mbuf *m0, struct rsu_data *data) 1855{ 1856 struct ieee80211com *ic = &sc->sc_ic; 1857 struct ieee80211vap *vap = ni->ni_vap; 1858 struct ieee80211_frame *wh; 1859 struct ieee80211_key *k = NULL; 1860 struct r92s_tx_desc *txd; 1861 uint8_t type; 1862 int prio = 0; 1863 uint8_t which; 1864 int hasqos; 1865 int xferlen; 1866 int qid; 1867 1868 RSU_ASSERT_LOCKED(sc); 1869 1870 wh = mtod(m0, struct ieee80211_frame *); 1871 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1872 1873 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 1874 __func__, data, m0); 1875 1876 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1877 k = ieee80211_crypto_encap(ni, m0); 1878 if (k == NULL) { 1879 device_printf(sc->sc_dev, 1880 "ieee80211_crypto_encap returns NULL.\n"); 1881 /* XXX we don't expect the fragmented frames */ 1882 m_freem(m0); 1883 return (ENOBUFS); 1884 } 1885 wh = mtod(m0, struct ieee80211_frame *); 1886 } 1887 /* If we have QoS then use it */ 1888 /* XXX TODO: mbuf WME/PRI versus TID? */ 1889 if (IEEE80211_QOS_HAS_SEQ(wh)) { 1890 /* Has QoS */ 1891 prio = M_WME_GETAC(m0); 1892 which = rsu_wme_ac_xfer_map[prio]; 1893 hasqos = 1; 1894 } else { 1895 /* Non-QoS TID */ 1896 /* XXX TODO: tid=0 for non-qos TID? */ 1897 which = rsu_wme_ac_xfer_map[WME_AC_BE]; 1898 hasqos = 0; 1899 prio = 0; 1900 } 1901 1902 qid = rsu_ac2qid[prio]; 1903#if 0 1904 switch (type) { 1905 case IEEE80211_FC0_TYPE_CTL: 1906 case IEEE80211_FC0_TYPE_MGT: 1907 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 1908 break; 1909 default: 1910 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 1911 break; 1912 } 1913 hasqos = 0; 1914#endif 1915 1916 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: pri=%d, which=%d, hasqos=%d\n", 1917 __func__, 1918 prio, 1919 which, 1920 hasqos); 1921 1922 /* Fill Tx descriptor. */ 1923 txd = (struct r92s_tx_desc *)data->buf; 1924 memset(txd, 0, sizeof(*txd)); 1925 1926 txd->txdw0 |= htole32( 1927 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 1928 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1929 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1930 1931 txd->txdw1 |= htole32( 1932 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | SM(R92S_TXDW1_QSEL, qid)); 1933 if (!hasqos) 1934 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 1935#ifdef notyet 1936 if (k != NULL) { 1937 switch (k->wk_cipher->ic_cipher) { 1938 case IEEE80211_CIPHER_WEP: 1939 cipher = R92S_TXDW1_CIPHER_WEP; 1940 break; 1941 case IEEE80211_CIPHER_TKIP: 1942 cipher = R92S_TXDW1_CIPHER_TKIP; 1943 break; 1944 case IEEE80211_CIPHER_AES_CCM: 1945 cipher = R92S_TXDW1_CIPHER_AES; 1946 break; 1947 default: 1948 cipher = R92S_TXDW1_CIPHER_NONE; 1949 } 1950 txd->txdw1 |= htole32( 1951 SM(R92S_TXDW1_CIPHER, cipher) | 1952 SM(R92S_TXDW1_KEYIDX, k->k_id)); 1953 } 1954#endif 1955 /* XXX todo: set AGGEN bit if appropriate? */ 1956 txd->txdw2 |= htole32(R92S_TXDW2_BK); 1957 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1958 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 1959 /* 1960 * Firmware will use and increment the sequence number for the 1961 * specified priority. 1962 */ 1963 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, prio)); 1964 1965 if (ieee80211_radiotap_active_vap(vap)) { 1966 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 1967 1968 tap->wt_flags = 0; 1969 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1970 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1971 ieee80211_radiotap_tx(vap, m0); 1972 } 1973 1974 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 1975 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 1976 1977 data->buflen = xferlen; 1978 data->ni = ni; 1979 data->m = m0; 1980 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1981 1982 /* start transfer, if any */ 1983 usbd_transfer_start(sc->sc_xfer[which]); 1984 return (0); 1985} 1986 1987static int 1988rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 1989{ 1990 struct rsu_softc *sc = ic->ic_softc; 1991 int error; 1992 1993 RSU_LOCK(sc); 1994 if (!sc->sc_running) { 1995 RSU_UNLOCK(sc); 1996 return (ENXIO); 1997 } 1998 error = mbufq_enqueue(&sc->sc_snd, m); 1999 if (error) { 2000 RSU_UNLOCK(sc); 2001 return (error); 2002 } 2003 rsu_start(sc); 2004 RSU_UNLOCK(sc); 2005 2006 return (0); 2007} 2008 2009static void 2010rsu_start(struct rsu_softc *sc) 2011{ 2012 struct ieee80211_node *ni; 2013 struct rsu_data *bf; 2014 struct mbuf *m; 2015 2016 RSU_ASSERT_LOCKED(sc); 2017 2018 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2019 bf = rsu_getbuf(sc); 2020 if (bf == NULL) { 2021 mbufq_prepend(&sc->sc_snd, m); 2022 break; 2023 } 2024 2025 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2026 m->m_pkthdr.rcvif = NULL; 2027 2028 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2029 if_inc_counter(ni->ni_vap->iv_ifp, 2030 IFCOUNTER_OERRORS, 1); 2031 rsu_freebuf(sc, bf); 2032 ieee80211_free_node(ni); 2033 break; 2034 } 2035 } 2036} 2037 2038static void 2039rsu_parent(struct ieee80211com *ic) 2040{ 2041 struct rsu_softc *sc = ic->ic_softc; 2042 int startall = 0; 2043 2044 RSU_LOCK(sc); 2045 if (ic->ic_nrunning > 0) { 2046 if (!sc->sc_running) { 2047 rsu_init(sc); 2048 startall = 1; 2049 } 2050 } else if (sc->sc_running) 2051 rsu_stop(sc); 2052 RSU_UNLOCK(sc); 2053 2054 if (startall) 2055 ieee80211_start_all(ic); 2056} 2057 2058/* 2059 * Power on sequence for A-cut adapters. 2060 */ 2061static void 2062rsu_power_on_acut(struct rsu_softc *sc) 2063{ 2064 uint32_t reg; 2065 2066 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2067 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2068 2069 /* Enable AFE macro block's bandgap and Mbias. */ 2070 rsu_write_1(sc, R92S_AFE_MISC, 2071 rsu_read_1(sc, R92S_AFE_MISC) | 2072 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 2073 /* Enable LDOA15 block. */ 2074 rsu_write_1(sc, R92S_LDOA15_CTRL, 2075 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2076 2077 rsu_write_1(sc, R92S_SPS1_CTRL, 2078 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 2079 rsu_ms_delay(sc, 2000); 2080 /* Enable switch regulator block. */ 2081 rsu_write_1(sc, R92S_SPS1_CTRL, 2082 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 2083 2084 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 2085 2086 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2087 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2088 2089 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2090 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2091 2092 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2093 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 2094 2095 /* Enable AFE clock. */ 2096 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2097 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2098 /* Enable AFE PLL macro block. */ 2099 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 2100 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 2101 /* Attach AFE PLL to MACTOP/BB. */ 2102 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2103 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2104 2105 /* Switch to 40MHz clock instead of 80MHz. */ 2106 rsu_write_2(sc, R92S_SYS_CLKR, 2107 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 2108 2109 /* Enable MAC clock. */ 2110 rsu_write_2(sc, R92S_SYS_CLKR, 2111 rsu_read_2(sc, R92S_SYS_CLKR) | 2112 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2113 2114 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2115 2116 /* Enable digital core and IOREG R/W. */ 2117 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2118 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2119 2120 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2121 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2122 2123 /* Switch the control path to firmware. */ 2124 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2125 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2126 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2127 2128 rsu_write_2(sc, R92S_CR, 0x37fc); 2129 2130 /* Fix USB RX FIFO issue. */ 2131 rsu_write_1(sc, 0xfe5c, 2132 rsu_read_1(sc, 0xfe5c) | 0x80); 2133 rsu_write_1(sc, 0x00ab, 2134 rsu_read_1(sc, 0x00ab) | 0xc0); 2135 2136 rsu_write_1(sc, R92S_SYS_CLKR, 2137 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2138} 2139 2140/* 2141 * Power on sequence for B-cut and C-cut adapters. 2142 */ 2143static void 2144rsu_power_on_bcut(struct rsu_softc *sc) 2145{ 2146 uint32_t reg; 2147 int ntries; 2148 2149 /* Prevent eFuse leakage. */ 2150 rsu_write_1(sc, 0x37, 0xb0); 2151 rsu_ms_delay(sc, 10); 2152 rsu_write_1(sc, 0x37, 0x30); 2153 2154 /* Switch the control path to hardware. */ 2155 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2156 if (reg & R92S_FWHW_SEL) { 2157 rsu_write_2(sc, R92S_SYS_CLKR, 2158 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 2159 } 2160 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2161 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 2162 rsu_ms_delay(sc, 1); 2163 2164 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 2165 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 2166 2167 reg = rsu_read_1(sc, R92S_AFE_MISC); 2168 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 2169 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 2170 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 2171 2172 /* Enable PLL. */ 2173 rsu_write_1(sc, R92S_LDOA15_CTRL, 2174 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 2175 2176 rsu_write_1(sc, R92S_LDOV12D_CTRL, 2177 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 2178 2179 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2180 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 2181 2182 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2183 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 2184 2185 /* Support 64KB IMEM. */ 2186 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 2187 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 2188 2189 /* Enable AFE clock. */ 2190 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 2191 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 2192 /* Enable AFE PLL macro block. */ 2193 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 2194 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2195 rsu_ms_delay(sc, 1); 2196 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 2197 rsu_ms_delay(sc, 1); 2198 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 2199 rsu_ms_delay(sc, 1); 2200 2201 /* Attach AFE PLL to MACTOP/BB. */ 2202 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2203 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2204 2205 /* Switch to 40MHz clock. */ 2206 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2207 /* Disable CPU clock and 80MHz SSC. */ 2208 rsu_write_1(sc, R92S_SYS_CLKR, 2209 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2210 /* Enable MAC clock. */ 2211 rsu_write_2(sc, R92S_SYS_CLKR, 2212 rsu_read_2(sc, R92S_SYS_CLKR) | 2213 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2214 2215 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2216 2217 /* Enable digital core and IOREG R/W. */ 2218 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2219 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2220 2221 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2222 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2223 2224 /* Switch the control path to firmware. */ 2225 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2226 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2227 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2228 2229 rsu_write_2(sc, R92S_CR, 0x37fc); 2230 2231 /* Fix USB RX FIFO issue. */ 2232 rsu_write_1(sc, 0xfe5c, 2233 rsu_read_1(sc, 0xfe5c) | 0x80); 2234 2235 rsu_write_1(sc, R92S_SYS_CLKR, 2236 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2237 2238 rsu_write_1(sc, 0xfe1c, 0x80); 2239 2240 /* Make sure TxDMA is ready to download firmware. */ 2241 for (ntries = 0; ntries < 20; ntries++) { 2242 reg = rsu_read_1(sc, R92S_TCR); 2243 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2244 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2245 break; 2246 rsu_ms_delay(sc, 1); 2247 } 2248 if (ntries == 20) { 2249 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2250 "%s: TxDMA is not ready\n", 2251 __func__); 2252 /* Reset TxDMA. */ 2253 reg = rsu_read_1(sc, R92S_CR); 2254 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2255 rsu_ms_delay(sc, 1); 2256 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2257 } 2258} 2259 2260static void 2261rsu_power_off(struct rsu_softc *sc) 2262{ 2263 /* Turn RF off. */ 2264 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2265 rsu_ms_delay(sc, 5); 2266 2267 /* Turn MAC off. */ 2268 /* Switch control path. */ 2269 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2270 /* Reset MACTOP. */ 2271 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2272 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2273 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2274 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2275 2276 /* Disable AFE PLL. */ 2277 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2278 /* Disable A15V. */ 2279 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2280 /* Disable eFuse 1.2V. */ 2281 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2282 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2283 /* Enable AFE macro block's bandgap and Mbias. */ 2284 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2285 /* Disable 1.6V LDO. */ 2286 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2287 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2288} 2289 2290static int 2291rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2292{ 2293 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2294 struct rsu_data *data; 2295 struct r92s_tx_desc *txd; 2296 int mlen; 2297 2298 while (len > 0) { 2299 data = rsu_getbuf(sc); 2300 if (data == NULL) 2301 return (ENOMEM); 2302 txd = (struct r92s_tx_desc *)data->buf; 2303 memset(txd, 0, sizeof(*txd)); 2304 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2305 /* Last chunk. */ 2306 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2307 mlen = len; 2308 } else 2309 mlen = RSU_TXBUFSZ - sizeof(*txd); 2310 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2311 memcpy(&txd[1], buf, mlen); 2312 data->buflen = sizeof(*txd) + mlen; 2313 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2314 "%s: starting transfer %p\n", 2315 __func__, data); 2316 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2317 buf += mlen; 2318 len -= mlen; 2319 } 2320 usbd_transfer_start(sc->sc_xfer[which]); 2321 return (0); 2322} 2323 2324static int 2325rsu_load_firmware(struct rsu_softc *sc) 2326{ 2327 const struct r92s_fw_hdr *hdr; 2328 struct r92s_fw_priv *dmem; 2329 struct ieee80211com *ic = &sc->sc_ic; 2330 const uint8_t *imem, *emem; 2331 int imemsz, ememsz; 2332 const struct firmware *fw; 2333 size_t size; 2334 uint32_t reg; 2335 int ntries, error; 2336 2337 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2338 RSU_DPRINTF(sc, RSU_DEBUG_FW | RSU_DEBUG_RESET, 2339 "%s: Firmware already loaded\n", 2340 __func__); 2341 return (0); 2342 } 2343 2344 RSU_UNLOCK(sc); 2345 /* Read firmware image from the filesystem. */ 2346 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2347 device_printf(sc->sc_dev, 2348 "%s: failed load firmware of file rsu-rtl8712fw\n", 2349 __func__); 2350 RSU_LOCK(sc); 2351 return (ENXIO); 2352 } 2353 RSU_LOCK(sc); 2354 size = fw->datasize; 2355 if (size < sizeof(*hdr)) { 2356 device_printf(sc->sc_dev, "firmware too short\n"); 2357 error = EINVAL; 2358 goto fail; 2359 } 2360 hdr = (const struct r92s_fw_hdr *)fw->data; 2361 if (hdr->signature != htole16(0x8712) && 2362 hdr->signature != htole16(0x8192)) { 2363 device_printf(sc->sc_dev, 2364 "invalid firmware signature 0x%x\n", 2365 le16toh(hdr->signature)); 2366 error = EINVAL; 2367 goto fail; 2368 } 2369 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2370 hdr->month, hdr->day, hdr->hour, hdr->minute); 2371 2372 /* Make sure that driver and firmware are in sync. */ 2373 if (hdr->privsz != htole32(sizeof(*dmem))) { 2374 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2375 error = EINVAL; 2376 goto fail; 2377 } 2378 /* Get FW sections sizes. */ 2379 imemsz = le32toh(hdr->imemsz); 2380 ememsz = le32toh(hdr->sramsz); 2381 /* Check that all FW sections fit in image. */ 2382 if (size < sizeof(*hdr) + imemsz + ememsz) { 2383 device_printf(sc->sc_dev, "firmware too short\n"); 2384 error = EINVAL; 2385 goto fail; 2386 } 2387 imem = (const uint8_t *)&hdr[1]; 2388 emem = imem + imemsz; 2389 2390 /* Load IMEM section. */ 2391 error = rsu_fw_loadsection(sc, imem, imemsz); 2392 if (error != 0) { 2393 device_printf(sc->sc_dev, 2394 "could not load firmware section %s\n", "IMEM"); 2395 goto fail; 2396 } 2397 /* Wait for load to complete. */ 2398 for (ntries = 0; ntries != 50; ntries++) { 2399 rsu_ms_delay(sc, 10); 2400 reg = rsu_read_1(sc, R92S_TCR); 2401 if (reg & R92S_TCR_IMEM_CODE_DONE) 2402 break; 2403 } 2404 if (ntries == 50) { 2405 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2406 error = ETIMEDOUT; 2407 goto fail; 2408 } 2409 /* Load EMEM section. */ 2410 error = rsu_fw_loadsection(sc, emem, ememsz); 2411 if (error != 0) { 2412 device_printf(sc->sc_dev, 2413 "could not load firmware section %s\n", "EMEM"); 2414 goto fail; 2415 } 2416 /* Wait for load to complete. */ 2417 for (ntries = 0; ntries != 50; ntries++) { 2418 rsu_ms_delay(sc, 10); 2419 reg = rsu_read_2(sc, R92S_TCR); 2420 if (reg & R92S_TCR_EMEM_CODE_DONE) 2421 break; 2422 } 2423 if (ntries == 50) { 2424 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2425 error = ETIMEDOUT; 2426 goto fail; 2427 } 2428 /* Enable CPU. */ 2429 rsu_write_1(sc, R92S_SYS_CLKR, 2430 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2431 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2432 device_printf(sc->sc_dev, "could not enable system clock\n"); 2433 error = EIO; 2434 goto fail; 2435 } 2436 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2437 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2438 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2439 device_printf(sc->sc_dev, 2440 "could not enable microcontroller\n"); 2441 error = EIO; 2442 goto fail; 2443 } 2444 /* Wait for CPU to initialize. */ 2445 for (ntries = 0; ntries < 100; ntries++) { 2446 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2447 break; 2448 rsu_ms_delay(sc, 1); 2449 } 2450 if (ntries == 100) { 2451 device_printf(sc->sc_dev, 2452 "timeout waiting for microcontroller\n"); 2453 error = ETIMEDOUT; 2454 goto fail; 2455 } 2456 2457 /* Update DMEM section before loading. */ 2458 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2459 memset(dmem, 0, sizeof(*dmem)); 2460 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2461 dmem->nendpoints = sc->sc_nendpoints; 2462 /* XXX TODO: rf_config should come from ROM */ 2463 dmem->rf_config = 0x11; /* 1T1R */ 2464 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2465 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2466 dmem->turbo_mode = 0; 2467 dmem->bw40_en = !! (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40); 2468 dmem->amsdu2ampdu_en = !! (sc->sc_ht); 2469 dmem->ampdu_en = !! (sc->sc_ht); 2470 dmem->agg_offload = !! (sc->sc_ht); 2471 dmem->qos_en = 1; 2472 /* Load DMEM section. */ 2473 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2474 if (error != 0) { 2475 device_printf(sc->sc_dev, 2476 "could not load firmware section %s\n", "DMEM"); 2477 goto fail; 2478 } 2479 /* Wait for load to complete. */ 2480 for (ntries = 0; ntries < 100; ntries++) { 2481 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2482 break; 2483 rsu_ms_delay(sc, 1); 2484 } 2485 if (ntries == 100) { 2486 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2487 "DMEM"); 2488 error = ETIMEDOUT; 2489 goto fail; 2490 } 2491 /* Wait for firmware readiness. */ 2492 for (ntries = 0; ntries < 60; ntries++) { 2493 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2494 break; 2495 rsu_ms_delay(sc, 1); 2496 } 2497 if (ntries == 60) { 2498 device_printf(sc->sc_dev, 2499 "timeout waiting for firmware readiness\n"); 2500 error = ETIMEDOUT; 2501 goto fail; 2502 } 2503 fail: 2504 firmware_put(fw, FIRMWARE_UNLOAD); 2505 return (error); 2506} 2507 2508 2509static int 2510rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2511 const struct ieee80211_bpf_params *params) 2512{ 2513 struct ieee80211com *ic = ni->ni_ic; 2514 struct rsu_softc *sc = ic->ic_softc; 2515 struct rsu_data *bf; 2516 2517 /* prevent management frames from being sent if we're not ready */ 2518 if (!sc->sc_running) { 2519 m_freem(m); 2520 ieee80211_free_node(ni); 2521 return (ENETDOWN); 2522 } 2523 RSU_LOCK(sc); 2524 bf = rsu_getbuf(sc); 2525 if (bf == NULL) { 2526 ieee80211_free_node(ni); 2527 m_freem(m); 2528 RSU_UNLOCK(sc); 2529 return (ENOBUFS); 2530 } 2531 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2532 ieee80211_free_node(ni); 2533 rsu_freebuf(sc, bf); 2534 RSU_UNLOCK(sc); 2535 return (EIO); 2536 } 2537 RSU_UNLOCK(sc); 2538 2539 return (0); 2540} 2541 2542static void 2543rsu_init(struct rsu_softc *sc) 2544{ 2545 struct ieee80211com *ic = &sc->sc_ic; 2546 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2547 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2548 struct r92s_set_pwr_mode cmd; 2549 int error; 2550 int i; 2551 2552 RSU_ASSERT_LOCKED(sc); 2553 2554 /* Init host async commands ring. */ 2555 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2556 2557 /* Power on adapter. */ 2558 if (sc->cut == 1) 2559 rsu_power_on_acut(sc); 2560 else 2561 rsu_power_on_bcut(sc); 2562 2563 /* Load firmware. */ 2564 error = rsu_load_firmware(sc); 2565 if (error != 0) 2566 goto fail; 2567 2568 /* Enable Rx TCP checksum offload. */ 2569 rsu_write_4(sc, R92S_RCR, 2570 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2571 /* Append PHY status. */ 2572 rsu_write_4(sc, R92S_RCR, 2573 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2574 2575 rsu_write_4(sc, R92S_CR, 2576 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2577 2578 /* Use 128 bytes pages. */ 2579 rsu_write_1(sc, 0x00b5, 2580 rsu_read_1(sc, 0x00b5) | 0x01); 2581 /* Enable USB Rx aggregation. */ 2582 rsu_write_1(sc, 0x00bd, 2583 rsu_read_1(sc, 0x00bd) | 0x80); 2584 /* Set USB Rx aggregation threshold. */ 2585 rsu_write_1(sc, 0x00d9, 0x01); 2586 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2587 rsu_write_1(sc, 0xfe5b, 0x04); 2588 /* Fix USB Rx FIFO issue. */ 2589 rsu_write_1(sc, 0xfe5c, 2590 rsu_read_1(sc, 0xfe5c) | 0x80); 2591 2592 /* Set MAC address. */ 2593 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2594 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2595 2596 /* It really takes 1.5 seconds for the firmware to boot: */ 2597 rsu_ms_delay(sc, 2000); 2598 2599 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2600 __func__, 2601 ether_sprintf(macaddr)); 2602 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2603 IEEE80211_ADDR_LEN); 2604 if (error != 0) { 2605 device_printf(sc->sc_dev, "could not set MAC address\n"); 2606 goto fail; 2607 } 2608 2609 rsu_write_1(sc, R92S_USB_HRPWM, 2610 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 2611 2612 /* Set PS mode fully active */ 2613 memset(&cmd, 0, sizeof(cmd)); 2614 cmd.mode = R92S_PS_MODE_ACTIVE; 2615 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting ps mode to %d\n", 2616 __func__, cmd.mode); 2617 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 2618 if (error != 0) { 2619 device_printf(sc->sc_dev, "could not set PS mode\n"); 2620 goto fail; 2621 } 2622 2623 if (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40) { 2624 /* Enable 40MHz mode. */ 2625 error = rsu_fw_iocmd(sc, 2626 SM(R92S_IOCMD_CLASS, 0xf4) | 2627 SM(R92S_IOCMD_INDEX, 0x00) | 2628 SM(R92S_IOCMD_VALUE, 0x0007)); 2629 if (error != 0) { 2630 device_printf(sc->sc_dev, 2631 "could not enable 40MHz mode\n"); 2632 goto fail; 2633 } 2634 } 2635 2636 sc->sc_scan_pass = 0; 2637 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2638 2639 /* We're ready to go. */ 2640 sc->sc_running = 1; 2641 sc->sc_scanning = 0; 2642 return; 2643fail: 2644 /* Need to stop all failed transfers, if any */ 2645 for (i = 0; i != RSU_N_TRANSFER; i++) 2646 usbd_transfer_stop(sc->sc_xfer[i]); 2647} 2648 2649static void 2650rsu_stop(struct rsu_softc *sc) 2651{ 2652 int i; 2653 2654 sc->sc_running = 0; 2655 sc->sc_calibrating = 0; 2656 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2657 2658 /* Power off adapter. */ 2659 rsu_power_off(sc); 2660 2661 for (i = 0; i < RSU_N_TRANSFER; i++) 2662 usbd_transfer_stop(sc->sc_xfer[i]); 2663} 2664 2665/* 2666 * Note: usb_pause_mtx() actually releases the mutex before calling pause(), 2667 * which breaks any kind of driver serialisation. 2668 */ 2669static void 2670rsu_ms_delay(struct rsu_softc *sc, int ms) 2671{ 2672 2673 //usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2674 DELAY(ms * 1000); 2675} 2676