if_rsu.c revision 287742
1/* $OpenBSD: if_rsu.c,v 1.17 2013/04/15 09:23:01 mglocker Exp $ */ 2 3/*- 4 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18#include <sys/cdefs.h> 19__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_rsu.c 287742 2015-09-13 05:22:20Z adrian $"); 20 21/* 22 * Driver for Realtek RTL8188SU/RTL8191SU/RTL8192SU. 23 * 24 * TODO: 25 * o 11n support 26 * o h/w crypto 27 * o hostap / ibss / mesh 28 */ 29 30#include <sys/param.h> 31#include <sys/endian.h> 32#include <sys/sockio.h> 33#include <sys/mbuf.h> 34#include <sys/kernel.h> 35#include <sys/socket.h> 36#include <sys/systm.h> 37#include <sys/conf.h> 38#include <sys/bus.h> 39#include <sys/rman.h> 40#include <sys/firmware.h> 41#include <sys/module.h> 42 43#include <machine/bus.h> 44#include <machine/resource.h> 45 46#include <net/bpf.h> 47#include <net/if.h> 48#include <net/if_var.h> 49#include <net/if_arp.h> 50#include <net/if_dl.h> 51#include <net/if_media.h> 52#include <net/if_types.h> 53 54#include <netinet/in.h> 55#include <netinet/in_systm.h> 56#include <netinet/in_var.h> 57#include <netinet/if_ether.h> 58#include <netinet/ip.h> 59 60#include <net80211/ieee80211_var.h> 61#include <net80211/ieee80211_regdomain.h> 62#include <net80211/ieee80211_radiotap.h> 63 64#include <dev/usb/usb.h> 65#include <dev/usb/usbdi.h> 66#include "usbdevs.h" 67 68#define USB_DEBUG_VAR rsu_debug 69#include <dev/usb/usb_debug.h> 70 71#include <dev/usb/wlan/if_rsureg.h> 72 73#ifdef USB_DEBUG 74static int rsu_debug = 0; 75SYSCTL_NODE(_hw_usb, OID_AUTO, rsu, CTLFLAG_RW, 0, "USB rsu"); 76SYSCTL_INT(_hw_usb_rsu, OID_AUTO, debug, CTLFLAG_RWTUN, &rsu_debug, 0, 77 "Debug level"); 78#define RSU_DPRINTF(_sc, _flg, ...) \ 79 do \ 80 if (((_flg) == (RSU_DEBUG_ANY)) || (rsu_debug & (_flg))) \ 81 device_printf((_sc)->sc_dev, __VA_ARGS__); \ 82 while (0) 83#else 84#define RSU_DPRINTF(_sc, _flg, ...) 85#endif 86 87#define RSU_DEBUG_ANY 0xffffffff 88#define RSU_DEBUG_TX 0x00000001 89#define RSU_DEBUG_RX 0x00000002 90#define RSU_DEBUG_RESET 0x00000004 91#define RSU_DEBUG_CALIB 0x00000008 92#define RSU_DEBUG_STATE 0x00000010 93#define RSU_DEBUG_SCAN 0x00000020 94#define RSU_DEBUG_FWCMD 0x00000040 95#define RSU_DEBUG_TXDONE 0x00000080 96#define RSU_DEBUG_FW 0x00000100 97#define RSU_DEBUG_FWDBG 0x00000200 98 99static const STRUCT_USB_HOST_ID rsu_devs[] = { 100#define RSU_HT_NOT_SUPPORTED 0 101#define RSU_HT_SUPPORTED 1 102#define RSU_DEV_HT(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 103 RSU_HT_SUPPORTED) } 104#define RSU_DEV(v,p) { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, \ 105 RSU_HT_NOT_SUPPORTED) } 106 RSU_DEV(ASUS, RTL8192SU), 107 RSU_DEV(AZUREWAVE, RTL8192SU_4), 108 RSU_DEV_HT(ACCTON, RTL8192SU), 109 RSU_DEV_HT(ASUS, USBN10), 110 RSU_DEV_HT(AZUREWAVE, RTL8192SU_1), 111 RSU_DEV_HT(AZUREWAVE, RTL8192SU_2), 112 RSU_DEV_HT(AZUREWAVE, RTL8192SU_3), 113 RSU_DEV_HT(AZUREWAVE, RTL8192SU_5), 114 RSU_DEV_HT(BELKIN, RTL8192SU_1), 115 RSU_DEV_HT(BELKIN, RTL8192SU_2), 116 RSU_DEV_HT(BELKIN, RTL8192SU_3), 117 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_1), 118 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_2), 119 RSU_DEV_HT(CONCEPTRONIC2, RTL8192SU_3), 120 RSU_DEV_HT(COREGA, RTL8192SU), 121 RSU_DEV_HT(DLINK2, DWA131A1), 122 RSU_DEV_HT(DLINK2, RTL8192SU_1), 123 RSU_DEV_HT(DLINK2, RTL8192SU_2), 124 RSU_DEV_HT(EDIMAX, RTL8192SU_1), 125 RSU_DEV_HT(EDIMAX, RTL8192SU_2), 126 RSU_DEV_HT(EDIMAX, EW7622UMN), 127 RSU_DEV_HT(GUILLEMOT, HWGUN54), 128 RSU_DEV_HT(GUILLEMOT, HWNUM300), 129 RSU_DEV_HT(HAWKING, RTL8192SU_1), 130 RSU_DEV_HT(HAWKING, RTL8192SU_2), 131 RSU_DEV_HT(PLANEX2, GWUSNANO), 132 RSU_DEV_HT(REALTEK, RTL8171), 133 RSU_DEV_HT(REALTEK, RTL8172), 134 RSU_DEV_HT(REALTEK, RTL8173), 135 RSU_DEV_HT(REALTEK, RTL8174), 136 RSU_DEV_HT(REALTEK, RTL8192SU), 137 RSU_DEV_HT(REALTEK, RTL8712), 138 RSU_DEV_HT(REALTEK, RTL8713), 139 RSU_DEV_HT(SENAO, RTL8192SU_1), 140 RSU_DEV_HT(SENAO, RTL8192SU_2), 141 RSU_DEV_HT(SITECOMEU, WL349V1), 142 RSU_DEV_HT(SITECOMEU, WL353), 143 RSU_DEV_HT(SWEEX2, LW154), 144 RSU_DEV_HT(TRENDNET, TEW646UBH), 145#undef RSU_DEV_HT 146#undef RSU_DEV 147}; 148 149static device_probe_t rsu_match; 150static device_attach_t rsu_attach; 151static device_detach_t rsu_detach; 152static usb_callback_t rsu_bulk_tx_callback_be_bk; 153static usb_callback_t rsu_bulk_tx_callback_vi_vo; 154static usb_callback_t rsu_bulk_rx_callback; 155static usb_error_t rsu_do_request(struct rsu_softc *, 156 struct usb_device_request *, void *); 157static struct ieee80211vap * 158 rsu_vap_create(struct ieee80211com *, const char name[], 159 int, enum ieee80211_opmode, int, const uint8_t bssid[], 160 const uint8_t mac[]); 161static void rsu_vap_delete(struct ieee80211vap *); 162static void rsu_scan_start(struct ieee80211com *); 163static void rsu_scan_end(struct ieee80211com *); 164static void rsu_set_channel(struct ieee80211com *); 165static void rsu_update_mcast(struct ieee80211com *); 166static int rsu_alloc_rx_list(struct rsu_softc *); 167static void rsu_free_rx_list(struct rsu_softc *); 168static int rsu_alloc_tx_list(struct rsu_softc *); 169static void rsu_free_tx_list(struct rsu_softc *); 170static void rsu_free_list(struct rsu_softc *, struct rsu_data [], int); 171static struct rsu_data *_rsu_getbuf(struct rsu_softc *); 172static struct rsu_data *rsu_getbuf(struct rsu_softc *); 173static int rsu_write_region_1(struct rsu_softc *, uint16_t, uint8_t *, 174 int); 175static void rsu_write_1(struct rsu_softc *, uint16_t, uint8_t); 176static void rsu_write_2(struct rsu_softc *, uint16_t, uint16_t); 177static void rsu_write_4(struct rsu_softc *, uint16_t, uint32_t); 178static int rsu_read_region_1(struct rsu_softc *, uint16_t, uint8_t *, 179 int); 180static uint8_t rsu_read_1(struct rsu_softc *, uint16_t); 181static uint16_t rsu_read_2(struct rsu_softc *, uint16_t); 182static uint32_t rsu_read_4(struct rsu_softc *, uint16_t); 183static int rsu_fw_iocmd(struct rsu_softc *, uint32_t); 184static uint8_t rsu_efuse_read_1(struct rsu_softc *, uint16_t); 185static int rsu_read_rom(struct rsu_softc *); 186static int rsu_fw_cmd(struct rsu_softc *, uint8_t, void *, int); 187static void rsu_calib_task(void *, int); 188static int rsu_newstate(struct ieee80211vap *, enum ieee80211_state, int); 189#ifdef notyet 190static void rsu_set_key(struct rsu_softc *, const struct ieee80211_key *); 191static void rsu_delete_key(struct rsu_softc *, const struct ieee80211_key *); 192#endif 193static int rsu_site_survey(struct rsu_softc *, struct ieee80211vap *); 194static int rsu_join_bss(struct rsu_softc *, struct ieee80211_node *); 195static int rsu_disconnect(struct rsu_softc *); 196static void rsu_event_survey(struct rsu_softc *, uint8_t *, int); 197static void rsu_event_join_bss(struct rsu_softc *, uint8_t *, int); 198static void rsu_rx_event(struct rsu_softc *, uint8_t, uint8_t *, int); 199static void rsu_rx_multi_event(struct rsu_softc *, uint8_t *, int); 200static int8_t rsu_get_rssi(struct rsu_softc *, int, void *); 201static struct mbuf * 202 rsu_rx_frame(struct rsu_softc *, uint8_t *, int, int *); 203static struct mbuf * 204 rsu_rx_multi_frame(struct rsu_softc *, uint8_t *, int, int *); 205static struct mbuf * 206 rsu_rxeof(struct usb_xfer *, struct rsu_data *, int *); 207static void rsu_txeof(struct usb_xfer *, struct rsu_data *); 208static int rsu_raw_xmit(struct ieee80211_node *, struct mbuf *, 209 const struct ieee80211_bpf_params *); 210static void rsu_init(struct rsu_softc *); 211static int rsu_tx_start(struct rsu_softc *, struct ieee80211_node *, 212 struct mbuf *, struct rsu_data *); 213static int rsu_transmit(struct ieee80211com *, struct mbuf *); 214static void rsu_start(struct rsu_softc *); 215static void rsu_parent(struct ieee80211com *); 216static void rsu_stop(struct rsu_softc *); 217static void rsu_ms_delay(struct rsu_softc *); 218 219static device_method_t rsu_methods[] = { 220 DEVMETHOD(device_probe, rsu_match), 221 DEVMETHOD(device_attach, rsu_attach), 222 DEVMETHOD(device_detach, rsu_detach), 223 224 DEVMETHOD_END 225}; 226 227static driver_t rsu_driver = { 228 .name = "rsu", 229 .methods = rsu_methods, 230 .size = sizeof(struct rsu_softc) 231}; 232 233static devclass_t rsu_devclass; 234 235DRIVER_MODULE(rsu, uhub, rsu_driver, rsu_devclass, NULL, 0); 236MODULE_DEPEND(rsu, wlan, 1, 1, 1); 237MODULE_DEPEND(rsu, usb, 1, 1, 1); 238MODULE_DEPEND(rsu, firmware, 1, 1, 1); 239MODULE_VERSION(rsu, 1); 240 241static uint8_t rsu_wme_ac_xfer_map[4] = { 242 [WME_AC_BE] = RSU_BULK_TX_BE_BK, 243 [WME_AC_BK] = RSU_BULK_TX_BE_BK, 244 [WME_AC_VI] = RSU_BULK_TX_VI_VO, 245 [WME_AC_VO] = RSU_BULK_TX_VI_VO, 246}; 247 248static const struct usb_config rsu_config[RSU_N_TRANSFER] = { 249 [RSU_BULK_RX] = { 250 .type = UE_BULK, 251 .endpoint = UE_ADDR_ANY, 252 .direction = UE_DIR_IN, 253 .bufsize = RSU_RXBUFSZ, 254 .flags = { 255 .pipe_bof = 1, 256 .short_xfer_ok = 1 257 }, 258 .callback = rsu_bulk_rx_callback 259 }, 260 [RSU_BULK_TX_BE_BK] = { 261 .type = UE_BULK, 262 .endpoint = 0x06, 263 .direction = UE_DIR_OUT, 264 .bufsize = RSU_TXBUFSZ, 265 .flags = { 266 .ext_buffer = 1, 267 .pipe_bof = 1, 268 .force_short_xfer = 1 269 }, 270 .callback = rsu_bulk_tx_callback_be_bk, 271 .timeout = RSU_TX_TIMEOUT 272 }, 273 [RSU_BULK_TX_VI_VO] = { 274 .type = UE_BULK, 275 .endpoint = 0x04, 276 .direction = UE_DIR_OUT, 277 .bufsize = RSU_TXBUFSZ, 278 .flags = { 279 .ext_buffer = 1, 280 .pipe_bof = 1, 281 .force_short_xfer = 1 282 }, 283 .callback = rsu_bulk_tx_callback_vi_vo, 284 .timeout = RSU_TX_TIMEOUT 285 }, 286}; 287 288static int 289rsu_match(device_t self) 290{ 291 struct usb_attach_arg *uaa = device_get_ivars(self); 292 293 if (uaa->usb_mode != USB_MODE_HOST || 294 uaa->info.bIfaceIndex != 0 || 295 uaa->info.bConfigIndex != 0) 296 return (ENXIO); 297 298 return (usbd_lookup_id_by_uaa(rsu_devs, sizeof(rsu_devs), uaa)); 299} 300 301static int 302rsu_attach(device_t self) 303{ 304 struct usb_attach_arg *uaa = device_get_ivars(self); 305 struct rsu_softc *sc = device_get_softc(self); 306 struct ieee80211com *ic = &sc->sc_ic; 307 int error; 308 uint8_t iface_index, bands; 309 310 device_set_usb_desc(self); 311 sc->sc_udev = uaa->device; 312 sc->sc_dev = self; 313 314 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK, 315 MTX_DEF); 316 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_task, 0, 317 rsu_calib_task, sc); 318 mbufq_init(&sc->sc_snd, ifqmaxlen); 319 320 /* Allocate Tx/Rx buffers. */ 321 error = rsu_alloc_rx_list(sc); 322 if (error != 0) { 323 device_printf(sc->sc_dev, "could not allocate Rx buffers\n"); 324 goto fail_usb; 325 } 326 327 error = rsu_alloc_tx_list(sc); 328 if (error != 0) { 329 device_printf(sc->sc_dev, "could not allocate Tx buffers\n"); 330 rsu_free_rx_list(sc); 331 goto fail_usb; 332 } 333 334 iface_index = 0; 335 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 336 rsu_config, RSU_N_TRANSFER, sc, &sc->sc_mtx); 337 if (error) { 338 device_printf(sc->sc_dev, 339 "could not allocate USB transfers, err=%s\n", 340 usbd_errstr(error)); 341 goto fail_usb; 342 } 343 RSU_LOCK(sc); 344 /* Read chip revision. */ 345 sc->cut = MS(rsu_read_4(sc, R92S_PMC_FSM), R92S_PMC_FSM_CUT); 346 if (sc->cut != 3) 347 sc->cut = (sc->cut >> 1) + 1; 348 error = rsu_read_rom(sc); 349 RSU_UNLOCK(sc); 350 if (error != 0) { 351 device_printf(self, "could not read ROM\n"); 352 goto fail_rom; 353 } 354 IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]); 355 device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut); 356 357 ic->ic_softc = sc; 358 ic->ic_name = device_get_nameunit(self); 359 ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ 360 ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ 361 362 /* Set device capabilities. */ 363 ic->ic_caps = 364 IEEE80211_C_STA | /* station mode */ 365#if 0 366 IEEE80211_C_BGSCAN | /* Background scan. */ 367#endif 368 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */ 369 IEEE80211_C_SHSLOT | /* Short slot time supported. */ 370 IEEE80211_C_WPA; /* WPA/RSN. */ 371 372#if 0 373 /* Check if HT support is present. */ 374 if (usb_lookup(rsu_devs_noht, uaa->vendor, uaa->product) == NULL) { 375 /* Set HT capabilities. */ 376 ic->ic_htcaps = 377 IEEE80211_HTCAP_CBW20_40 | 378 IEEE80211_HTCAP_DSSSCCK40; 379 /* Set supported HT rates. */ 380 for (i = 0; i < 2; i++) 381 ic->ic_sup_mcs[i] = 0xff; 382 } 383#endif 384 385 /* Set supported .11b and .11g rates. */ 386 bands = 0; 387 setbit(&bands, IEEE80211_MODE_11B); 388 setbit(&bands, IEEE80211_MODE_11G); 389 ieee80211_init_channels(ic, NULL, &bands); 390 391 ieee80211_ifattach(ic); 392 ic->ic_raw_xmit = rsu_raw_xmit; 393 ic->ic_scan_start = rsu_scan_start; 394 ic->ic_scan_end = rsu_scan_end; 395 ic->ic_set_channel = rsu_set_channel; 396 ic->ic_vap_create = rsu_vap_create; 397 ic->ic_vap_delete = rsu_vap_delete; 398 ic->ic_update_mcast = rsu_update_mcast; 399 ic->ic_parent = rsu_parent; 400 ic->ic_transmit = rsu_transmit; 401 402 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 403 sizeof(sc->sc_txtap), RSU_TX_RADIOTAP_PRESENT, 404 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 405 RSU_RX_RADIOTAP_PRESENT); 406 407 if (bootverbose) 408 ieee80211_announce(ic); 409 410 return (0); 411 412fail_rom: 413 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 414fail_usb: 415 mtx_destroy(&sc->sc_mtx); 416 return (ENXIO); 417} 418 419static int 420rsu_detach(device_t self) 421{ 422 struct rsu_softc *sc = device_get_softc(self); 423 struct ieee80211com *ic = &sc->sc_ic; 424 425 RSU_LOCK(sc); 426 rsu_stop(sc); 427 RSU_UNLOCK(sc); 428 usbd_transfer_unsetup(sc->sc_xfer, RSU_N_TRANSFER); 429 ieee80211_ifdetach(ic); 430 431 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 432 433 /* Free Tx/Rx buffers. */ 434 rsu_free_tx_list(sc); 435 rsu_free_rx_list(sc); 436 437 mbufq_drain(&sc->sc_snd); 438 mtx_destroy(&sc->sc_mtx); 439 440 return (0); 441} 442 443static usb_error_t 444rsu_do_request(struct rsu_softc *sc, struct usb_device_request *req, 445 void *data) 446{ 447 usb_error_t err; 448 int ntries = 10; 449 450 RSU_ASSERT_LOCKED(sc); 451 452 while (ntries--) { 453 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 454 req, data, 0, NULL, 250 /* ms */); 455 if (err == 0 || err == USB_ERR_NOT_CONFIGURED) 456 break; 457 DPRINTFN(1, "Control request failed, %s (retrying)\n", 458 usbd_errstr(err)); 459 usb_pause_mtx(&sc->sc_mtx, hz / 100); 460 } 461 462 return (err); 463} 464 465static struct ieee80211vap * 466rsu_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 467 enum ieee80211_opmode opmode, int flags, 468 const uint8_t bssid[IEEE80211_ADDR_LEN], 469 const uint8_t mac[IEEE80211_ADDR_LEN]) 470{ 471 struct rsu_vap *uvp; 472 struct ieee80211vap *vap; 473 474 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 475 return (NULL); 476 477 uvp = malloc(sizeof(struct rsu_vap), M_80211_VAP, M_WAITOK | M_ZERO); 478 vap = &uvp->vap; 479 480 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 481 flags, bssid) != 0) { 482 /* out of memory */ 483 free(uvp, M_80211_VAP); 484 return (NULL); 485 } 486 487 /* override state transition machine */ 488 uvp->newstate = vap->iv_newstate; 489 vap->iv_newstate = rsu_newstate; 490 491 /* complete setup */ 492 ieee80211_vap_attach(vap, ieee80211_media_change, 493 ieee80211_media_status, mac); 494 ic->ic_opmode = opmode; 495 496 return (vap); 497} 498 499static void 500rsu_vap_delete(struct ieee80211vap *vap) 501{ 502 struct rsu_vap *uvp = RSU_VAP(vap); 503 504 ieee80211_vap_detach(vap); 505 free(uvp, M_80211_VAP); 506} 507 508static void 509rsu_scan_start(struct ieee80211com *ic) 510{ 511 struct rsu_softc *sc = ic->ic_softc; 512 int error; 513 514 /* Scanning is done by the firmware. */ 515 RSU_LOCK(sc); 516 error = rsu_site_survey(sc, TAILQ_FIRST(&ic->ic_vaps)); 517 RSU_UNLOCK(sc); 518 if (error != 0) 519 device_printf(sc->sc_dev, 520 "could not send site survey command\n"); 521} 522 523static void 524rsu_scan_end(struct ieee80211com *ic) 525{ 526 /* Nothing to do here. */ 527} 528 529static void 530rsu_set_channel(struct ieee80211com *ic __unused) 531{ 532 /* We are unable to switch channels, yet. */ 533} 534 535static void 536rsu_update_mcast(struct ieee80211com *ic) 537{ 538 /* XXX do nothing? */ 539} 540 541static int 542rsu_alloc_list(struct rsu_softc *sc, struct rsu_data data[], 543 int ndata, int maxsz) 544{ 545 int i, error; 546 547 for (i = 0; i < ndata; i++) { 548 struct rsu_data *dp = &data[i]; 549 dp->sc = sc; 550 dp->m = NULL; 551 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 552 if (dp->buf == NULL) { 553 device_printf(sc->sc_dev, 554 "could not allocate buffer\n"); 555 error = ENOMEM; 556 goto fail; 557 } 558 dp->ni = NULL; 559 } 560 561 return (0); 562fail: 563 rsu_free_list(sc, data, ndata); 564 return (error); 565} 566 567static int 568rsu_alloc_rx_list(struct rsu_softc *sc) 569{ 570 int error, i; 571 572 error = rsu_alloc_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT, 573 RSU_RXBUFSZ); 574 if (error != 0) 575 return (error); 576 577 STAILQ_INIT(&sc->sc_rx_active); 578 STAILQ_INIT(&sc->sc_rx_inactive); 579 580 for (i = 0; i < RSU_RX_LIST_COUNT; i++) 581 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 582 583 return (0); 584} 585 586static int 587rsu_alloc_tx_list(struct rsu_softc *sc) 588{ 589 int error, i; 590 591 error = rsu_alloc_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT, 592 RSU_TXBUFSZ); 593 if (error != 0) 594 return (error); 595 596 STAILQ_INIT(&sc->sc_tx_inactive); 597 598 for (i = 0; i != RSU_N_TRANSFER; i++) { 599 STAILQ_INIT(&sc->sc_tx_active[i]); 600 STAILQ_INIT(&sc->sc_tx_pending[i]); 601 } 602 603 for (i = 0; i < RSU_TX_LIST_COUNT; i++) { 604 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 605 } 606 607 return (0); 608} 609 610static void 611rsu_free_tx_list(struct rsu_softc *sc) 612{ 613 int i; 614 615 /* prevent further allocations from TX list(s) */ 616 STAILQ_INIT(&sc->sc_tx_inactive); 617 618 for (i = 0; i != RSU_N_TRANSFER; i++) { 619 STAILQ_INIT(&sc->sc_tx_active[i]); 620 STAILQ_INIT(&sc->sc_tx_pending[i]); 621 } 622 623 rsu_free_list(sc, sc->sc_tx, RSU_TX_LIST_COUNT); 624} 625 626static void 627rsu_free_rx_list(struct rsu_softc *sc) 628{ 629 /* prevent further allocations from RX list(s) */ 630 STAILQ_INIT(&sc->sc_rx_inactive); 631 STAILQ_INIT(&sc->sc_rx_active); 632 633 rsu_free_list(sc, sc->sc_rx, RSU_RX_LIST_COUNT); 634} 635 636static void 637rsu_free_list(struct rsu_softc *sc, struct rsu_data data[], int ndata) 638{ 639 int i; 640 641 for (i = 0; i < ndata; i++) { 642 struct rsu_data *dp = &data[i]; 643 644 if (dp->buf != NULL) { 645 free(dp->buf, M_USBDEV); 646 dp->buf = NULL; 647 } 648 if (dp->ni != NULL) { 649 ieee80211_free_node(dp->ni); 650 dp->ni = NULL; 651 } 652 } 653} 654 655static struct rsu_data * 656_rsu_getbuf(struct rsu_softc *sc) 657{ 658 struct rsu_data *bf; 659 660 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 661 if (bf != NULL) 662 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 663 else 664 bf = NULL; 665 if (bf == NULL) 666 DPRINTF("out of xmit buffers\n"); 667 return (bf); 668} 669 670static struct rsu_data * 671rsu_getbuf(struct rsu_softc *sc) 672{ 673 struct rsu_data *bf; 674 675 RSU_ASSERT_LOCKED(sc); 676 677 bf = _rsu_getbuf(sc); 678 if (bf == NULL) 679 DPRINTF("stop queue\n"); 680 return (bf); 681} 682 683static int 684rsu_write_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 685 int len) 686{ 687 usb_device_request_t req; 688 689 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 690 req.bRequest = R92S_REQ_REGS; 691 USETW(req.wValue, addr); 692 USETW(req.wIndex, 0); 693 USETW(req.wLength, len); 694 695 return (rsu_do_request(sc, &req, buf)); 696} 697 698static void 699rsu_write_1(struct rsu_softc *sc, uint16_t addr, uint8_t val) 700{ 701 rsu_write_region_1(sc, addr, &val, 1); 702} 703 704static void 705rsu_write_2(struct rsu_softc *sc, uint16_t addr, uint16_t val) 706{ 707 val = htole16(val); 708 rsu_write_region_1(sc, addr, (uint8_t *)&val, 2); 709} 710 711static void 712rsu_write_4(struct rsu_softc *sc, uint16_t addr, uint32_t val) 713{ 714 val = htole32(val); 715 rsu_write_region_1(sc, addr, (uint8_t *)&val, 4); 716} 717 718static int 719rsu_read_region_1(struct rsu_softc *sc, uint16_t addr, uint8_t *buf, 720 int len) 721{ 722 usb_device_request_t req; 723 724 req.bmRequestType = UT_READ_VENDOR_DEVICE; 725 req.bRequest = R92S_REQ_REGS; 726 USETW(req.wValue, addr); 727 USETW(req.wIndex, 0); 728 USETW(req.wLength, len); 729 730 return (rsu_do_request(sc, &req, buf)); 731} 732 733static uint8_t 734rsu_read_1(struct rsu_softc *sc, uint16_t addr) 735{ 736 uint8_t val; 737 738 if (rsu_read_region_1(sc, addr, &val, 1) != 0) 739 return (0xff); 740 return (val); 741} 742 743static uint16_t 744rsu_read_2(struct rsu_softc *sc, uint16_t addr) 745{ 746 uint16_t val; 747 748 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 749 return (0xffff); 750 return (le16toh(val)); 751} 752 753static uint32_t 754rsu_read_4(struct rsu_softc *sc, uint16_t addr) 755{ 756 uint32_t val; 757 758 if (rsu_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 759 return (0xffffffff); 760 return (le32toh(val)); 761} 762 763static int 764rsu_fw_iocmd(struct rsu_softc *sc, uint32_t iocmd) 765{ 766 int ntries; 767 768 rsu_write_4(sc, R92S_IOCMD_CTRL, iocmd); 769 rsu_ms_delay(sc); 770 for (ntries = 0; ntries < 50; ntries++) { 771 if (rsu_read_4(sc, R92S_IOCMD_CTRL) == 0) 772 return (0); 773 rsu_ms_delay(sc); 774 } 775 return (ETIMEDOUT); 776} 777 778static uint8_t 779rsu_efuse_read_1(struct rsu_softc *sc, uint16_t addr) 780{ 781 uint32_t reg; 782 int ntries; 783 784 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 785 reg = RW(reg, R92S_EFUSE_CTRL_ADDR, addr); 786 reg &= ~R92S_EFUSE_CTRL_VALID; 787 rsu_write_4(sc, R92S_EFUSE_CTRL, reg); 788 /* Wait for read operation to complete. */ 789 for (ntries = 0; ntries < 100; ntries++) { 790 reg = rsu_read_4(sc, R92S_EFUSE_CTRL); 791 if (reg & R92S_EFUSE_CTRL_VALID) 792 return (MS(reg, R92S_EFUSE_CTRL_DATA)); 793 rsu_ms_delay(sc); 794 } 795 device_printf(sc->sc_dev, 796 "could not read efuse byte at address 0x%x\n", addr); 797 return (0xff); 798} 799 800static int 801rsu_read_rom(struct rsu_softc *sc) 802{ 803 uint8_t *rom = sc->rom; 804 uint16_t addr = 0; 805 uint32_t reg; 806 uint8_t off, msk; 807 int i; 808 809 /* Make sure that ROM type is eFuse and that autoload succeeded. */ 810 reg = rsu_read_1(sc, R92S_EE_9346CR); 811 if ((reg & (R92S_9356SEL | R92S_EEPROM_EN)) != R92S_EEPROM_EN) 812 return (EIO); 813 814 /* Turn on 2.5V to prevent eFuse leakage. */ 815 reg = rsu_read_1(sc, R92S_EFUSE_TEST + 3); 816 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg | 0x80); 817 rsu_ms_delay(sc); 818 rsu_write_1(sc, R92S_EFUSE_TEST + 3, reg & ~0x80); 819 820 /* Read full ROM image. */ 821 memset(&sc->rom, 0xff, sizeof(sc->rom)); 822 while (addr < 512) { 823 reg = rsu_efuse_read_1(sc, addr); 824 if (reg == 0xff) 825 break; 826 addr++; 827 off = reg >> 4; 828 msk = reg & 0xf; 829 for (i = 0; i < 4; i++) { 830 if (msk & (1 << i)) 831 continue; 832 rom[off * 8 + i * 2 + 0] = 833 rsu_efuse_read_1(sc, addr); 834 addr++; 835 rom[off * 8 + i * 2 + 1] = 836 rsu_efuse_read_1(sc, addr); 837 addr++; 838 } 839 } 840#ifdef USB_DEBUG 841 if (rsu_debug >= 5) { 842 /* Dump ROM content. */ 843 printf("\n"); 844 for (i = 0; i < sizeof(sc->rom); i++) 845 printf("%02x:", rom[i]); 846 printf("\n"); 847 } 848#endif 849 return (0); 850} 851 852static int 853rsu_fw_cmd(struct rsu_softc *sc, uint8_t code, void *buf, int len) 854{ 855 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 856 struct rsu_data *data; 857 struct r92s_tx_desc *txd; 858 struct r92s_fw_cmd_hdr *cmd; 859 int cmdsz; 860 int xferlen; 861 862 data = rsu_getbuf(sc); 863 if (data == NULL) 864 return (ENOMEM); 865 866 /* Round-up command length to a multiple of 8 bytes. */ 867 cmdsz = (len + 7) & ~7; 868 869 xferlen = sizeof(*txd) + sizeof(*cmd) + cmdsz; 870 KASSERT(xferlen <= RSU_TXBUFSZ, ("%s: invalid length", __func__)); 871 memset(data->buf, 0, xferlen); 872 873 /* Setup Tx descriptor. */ 874 txd = (struct r92s_tx_desc *)data->buf; 875 txd->txdw0 = htole32( 876 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 877 SM(R92S_TXDW0_PKTLEN, sizeof(*cmd) + cmdsz) | 878 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 879 txd->txdw1 = htole32(SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_H2C)); 880 881 /* Setup command header. */ 882 cmd = (struct r92s_fw_cmd_hdr *)&txd[1]; 883 cmd->len = htole16(cmdsz); 884 cmd->code = code; 885 cmd->seq = sc->cmd_seq; 886 sc->cmd_seq = (sc->cmd_seq + 1) & 0x7f; 887 888 /* Copy command payload. */ 889 memcpy(&cmd[1], buf, len); 890 891 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FWCMD, 892 "%s: Tx cmd code=0x%x len=0x%x\n", 893 __func__, code, cmdsz); 894 data->buflen = xferlen; 895 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 896 usbd_transfer_start(sc->sc_xfer[which]); 897 898 return (0); 899} 900 901/* ARGSUSED */ 902static void 903rsu_calib_task(void *arg, int pending __unused) 904{ 905 struct rsu_softc *sc = arg; 906 uint32_t reg; 907 908 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: running calibration task\n", 909 __func__); 910 911 RSU_LOCK(sc); 912#ifdef notyet 913 /* Read WPS PBC status. */ 914 rsu_write_1(sc, R92S_MAC_PINMUX_CTRL, 915 R92S_GPIOMUX_EN | SM(R92S_GPIOSEL_GPIO, R92S_GPIOSEL_GPIO_JTAG)); 916 rsu_write_1(sc, R92S_GPIO_IO_SEL, 917 rsu_read_1(sc, R92S_GPIO_IO_SEL) & ~R92S_GPIO_WPS); 918 reg = rsu_read_1(sc, R92S_GPIO_CTRL); 919 if (reg != 0xff && (reg & R92S_GPIO_WPS)) 920 DPRINTF(("WPS PBC is pushed\n")); 921#endif 922 /* Read current signal level. */ 923 if (rsu_fw_iocmd(sc, 0xf4000001) == 0) { 924 reg = rsu_read_4(sc, R92S_IOCMD_DATA); 925 RSU_DPRINTF(sc, RSU_DEBUG_CALIB, "%s: RSSI=%d%%\n", 926 __func__, reg >> 4); 927 } 928 if (sc->sc_calibrating) 929 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 930 RSU_UNLOCK(sc); 931} 932 933static int 934rsu_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 935{ 936 struct rsu_vap *uvp = RSU_VAP(vap); 937 struct ieee80211com *ic = vap->iv_ic; 938 struct rsu_softc *sc = ic->ic_softc; 939 struct ieee80211_node *ni; 940 struct ieee80211_rateset *rs; 941 enum ieee80211_state ostate; 942 int error, startcal = 0; 943 944 ostate = vap->iv_state; 945 RSU_DPRINTF(sc, RSU_DEBUG_STATE, "%s: %s -> %s\n", 946 __func__, 947 ieee80211_state_name[ostate], 948 ieee80211_state_name[nstate]); 949 950 IEEE80211_UNLOCK(ic); 951 if (ostate == IEEE80211_S_RUN) { 952 RSU_LOCK(sc); 953 /* Stop calibration. */ 954 sc->sc_calibrating = 0; 955 RSU_UNLOCK(sc); 956 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_task); 957 /* Disassociate from our current BSS. */ 958 RSU_LOCK(sc); 959 rsu_disconnect(sc); 960 } else 961 RSU_LOCK(sc); 962 switch (nstate) { 963 case IEEE80211_S_INIT: 964 break; 965 case IEEE80211_S_AUTH: 966 ni = ieee80211_ref_node(vap->iv_bss); 967 error = rsu_join_bss(sc, ni); 968 ieee80211_free_node(ni); 969 if (error != 0) { 970 device_printf(sc->sc_dev, 971 "could not send join command\n"); 972 } 973 break; 974 case IEEE80211_S_RUN: 975 ni = ieee80211_ref_node(vap->iv_bss); 976 rs = &ni->ni_rates; 977 /* Indicate highest supported rate. */ 978 ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 979 ieee80211_free_node(ni); 980 startcal = 1; 981 break; 982 default: 983 break; 984 } 985 sc->sc_calibrating = 1; 986 /* Start periodic calibration. */ 987 taskqueue_enqueue_timeout(taskqueue_thread, &sc->calib_task, hz); 988 RSU_UNLOCK(sc); 989 IEEE80211_LOCK(ic); 990 return (uvp->newstate(vap, nstate, arg)); 991} 992 993#ifdef notyet 994static void 995rsu_set_key(struct rsu_softc *sc, const struct ieee80211_key *k) 996{ 997 struct r92s_fw_cmd_set_key key; 998 999 memset(&key, 0, sizeof(key)); 1000 /* Map net80211 cipher to HW crypto algorithm. */ 1001 switch (k->wk_cipher->ic_cipher) { 1002 case IEEE80211_CIPHER_WEP: 1003 if (k->wk_keylen < 8) 1004 key.algo = R92S_KEY_ALGO_WEP40; 1005 else 1006 key.algo = R92S_KEY_ALGO_WEP104; 1007 break; 1008 case IEEE80211_CIPHER_TKIP: 1009 key.algo = R92S_KEY_ALGO_TKIP; 1010 break; 1011 case IEEE80211_CIPHER_AES_CCM: 1012 key.algo = R92S_KEY_ALGO_AES; 1013 break; 1014 default: 1015 return; 1016 } 1017 key.id = k->wk_keyix; 1018 key.grpkey = (k->wk_flags & IEEE80211_KEY_GROUP) != 0; 1019 memcpy(key.key, k->wk_key, MIN(k->wk_keylen, sizeof(key.key))); 1020 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1021} 1022 1023static void 1024rsu_delete_key(struct rsu_softc *sc, const struct ieee80211_key *k) 1025{ 1026 struct r92s_fw_cmd_set_key key; 1027 1028 memset(&key, 0, sizeof(key)); 1029 key.id = k->wk_keyix; 1030 (void)rsu_fw_cmd(sc, R92S_CMD_SET_KEY, &key, sizeof(key)); 1031} 1032#endif 1033 1034static int 1035rsu_site_survey(struct rsu_softc *sc, struct ieee80211vap *vap) 1036{ 1037 struct r92s_fw_cmd_sitesurvey cmd; 1038 struct ieee80211com *ic = &sc->sc_ic; 1039 1040 memset(&cmd, 0, sizeof(cmd)); 1041 if ((ic->ic_flags & IEEE80211_F_ASCAN) || sc->sc_scan_pass == 1) 1042 cmd.active = htole32(1); 1043 cmd.limit = htole32(48); 1044 if (sc->sc_scan_pass == 1 && vap->iv_des_nssid > 0) { 1045 /* Do a directed scan for second pass. */ 1046 cmd.ssidlen = htole32(vap->iv_des_ssid[0].len); 1047 memcpy(cmd.ssid, vap->iv_des_ssid[0].ssid, 1048 vap->iv_des_ssid[0].len); 1049 1050 } 1051 DPRINTF("sending site survey command, pass=%d\n", sc->sc_scan_pass); 1052 return (rsu_fw_cmd(sc, R92S_CMD_SITE_SURVEY, &cmd, sizeof(cmd))); 1053} 1054 1055static int 1056rsu_join_bss(struct rsu_softc *sc, struct ieee80211_node *ni) 1057{ 1058 struct ieee80211com *ic = &sc->sc_ic; 1059 struct ieee80211vap *vap = ni->ni_vap; 1060 struct ndis_wlan_bssid_ex *bss; 1061 struct ndis_802_11_fixed_ies *fixed; 1062 struct r92s_fw_cmd_auth auth; 1063 uint8_t buf[sizeof(*bss) + 128] __aligned(4); 1064 uint8_t *frm; 1065 uint8_t opmode; 1066 int error; 1067 1068 /* Let the FW decide the opmode based on the capinfo field. */ 1069 opmode = NDIS802_11AUTOUNKNOWN; 1070 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1071 "%s: setting operating mode to %d\n", 1072 __func__, opmode); 1073 error = rsu_fw_cmd(sc, R92S_CMD_SET_OPMODE, &opmode, sizeof(opmode)); 1074 if (error != 0) 1075 return (error); 1076 1077 memset(&auth, 0, sizeof(auth)); 1078 if (vap->iv_flags & IEEE80211_F_WPA) { 1079 auth.mode = R92S_AUTHMODE_WPA; 1080 auth.dot1x = (ni->ni_authmode == IEEE80211_AUTH_8021X); 1081 } else 1082 auth.mode = R92S_AUTHMODE_OPEN; 1083 RSU_DPRINTF(sc, RSU_DEBUG_RESET, 1084 "%s: setting auth mode to %d\n", 1085 __func__, auth.mode); 1086 error = rsu_fw_cmd(sc, R92S_CMD_SET_AUTH, &auth, sizeof(auth)); 1087 if (error != 0) 1088 return (error); 1089 1090 memset(buf, 0, sizeof(buf)); 1091 bss = (struct ndis_wlan_bssid_ex *)buf; 1092 IEEE80211_ADDR_COPY(bss->macaddr, ni->ni_bssid); 1093 bss->ssid.ssidlen = htole32(ni->ni_esslen); 1094 memcpy(bss->ssid.ssid, ni->ni_essid, ni->ni_esslen); 1095 if (vap->iv_flags & (IEEE80211_F_PRIVACY | IEEE80211_F_WPA)) 1096 bss->privacy = htole32(1); 1097 bss->rssi = htole32(ni->ni_avgrssi); 1098 if (ic->ic_curmode == IEEE80211_MODE_11B) 1099 bss->networktype = htole32(NDIS802_11DS); 1100 else 1101 bss->networktype = htole32(NDIS802_11OFDM24); 1102 bss->config.len = htole32(sizeof(bss->config)); 1103 bss->config.bintval = htole32(ni->ni_intval); 1104 bss->config.dsconfig = htole32(ieee80211_chan2ieee(ic, ni->ni_chan)); 1105 bss->inframode = htole32(NDIS802_11INFRASTRUCTURE); 1106 /* XXX verify how this is supposed to look! */ 1107 memcpy(bss->supprates, ni->ni_rates.rs_rates, 1108 ni->ni_rates.rs_nrates); 1109 /* Write the fixed fields of the beacon frame. */ 1110 fixed = (struct ndis_802_11_fixed_ies *)&bss[1]; 1111 memcpy(&fixed->tstamp, ni->ni_tstamp.data, 8); 1112 fixed->bintval = htole16(ni->ni_intval); 1113 fixed->capabilities = htole16(ni->ni_capinfo); 1114 /* Write IEs to be included in the association request. */ 1115 frm = (uint8_t *)&fixed[1]; 1116 frm = ieee80211_add_rsn(frm, vap); 1117 frm = ieee80211_add_wpa(frm, vap); 1118 frm = ieee80211_add_qos(frm, ni); 1119 if (ni->ni_flags & IEEE80211_NODE_HT) 1120 frm = ieee80211_add_htcap(frm, ni); 1121 bss->ieslen = htole32(frm - (uint8_t *)fixed); 1122 bss->len = htole32(((frm - buf) + 3) & ~3); 1123 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_FWCMD, 1124 "%s: sending join bss command to %s chan %d\n", 1125 __func__, 1126 ether_sprintf(bss->macaddr), le32toh(bss->config.dsconfig)); 1127 return (rsu_fw_cmd(sc, R92S_CMD_JOIN_BSS, buf, sizeof(buf))); 1128} 1129 1130static int 1131rsu_disconnect(struct rsu_softc *sc) 1132{ 1133 uint32_t zero = 0; /* :-) */ 1134 1135 /* Disassociate from our current BSS. */ 1136 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1137 "%s: sending disconnect command\n", __func__); 1138 return (rsu_fw_cmd(sc, R92S_CMD_DISCONNECT, &zero, sizeof(zero))); 1139} 1140 1141static void 1142rsu_event_survey(struct rsu_softc *sc, uint8_t *buf, int len) 1143{ 1144 struct ieee80211com *ic = &sc->sc_ic; 1145 struct ieee80211_frame *wh; 1146 struct ieee80211_channel *c; 1147 struct ndis_wlan_bssid_ex *bss; 1148 struct mbuf *m; 1149 int pktlen; 1150 1151 if (__predict_false(len < sizeof(*bss))) 1152 return; 1153 bss = (struct ndis_wlan_bssid_ex *)buf; 1154 if (__predict_false(len < sizeof(*bss) + le32toh(bss->ieslen))) 1155 return; 1156 1157 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1158 "%s: found BSS %s: len=%d chan=%d inframode=%d " 1159 "networktype=%d privacy=%d, RSSI=%d\n", 1160 __func__, 1161 ether_sprintf(bss->macaddr), le32toh(bss->len), 1162 le32toh(bss->config.dsconfig), le32toh(bss->inframode), 1163 le32toh(bss->networktype), le32toh(bss->privacy), 1164 le32toh(bss->rssi)); 1165 1166 /* Build a fake beacon frame to let net80211 do all the parsing. */ 1167 /* XXX TODO: just call the new scan API methods! */ 1168 pktlen = sizeof(*wh) + le32toh(bss->ieslen); 1169 if (__predict_false(pktlen > MCLBYTES)) 1170 return; 1171 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1172 if (__predict_false(m == NULL)) 1173 return; 1174 wh = mtod(m, struct ieee80211_frame *); 1175 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 1176 IEEE80211_FC0_SUBTYPE_BEACON; 1177 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1178 USETW(wh->i_dur, 0); 1179 IEEE80211_ADDR_COPY(wh->i_addr1, ieee80211broadcastaddr); 1180 IEEE80211_ADDR_COPY(wh->i_addr2, bss->macaddr); 1181 IEEE80211_ADDR_COPY(wh->i_addr3, bss->macaddr); 1182 *(uint16_t *)wh->i_seq = 0; 1183 memcpy(&wh[1], (uint8_t *)&bss[1], le32toh(bss->ieslen)); 1184 1185 /* Finalize mbuf. */ 1186 m->m_pkthdr.len = m->m_len = pktlen; 1187 /* Fix the channel. */ 1188 c = ieee80211_find_channel_byieee(ic, 1189 le32toh(bss->config.dsconfig), 1190 IEEE80211_CHAN_G); 1191 if (c) { 1192 ic->ic_curchan = c; 1193 ieee80211_radiotap_chan_change(ic); 1194 } 1195 /* XXX avoid a LOR */ 1196 RSU_UNLOCK(sc); 1197 ieee80211_input_all(ic, m, le32toh(bss->rssi), 0); 1198 RSU_LOCK(sc); 1199} 1200 1201static void 1202rsu_event_join_bss(struct rsu_softc *sc, uint8_t *buf, int len) 1203{ 1204 struct ieee80211com *ic = &sc->sc_ic; 1205 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1206 struct ieee80211_node *ni = vap->iv_bss; 1207 struct r92s_event_join_bss *rsp; 1208 uint32_t tmp; 1209 int res; 1210 1211 if (__predict_false(len < sizeof(*rsp))) 1212 return; 1213 rsp = (struct r92s_event_join_bss *)buf; 1214 res = (int)le32toh(rsp->join_res); 1215 1216 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1217 "%s: Rx join BSS event len=%d res=%d\n", 1218 __func__, len, res); 1219 if (res <= 0) { 1220 RSU_UNLOCK(sc); 1221 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1222 RSU_LOCK(sc); 1223 return; 1224 } 1225 tmp = le32toh(rsp->associd); 1226 if (tmp >= vap->iv_max_aid) { 1227 DPRINTF("Assoc ID overflow\n"); 1228 tmp = 1; 1229 } 1230 RSU_DPRINTF(sc, RSU_DEBUG_STATE | RSU_DEBUG_FWCMD, 1231 "%s: associated with %s associd=%d\n", 1232 __func__, ether_sprintf(rsp->bss.macaddr), tmp); 1233 /* XXX is this required? What's the top two bits for again? */ 1234 ni->ni_associd = tmp | 0xc000; 1235 RSU_UNLOCK(sc); 1236 ieee80211_new_state(vap, IEEE80211_S_RUN, 1237 IEEE80211_FC0_SUBTYPE_ASSOC_RESP); 1238 RSU_LOCK(sc); 1239} 1240 1241static void 1242rsu_rx_event(struct rsu_softc *sc, uint8_t code, uint8_t *buf, int len) 1243{ 1244 struct ieee80211com *ic = &sc->sc_ic; 1245 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1246 1247 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1248 "%s: Rx event code=%d len=%d\n", __func__, code, len); 1249 switch (code) { 1250 case R92S_EVT_SURVEY: 1251 if (vap->iv_state == IEEE80211_S_SCAN) 1252 rsu_event_survey(sc, buf, len); 1253 break; 1254 case R92S_EVT_SURVEY_DONE: 1255 RSU_DPRINTF(sc, RSU_DEBUG_SCAN, 1256 "%s: site survey pass %d done, found %d BSS\n", 1257 __func__, sc->sc_scan_pass, le32toh(*(uint32_t *)buf)); 1258 if (vap->iv_state != IEEE80211_S_SCAN) 1259 break; /* Ignore if not scanning. */ 1260 if (sc->sc_scan_pass == 0 && vap->iv_des_nssid != 0) { 1261 /* Schedule a directed scan for hidden APs. */ 1262 sc->sc_scan_pass = 1; 1263 RSU_UNLOCK(sc); 1264 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1265 RSU_LOCK(sc); 1266 break; 1267 } 1268 sc->sc_scan_pass = 0; 1269 break; 1270 case R92S_EVT_JOIN_BSS: 1271 if (vap->iv_state == IEEE80211_S_AUTH) 1272 rsu_event_join_bss(sc, buf, len); 1273 break; 1274 case R92S_EVT_DEL_STA: 1275 RSU_DPRINTF(sc, RSU_DEBUG_FWCMD | RSU_DEBUG_STATE, 1276 "%s: disassociated from %s\n", __func__, 1277 ether_sprintf(buf)); 1278 if (vap->iv_state == IEEE80211_S_RUN && 1279 IEEE80211_ADDR_EQ(vap->iv_bss->ni_bssid, buf)) { 1280 RSU_UNLOCK(sc); 1281 ieee80211_new_state(vap, IEEE80211_S_SCAN, -1); 1282 RSU_LOCK(sc); 1283 } 1284 break; 1285 case R92S_EVT_WPS_PBC: 1286 RSU_DPRINTF(sc, RSU_DEBUG_RX | RSU_DEBUG_FWCMD, 1287 "%s: WPS PBC pushed.\n", __func__); 1288 break; 1289 case R92S_EVT_FWDBG: 1290 buf[60] = '\0'; 1291 RSU_DPRINTF(sc, RSU_DEBUG_FWDBG, "FWDBG: %s\n", (char *)buf); 1292 break; 1293 default: 1294 RSU_DPRINTF(sc, RSU_DEBUG_ANY, "%s: unhandled code (%d)\n", 1295 __func__, code); 1296 break; 1297 } 1298} 1299 1300static void 1301rsu_rx_multi_event(struct rsu_softc *sc, uint8_t *buf, int len) 1302{ 1303 struct r92s_fw_cmd_hdr *cmd; 1304 int cmdsz; 1305 1306 RSU_DPRINTF(sc, RSU_DEBUG_RX, "%s: Rx events len=%d\n", __func__, len); 1307 1308 /* Skip Rx status. */ 1309 buf += sizeof(struct r92s_rx_stat); 1310 len -= sizeof(struct r92s_rx_stat); 1311 1312 /* Process all events. */ 1313 for (;;) { 1314 /* Check that command header fits. */ 1315 if (__predict_false(len < sizeof(*cmd))) 1316 break; 1317 cmd = (struct r92s_fw_cmd_hdr *)buf; 1318 /* Check that command payload fits. */ 1319 cmdsz = le16toh(cmd->len); 1320 if (__predict_false(len < sizeof(*cmd) + cmdsz)) 1321 break; 1322 1323 /* Process firmware event. */ 1324 rsu_rx_event(sc, cmd->code, (uint8_t *)&cmd[1], cmdsz); 1325 1326 if (!(cmd->seq & R92S_FW_CMD_MORE)) 1327 break; 1328 buf += sizeof(*cmd) + cmdsz; 1329 len -= sizeof(*cmd) + cmdsz; 1330 } 1331} 1332 1333static int8_t 1334rsu_get_rssi(struct rsu_softc *sc, int rate, void *physt) 1335{ 1336 static const int8_t cckoff[] = { 14, -2, -20, -40 }; 1337 struct r92s_rx_phystat *phy; 1338 struct r92s_rx_cck *cck; 1339 uint8_t rpt; 1340 int8_t rssi; 1341 1342 if (rate <= 3) { 1343 cck = (struct r92s_rx_cck *)physt; 1344 rpt = (cck->agc_rpt >> 6) & 0x3; 1345 rssi = cck->agc_rpt & 0x3e; 1346 rssi = cckoff[rpt] - rssi; 1347 } else { /* OFDM/HT. */ 1348 phy = (struct r92s_rx_phystat *)physt; 1349 rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 106; 1350 } 1351 return (rssi); 1352} 1353 1354static struct mbuf * 1355rsu_rx_frame(struct rsu_softc *sc, uint8_t *buf, int pktlen, int *rssi) 1356{ 1357 struct ieee80211com *ic = &sc->sc_ic; 1358 struct ieee80211_frame *wh; 1359 struct r92s_rx_stat *stat; 1360 uint32_t rxdw0, rxdw3; 1361 struct mbuf *m; 1362 uint8_t rate; 1363 int infosz; 1364 1365 stat = (struct r92s_rx_stat *)buf; 1366 rxdw0 = le32toh(stat->rxdw0); 1367 rxdw3 = le32toh(stat->rxdw3); 1368 1369 if (__predict_false(rxdw0 & R92S_RXDW0_CRCERR)) { 1370 counter_u64_add(ic->ic_ierrors, 1); 1371 return NULL; 1372 } 1373 if (__predict_false(pktlen < sizeof(*wh) || pktlen > MCLBYTES)) { 1374 counter_u64_add(ic->ic_ierrors, 1); 1375 return NULL; 1376 } 1377 1378 rate = MS(rxdw3, R92S_RXDW3_RATE); 1379 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1380 1381 /* Get RSSI from PHY status descriptor if present. */ 1382 if (infosz != 0) 1383 *rssi = rsu_get_rssi(sc, rate, &stat[1]); 1384 else 1385 *rssi = 0; 1386 1387 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1388 "%s: Rx frame len=%d rate=%d infosz=%d rssi=%d\n", 1389 __func__, 1390 pktlen, rate, infosz, *rssi); 1391 1392 m = m_get2(pktlen, M_NOWAIT, MT_DATA, M_PKTHDR); 1393 if (__predict_false(m == NULL)) { 1394 counter_u64_add(ic->ic_ierrors, 1); 1395 return NULL; 1396 } 1397 /* Hardware does Rx TCP checksum offload. */ 1398 if (rxdw3 & R92S_RXDW3_TCPCHKVALID) { 1399 if (__predict_true(rxdw3 & R92S_RXDW3_TCPCHKRPT)) 1400 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1401 } 1402 wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 1403 memcpy(mtod(m, uint8_t *), wh, pktlen); 1404 m->m_pkthdr.len = m->m_len = pktlen; 1405 1406 if (ieee80211_radiotap_active(ic)) { 1407 struct rsu_rx_radiotap_header *tap = &sc->sc_rxtap; 1408 1409 /* Map HW rate index to 802.11 rate. */ 1410 tap->wr_flags = 2; 1411 if (!(rxdw3 & R92S_RXDW3_HTC)) { 1412 switch (rate) { 1413 /* CCK. */ 1414 case 0: tap->wr_rate = 2; break; 1415 case 1: tap->wr_rate = 4; break; 1416 case 2: tap->wr_rate = 11; break; 1417 case 3: tap->wr_rate = 22; break; 1418 /* OFDM. */ 1419 case 4: tap->wr_rate = 12; break; 1420 case 5: tap->wr_rate = 18; break; 1421 case 6: tap->wr_rate = 24; break; 1422 case 7: tap->wr_rate = 36; break; 1423 case 8: tap->wr_rate = 48; break; 1424 case 9: tap->wr_rate = 72; break; 1425 case 10: tap->wr_rate = 96; break; 1426 case 11: tap->wr_rate = 108; break; 1427 } 1428 } else if (rate >= 12) { /* MCS0~15. */ 1429 /* Bit 7 set means HT MCS instead of rate. */ 1430 tap->wr_rate = 0x80 | (rate - 12); 1431 } 1432 tap->wr_dbm_antsignal = *rssi; 1433 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 1434 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 1435 } 1436 1437 return (m); 1438} 1439 1440static struct mbuf * 1441rsu_rx_multi_frame(struct rsu_softc *sc, uint8_t *buf, int len, int *rssi) 1442{ 1443 struct r92s_rx_stat *stat; 1444 uint32_t rxdw0; 1445 int totlen, pktlen, infosz, npkts; 1446 struct mbuf *m, *m0 = NULL, *prevm = NULL; 1447 1448 /* Get the number of encapsulated frames. */ 1449 stat = (struct r92s_rx_stat *)buf; 1450 npkts = MS(le32toh(stat->rxdw2), R92S_RXDW2_PKTCNT); 1451 RSU_DPRINTF(sc, RSU_DEBUG_RX, 1452 "%s: Rx %d frames in one chunk\n", __func__, npkts); 1453 1454 /* Process all of them. */ 1455 while (npkts-- > 0) { 1456 if (__predict_false(len < sizeof(*stat))) 1457 break; 1458 stat = (struct r92s_rx_stat *)buf; 1459 rxdw0 = le32toh(stat->rxdw0); 1460 1461 pktlen = MS(rxdw0, R92S_RXDW0_PKTLEN); 1462 if (__predict_false(pktlen == 0)) 1463 break; 1464 1465 infosz = MS(rxdw0, R92S_RXDW0_INFOSZ) * 8; 1466 1467 /* Make sure everything fits in xfer. */ 1468 totlen = sizeof(*stat) + infosz + pktlen; 1469 if (__predict_false(totlen > len)) 1470 break; 1471 1472 /* Process 802.11 frame. */ 1473 m = rsu_rx_frame(sc, buf, pktlen, rssi); 1474 if (m0 == NULL) 1475 m0 = m; 1476 if (prevm == NULL) 1477 prevm = m; 1478 else { 1479 prevm->m_next = m; 1480 prevm = m; 1481 } 1482 /* Next chunk is 128-byte aligned. */ 1483 totlen = (totlen + 127) & ~127; 1484 buf += totlen; 1485 len -= totlen; 1486 } 1487 1488 return (m0); 1489} 1490 1491static struct mbuf * 1492rsu_rxeof(struct usb_xfer *xfer, struct rsu_data *data, int *rssi) 1493{ 1494 struct rsu_softc *sc = data->sc; 1495 struct ieee80211com *ic = &sc->sc_ic; 1496 struct r92s_rx_stat *stat; 1497 int len; 1498 1499 usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 1500 1501 if (__predict_false(len < sizeof(*stat))) { 1502 DPRINTF("xfer too short %d\n", len); 1503 counter_u64_add(ic->ic_ierrors, 1); 1504 return (NULL); 1505 } 1506 /* Determine if it is a firmware C2H event or an 802.11 frame. */ 1507 stat = (struct r92s_rx_stat *)data->buf; 1508 if ((le32toh(stat->rxdw1) & 0x1ff) == 0x1ff) { 1509 rsu_rx_multi_event(sc, data->buf, len); 1510 /* No packets to process. */ 1511 return (NULL); 1512 } else 1513 return (rsu_rx_multi_frame(sc, data->buf, len, rssi)); 1514} 1515 1516static void 1517rsu_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1518{ 1519 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1520 struct ieee80211com *ic = &sc->sc_ic; 1521 struct ieee80211_frame *wh; 1522 struct ieee80211_node *ni; 1523 struct mbuf *m = NULL, *next; 1524 struct rsu_data *data; 1525 int rssi = 1; 1526 1527 RSU_ASSERT_LOCKED(sc); 1528 1529 switch (USB_GET_STATE(xfer)) { 1530 case USB_ST_TRANSFERRED: 1531 data = STAILQ_FIRST(&sc->sc_rx_active); 1532 if (data == NULL) 1533 goto tr_setup; 1534 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1535 m = rsu_rxeof(xfer, data, &rssi); 1536 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1537 /* FALLTHROUGH */ 1538 case USB_ST_SETUP: 1539tr_setup: 1540 data = STAILQ_FIRST(&sc->sc_rx_inactive); 1541 if (data == NULL) { 1542 KASSERT(m == NULL, ("mbuf isn't NULL")); 1543 return; 1544 } 1545 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1546 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1547 usbd_xfer_set_frame_data(xfer, 0, data->buf, 1548 usbd_xfer_max_len(xfer)); 1549 usbd_transfer_submit(xfer); 1550 /* 1551 * To avoid LOR we should unlock our private mutex here to call 1552 * ieee80211_input() because here is at the end of a USB 1553 * callback and safe to unlock. 1554 */ 1555 RSU_UNLOCK(sc); 1556 while (m != NULL) { 1557 next = m->m_next; 1558 m->m_next = NULL; 1559 wh = mtod(m, struct ieee80211_frame *); 1560 ni = ieee80211_find_rxnode(ic, 1561 (struct ieee80211_frame_min *)wh); 1562 if (ni != NULL) { 1563 (void)ieee80211_input(ni, m, rssi, 0); 1564 ieee80211_free_node(ni); 1565 } else 1566 (void)ieee80211_input_all(ic, m, rssi, 0); 1567 m = next; 1568 } 1569 RSU_LOCK(sc); 1570 break; 1571 default: 1572 /* needs it to the inactive queue due to a error. */ 1573 data = STAILQ_FIRST(&sc->sc_rx_active); 1574 if (data != NULL) { 1575 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1576 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1577 } 1578 if (error != USB_ERR_CANCELLED) { 1579 usbd_xfer_set_stall(xfer); 1580 counter_u64_add(ic->ic_ierrors, 1); 1581 goto tr_setup; 1582 } 1583 break; 1584 } 1585 1586} 1587 1588static void 1589rsu_txeof(struct usb_xfer *xfer, struct rsu_data *data) 1590{ 1591#ifdef USB_DEBUG 1592 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1593#endif 1594 1595 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: called; data=%p\n", 1596 __func__, 1597 data); 1598 1599 if (data->m) { 1600 /* XXX status? */ 1601 ieee80211_tx_complete(data->ni, data->m, 0); 1602 data->m = NULL; 1603 data->ni = NULL; 1604 } 1605} 1606 1607static void 1608rsu_bulk_tx_callback_sub(struct usb_xfer *xfer, usb_error_t error, 1609 uint8_t which) 1610{ 1611 struct rsu_softc *sc = usbd_xfer_softc(xfer); 1612 struct ieee80211com *ic = &sc->sc_ic; 1613 struct rsu_data *data; 1614 1615 RSU_ASSERT_LOCKED(sc); 1616 1617 switch (USB_GET_STATE(xfer)) { 1618 case USB_ST_TRANSFERRED: 1619 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1620 if (data == NULL) 1621 goto tr_setup; 1622 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, "%s: transfer done %p\n", 1623 __func__, data); 1624 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1625 rsu_txeof(xfer, data); 1626 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1627 /* FALLTHROUGH */ 1628 case USB_ST_SETUP: 1629tr_setup: 1630 data = STAILQ_FIRST(&sc->sc_tx_pending[which]); 1631 if (data == NULL) { 1632 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1633 "%s: empty pending queue sc %p\n", __func__, sc); 1634 return; 1635 } 1636 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next); 1637 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next); 1638 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1639 RSU_DPRINTF(sc, RSU_DEBUG_TXDONE, 1640 "%s: submitting transfer %p\n", 1641 __func__, 1642 data); 1643 usbd_transfer_submit(xfer); 1644 break; 1645 default: 1646 data = STAILQ_FIRST(&sc->sc_tx_active[which]); 1647 if (data != NULL) { 1648 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next); 1649 rsu_txeof(xfer, data); 1650 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1651 } 1652 counter_u64_add(ic->ic_oerrors, 1); 1653 1654 if (error != USB_ERR_CANCELLED) { 1655 usbd_xfer_set_stall(xfer); 1656 goto tr_setup; 1657 } 1658 break; 1659 } 1660} 1661 1662static void 1663rsu_bulk_tx_callback_be_bk(struct usb_xfer *xfer, usb_error_t error) 1664{ 1665 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_BE_BK); 1666} 1667 1668static void 1669rsu_bulk_tx_callback_vi_vo(struct usb_xfer *xfer, usb_error_t error) 1670{ 1671 rsu_bulk_tx_callback_sub(xfer, error, RSU_BULK_TX_VI_VO); 1672} 1673 1674static int 1675rsu_tx_start(struct rsu_softc *sc, struct ieee80211_node *ni, 1676 struct mbuf *m0, struct rsu_data *data) 1677{ 1678 struct ieee80211com *ic = &sc->sc_ic; 1679 struct ieee80211vap *vap = ni->ni_vap; 1680 struct ieee80211_frame *wh; 1681 struct ieee80211_key *k = NULL; 1682 struct r92s_tx_desc *txd; 1683 uint8_t type; 1684 uint8_t tid = 0; 1685 uint8_t which; 1686 int hasqos; 1687 int xferlen; 1688 1689 RSU_ASSERT_LOCKED(sc); 1690 1691 wh = mtod(m0, struct ieee80211_frame *); 1692 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1693 1694 RSU_DPRINTF(sc, RSU_DEBUG_TX, "%s: data=%p, m=%p\n", 1695 __func__, data, m0); 1696 1697 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1698 k = ieee80211_crypto_encap(ni, m0); 1699 if (k == NULL) { 1700 device_printf(sc->sc_dev, 1701 "ieee80211_crypto_encap returns NULL.\n"); 1702 /* XXX we don't expect the fragmented frames */ 1703 m_freem(m0); 1704 return (ENOBUFS); 1705 } 1706 wh = mtod(m0, struct ieee80211_frame *); 1707 } 1708 switch (type) { 1709 case IEEE80211_FC0_TYPE_CTL: 1710 case IEEE80211_FC0_TYPE_MGT: 1711 which = rsu_wme_ac_xfer_map[WME_AC_VO]; 1712 break; 1713 default: 1714 which = rsu_wme_ac_xfer_map[M_WME_GETAC(m0)]; 1715 break; 1716 } 1717 hasqos = 0; 1718 1719 /* Fill Tx descriptor. */ 1720 txd = (struct r92s_tx_desc *)data->buf; 1721 memset(txd, 0, sizeof(*txd)); 1722 1723 txd->txdw0 |= htole32( 1724 SM(R92S_TXDW0_PKTLEN, m0->m_pkthdr.len) | 1725 SM(R92S_TXDW0_OFFSET, sizeof(*txd)) | 1726 R92S_TXDW0_OWN | R92S_TXDW0_FSG | R92S_TXDW0_LSG); 1727 1728 txd->txdw1 |= htole32( 1729 SM(R92S_TXDW1_MACID, R92S_MACID_BSS) | 1730 SM(R92S_TXDW1_QSEL, R92S_TXDW1_QSEL_BE)); 1731 if (!hasqos) 1732 txd->txdw1 |= htole32(R92S_TXDW1_NONQOS); 1733#ifdef notyet 1734 if (k != NULL) { 1735 switch (k->wk_cipher->ic_cipher) { 1736 case IEEE80211_CIPHER_WEP: 1737 cipher = R92S_TXDW1_CIPHER_WEP; 1738 break; 1739 case IEEE80211_CIPHER_TKIP: 1740 cipher = R92S_TXDW1_CIPHER_TKIP; 1741 break; 1742 case IEEE80211_CIPHER_AES_CCM: 1743 cipher = R92S_TXDW1_CIPHER_AES; 1744 break; 1745 default: 1746 cipher = R92S_TXDW1_CIPHER_NONE; 1747 } 1748 txd->txdw1 |= htole32( 1749 SM(R92S_TXDW1_CIPHER, cipher) | 1750 SM(R92S_TXDW1_KEYIDX, k->k_id)); 1751 } 1752#endif 1753 txd->txdw2 |= htole32(R92S_TXDW2_BK); 1754 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1755 txd->txdw2 |= htole32(R92S_TXDW2_BMCAST); 1756 /* 1757 * Firmware will use and increment the sequence number for the 1758 * specified TID. 1759 */ 1760 txd->txdw3 |= htole32(SM(R92S_TXDW3_SEQ, tid)); 1761 1762 if (ieee80211_radiotap_active_vap(vap)) { 1763 struct rsu_tx_radiotap_header *tap = &sc->sc_txtap; 1764 1765 tap->wt_flags = 0; 1766 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1767 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1768 ieee80211_radiotap_tx(vap, m0); 1769 } 1770 1771 xferlen = sizeof(*txd) + m0->m_pkthdr.len; 1772 m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 1773 1774 data->buflen = xferlen; 1775 data->ni = ni; 1776 data->m = m0; 1777 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 1778 1779 /* start transfer, if any */ 1780 usbd_transfer_start(sc->sc_xfer[which]); 1781 return (0); 1782} 1783 1784static int 1785rsu_transmit(struct ieee80211com *ic, struct mbuf *m) 1786{ 1787 struct rsu_softc *sc = ic->ic_softc; 1788 int error; 1789 1790 RSU_LOCK(sc); 1791 if (!sc->sc_running) { 1792 RSU_UNLOCK(sc); 1793 return (ENXIO); 1794 } 1795 error = mbufq_enqueue(&sc->sc_snd, m); 1796 if (error) { 1797 RSU_UNLOCK(sc); 1798 return (error); 1799 } 1800 rsu_start(sc); 1801 RSU_UNLOCK(sc); 1802 1803 return (0); 1804} 1805 1806static void 1807rsu_start(struct rsu_softc *sc) 1808{ 1809 struct ieee80211_node *ni; 1810 struct rsu_data *bf; 1811 struct mbuf *m; 1812 1813 RSU_ASSERT_LOCKED(sc); 1814 1815 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1816 bf = rsu_getbuf(sc); 1817 if (bf == NULL) { 1818 mbufq_prepend(&sc->sc_snd, m); 1819 break; 1820 } 1821 1822 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1823 m->m_pkthdr.rcvif = NULL; 1824 1825 if (rsu_tx_start(sc, ni, m, bf) != 0) { 1826 if_inc_counter(ni->ni_vap->iv_ifp, 1827 IFCOUNTER_OERRORS, 1); 1828 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1829 ieee80211_free_node(ni); 1830 break; 1831 } 1832 } 1833} 1834 1835static void 1836rsu_parent(struct ieee80211com *ic) 1837{ 1838 struct rsu_softc *sc = ic->ic_softc; 1839 int startall = 0; 1840 1841 RSU_LOCK(sc); 1842 if (ic->ic_nrunning > 0) { 1843 if (!sc->sc_running) { 1844 rsu_init(sc); 1845 startall = 1; 1846 } 1847 } else if (sc->sc_running) 1848 rsu_stop(sc); 1849 RSU_UNLOCK(sc); 1850 1851 if (startall) 1852 ieee80211_start_all(ic); 1853} 1854 1855/* 1856 * Power on sequence for A-cut adapters. 1857 */ 1858static void 1859rsu_power_on_acut(struct rsu_softc *sc) 1860{ 1861 uint32_t reg; 1862 1863 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1864 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1865 1866 /* Enable AFE macro block's bandgap and Mbias. */ 1867 rsu_write_1(sc, R92S_AFE_MISC, 1868 rsu_read_1(sc, R92S_AFE_MISC) | 1869 R92S_AFE_MISC_BGEN | R92S_AFE_MISC_MBEN); 1870 /* Enable LDOA15 block. */ 1871 rsu_write_1(sc, R92S_LDOA15_CTRL, 1872 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1873 1874 rsu_write_1(sc, R92S_SPS1_CTRL, 1875 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_LDEN); 1876 usb_pause_mtx(&sc->sc_mtx, 2 * hz); 1877 /* Enable switch regulator block. */ 1878 rsu_write_1(sc, R92S_SPS1_CTRL, 1879 rsu_read_1(sc, R92S_SPS1_CTRL) | R92S_SPS1_SWEN); 1880 1881 rsu_write_4(sc, R92S_SPS1_CTRL, 0x00a7b267); 1882 1883 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1884 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1885 1886 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1887 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1888 1889 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1890 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x90); 1891 1892 /* Enable AFE clock. */ 1893 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1894 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1895 /* Enable AFE PLL macro block. */ 1896 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 1897 rsu_read_1(sc, R92S_AFE_PLL_CTRL) | 0x11); 1898 /* Attach AFE PLL to MACTOP/BB. */ 1899 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 1900 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 1901 1902 /* Switch to 40MHz clock instead of 80MHz. */ 1903 rsu_write_2(sc, R92S_SYS_CLKR, 1904 rsu_read_2(sc, R92S_SYS_CLKR) & ~R92S_SYS_CLKSEL); 1905 1906 /* Enable MAC clock. */ 1907 rsu_write_2(sc, R92S_SYS_CLKR, 1908 rsu_read_2(sc, R92S_SYS_CLKR) | 1909 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 1910 1911 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 1912 1913 /* Enable digital core and IOREG R/W. */ 1914 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1915 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 1916 1917 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1918 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 1919 1920 /* Switch the control path to firmware. */ 1921 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1922 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 1923 rsu_write_2(sc, R92S_SYS_CLKR, reg); 1924 1925 rsu_write_2(sc, R92S_CR, 0x37fc); 1926 1927 /* Fix USB RX FIFO issue. */ 1928 rsu_write_1(sc, 0xfe5c, 1929 rsu_read_1(sc, 0xfe5c) | 0x80); 1930 rsu_write_1(sc, 0x00ab, 1931 rsu_read_1(sc, 0x00ab) | 0xc0); 1932 1933 rsu_write_1(sc, R92S_SYS_CLKR, 1934 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 1935} 1936 1937/* 1938 * Power on sequence for B-cut and C-cut adapters. 1939 */ 1940static void 1941rsu_power_on_bcut(struct rsu_softc *sc) 1942{ 1943 uint32_t reg; 1944 int ntries; 1945 1946 /* Prevent eFuse leakage. */ 1947 rsu_write_1(sc, 0x37, 0xb0); 1948 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1949 rsu_write_1(sc, 0x37, 0x30); 1950 1951 /* Switch the control path to hardware. */ 1952 reg = rsu_read_2(sc, R92S_SYS_CLKR); 1953 if (reg & R92S_FWHW_SEL) { 1954 rsu_write_2(sc, R92S_SYS_CLKR, 1955 reg & ~(R92S_SWHW_SEL | R92S_FWHW_SEL)); 1956 } 1957 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1958 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) & ~0x8c); 1959 rsu_ms_delay(sc); 1960 1961 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x53); 1962 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x57); 1963 1964 reg = rsu_read_1(sc, R92S_AFE_MISC); 1965 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN); 1966 rsu_write_1(sc, R92S_AFE_MISC, reg | R92S_AFE_MISC_BGEN | 1967 R92S_AFE_MISC_MBEN | R92S_AFE_MISC_I32_EN); 1968 1969 /* Enable PLL. */ 1970 rsu_write_1(sc, R92S_LDOA15_CTRL, 1971 rsu_read_1(sc, R92S_LDOA15_CTRL) | R92S_LDA15_EN); 1972 1973 rsu_write_1(sc, R92S_LDOV12D_CTRL, 1974 rsu_read_1(sc, R92S_LDOV12D_CTRL) | R92S_LDV12_EN); 1975 1976 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1977 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) | 0x08); 1978 1979 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 1980 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x20); 1981 1982 /* Support 64KB IMEM. */ 1983 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 1984 rsu_read_1(sc, R92S_SYS_ISO_CTRL + 1) & ~0x97); 1985 1986 /* Enable AFE clock. */ 1987 rsu_write_1(sc, R92S_AFE_XTAL_CTRL + 1, 1988 rsu_read_1(sc, R92S_AFE_XTAL_CTRL + 1) & ~0x04); 1989 /* Enable AFE PLL macro block. */ 1990 reg = rsu_read_1(sc, R92S_AFE_PLL_CTRL); 1991 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1992 rsu_ms_delay(sc); 1993 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x51); 1994 rsu_ms_delay(sc); 1995 rsu_write_1(sc, R92S_AFE_PLL_CTRL, reg | 0x11); 1996 rsu_ms_delay(sc); 1997 1998 /* Attach AFE PLL to MACTOP/BB. */ 1999 rsu_write_1(sc, R92S_SYS_ISO_CTRL, 2000 rsu_read_1(sc, R92S_SYS_ISO_CTRL) & ~0x11); 2001 2002 /* Switch to 40MHz clock. */ 2003 rsu_write_1(sc, R92S_SYS_CLKR, 0x00); 2004 /* Disable CPU clock and 80MHz SSC. */ 2005 rsu_write_1(sc, R92S_SYS_CLKR, 2006 rsu_read_1(sc, R92S_SYS_CLKR) | 0xa0); 2007 /* Enable MAC clock. */ 2008 rsu_write_2(sc, R92S_SYS_CLKR, 2009 rsu_read_2(sc, R92S_SYS_CLKR) | 2010 R92S_MAC_CLK_EN | R92S_SYS_CLK_EN); 2011 2012 rsu_write_1(sc, R92S_PMC_FSM, 0x02); 2013 2014 /* Enable digital core and IOREG R/W. */ 2015 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2016 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x08); 2017 2018 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 2019 rsu_read_1(sc, R92S_SYS_FUNC_EN + 1) | 0x80); 2020 2021 /* Switch the control path to firmware. */ 2022 reg = rsu_read_2(sc, R92S_SYS_CLKR); 2023 reg = (reg & ~R92S_SWHW_SEL) | R92S_FWHW_SEL; 2024 rsu_write_2(sc, R92S_SYS_CLKR, reg); 2025 2026 rsu_write_2(sc, R92S_CR, 0x37fc); 2027 2028 /* Fix USB RX FIFO issue. */ 2029 rsu_write_1(sc, 0xfe5c, 2030 rsu_read_1(sc, 0xfe5c) | 0x80); 2031 2032 rsu_write_1(sc, R92S_SYS_CLKR, 2033 rsu_read_1(sc, R92S_SYS_CLKR) & ~R92S_SYS_CPU_CLKSEL); 2034 2035 rsu_write_1(sc, 0xfe1c, 0x80); 2036 2037 /* Make sure TxDMA is ready to download firmware. */ 2038 for (ntries = 0; ntries < 20; ntries++) { 2039 reg = rsu_read_1(sc, R92S_TCR); 2040 if ((reg & (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) == 2041 (R92S_TCR_IMEM_CHK_RPT | R92S_TCR_EMEM_CHK_RPT)) 2042 break; 2043 rsu_ms_delay(sc); 2044 } 2045 if (ntries == 20) { 2046 RSU_DPRINTF(sc, RSU_DEBUG_RESET | RSU_DEBUG_TX, 2047 "%s: TxDMA is not ready\n", 2048 __func__); 2049 /* Reset TxDMA. */ 2050 reg = rsu_read_1(sc, R92S_CR); 2051 rsu_write_1(sc, R92S_CR, reg & ~R92S_CR_TXDMA_EN); 2052 rsu_ms_delay(sc); 2053 rsu_write_1(sc, R92S_CR, reg | R92S_CR_TXDMA_EN); 2054 } 2055} 2056 2057static void 2058rsu_power_off(struct rsu_softc *sc) 2059{ 2060 /* Turn RF off. */ 2061 rsu_write_1(sc, R92S_RF_CTRL, 0x00); 2062 usb_pause_mtx(&sc->sc_mtx, hz / 200); 2063 2064 /* Turn MAC off. */ 2065 /* Switch control path. */ 2066 rsu_write_1(sc, R92S_SYS_CLKR + 1, 0x38); 2067 /* Reset MACTOP. */ 2068 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x70); 2069 rsu_write_1(sc, R92S_PMC_FSM, 0x06); 2070 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 0, 0xf9); 2071 rsu_write_1(sc, R92S_SYS_ISO_CTRL + 1, 0xe8); 2072 2073 /* Disable AFE PLL. */ 2074 rsu_write_1(sc, R92S_AFE_PLL_CTRL, 0x00); 2075 /* Disable A15V. */ 2076 rsu_write_1(sc, R92S_LDOA15_CTRL, 0x54); 2077 /* Disable eFuse 1.2V. */ 2078 rsu_write_1(sc, R92S_SYS_FUNC_EN + 1, 0x50); 2079 rsu_write_1(sc, R92S_LDOV12D_CTRL, 0x24); 2080 /* Enable AFE macro block's bandgap and Mbias. */ 2081 rsu_write_1(sc, R92S_AFE_MISC, 0x30); 2082 /* Disable 1.6V LDO. */ 2083 rsu_write_1(sc, R92S_SPS0_CTRL + 0, 0x56); 2084 rsu_write_1(sc, R92S_SPS0_CTRL + 1, 0x43); 2085} 2086 2087static int 2088rsu_fw_loadsection(struct rsu_softc *sc, const uint8_t *buf, int len) 2089{ 2090 const uint8_t which = rsu_wme_ac_xfer_map[WME_AC_VO]; 2091 struct rsu_data *data; 2092 struct r92s_tx_desc *txd; 2093 int mlen; 2094 2095 while (len > 0) { 2096 data = rsu_getbuf(sc); 2097 if (data == NULL) 2098 return (ENOMEM); 2099 txd = (struct r92s_tx_desc *)data->buf; 2100 memset(txd, 0, sizeof(*txd)); 2101 if (len <= RSU_TXBUFSZ - sizeof(*txd)) { 2102 /* Last chunk. */ 2103 txd->txdw0 |= htole32(R92S_TXDW0_LINIP); 2104 mlen = len; 2105 } else 2106 mlen = RSU_TXBUFSZ - sizeof(*txd); 2107 txd->txdw0 |= htole32(SM(R92S_TXDW0_PKTLEN, mlen)); 2108 memcpy(&txd[1], buf, mlen); 2109 data->buflen = sizeof(*txd) + mlen; 2110 RSU_DPRINTF(sc, RSU_DEBUG_TX | RSU_DEBUG_FW | RSU_DEBUG_RESET, 2111 "%s: starting transfer %p\n", 2112 __func__, data); 2113 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[which], data, next); 2114 buf += mlen; 2115 len -= mlen; 2116 } 2117 usbd_transfer_start(sc->sc_xfer[which]); 2118 return (0); 2119} 2120 2121static int 2122rsu_load_firmware(struct rsu_softc *sc) 2123{ 2124 const struct r92s_fw_hdr *hdr; 2125 struct r92s_fw_priv *dmem; 2126 const uint8_t *imem, *emem; 2127 int imemsz, ememsz; 2128 const struct firmware *fw; 2129 size_t size; 2130 uint32_t reg; 2131 int ntries, error; 2132 2133 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY) { 2134 RSU_DPRINTF(sc, RSU_DEBUG_FW | RSU_DEBUG_RESET, 2135 "%s: Firmware already loaded\n", 2136 __func__); 2137 return (0); 2138 } 2139 2140 RSU_UNLOCK(sc); 2141 /* Read firmware image from the filesystem. */ 2142 if ((fw = firmware_get("rsu-rtl8712fw")) == NULL) { 2143 device_printf(sc->sc_dev, 2144 "%s: failed load firmware of file rsu-rtl8712fw\n", 2145 __func__); 2146 RSU_LOCK(sc); 2147 return (ENXIO); 2148 } 2149 RSU_LOCK(sc); 2150 size = fw->datasize; 2151 if (size < sizeof(*hdr)) { 2152 device_printf(sc->sc_dev, "firmware too short\n"); 2153 error = EINVAL; 2154 goto fail; 2155 } 2156 hdr = (const struct r92s_fw_hdr *)fw->data; 2157 if (hdr->signature != htole16(0x8712) && 2158 hdr->signature != htole16(0x8192)) { 2159 device_printf(sc->sc_dev, 2160 "invalid firmware signature 0x%x\n", 2161 le16toh(hdr->signature)); 2162 error = EINVAL; 2163 goto fail; 2164 } 2165 DPRINTF("FW V%d %02x-%02x %02x:%02x\n", le16toh(hdr->version), 2166 hdr->month, hdr->day, hdr->hour, hdr->minute); 2167 2168 /* Make sure that driver and firmware are in sync. */ 2169 if (hdr->privsz != htole32(sizeof(*dmem))) { 2170 device_printf(sc->sc_dev, "unsupported firmware image\n"); 2171 error = EINVAL; 2172 goto fail; 2173 } 2174 /* Get FW sections sizes. */ 2175 imemsz = le32toh(hdr->imemsz); 2176 ememsz = le32toh(hdr->sramsz); 2177 /* Check that all FW sections fit in image. */ 2178 if (size < sizeof(*hdr) + imemsz + ememsz) { 2179 device_printf(sc->sc_dev, "firmware too short\n"); 2180 error = EINVAL; 2181 goto fail; 2182 } 2183 imem = (const uint8_t *)&hdr[1]; 2184 emem = imem + imemsz; 2185 2186 /* Load IMEM section. */ 2187 error = rsu_fw_loadsection(sc, imem, imemsz); 2188 if (error != 0) { 2189 device_printf(sc->sc_dev, 2190 "could not load firmware section %s\n", "IMEM"); 2191 goto fail; 2192 } 2193 /* Wait for load to complete. */ 2194 for (ntries = 0; ntries != 50; ntries++) { 2195 usb_pause_mtx(&sc->sc_mtx, hz / 100); 2196 reg = rsu_read_1(sc, R92S_TCR); 2197 if (reg & R92S_TCR_IMEM_CODE_DONE) 2198 break; 2199 } 2200 if (ntries == 50) { 2201 device_printf(sc->sc_dev, "timeout waiting for IMEM transfer\n"); 2202 error = ETIMEDOUT; 2203 goto fail; 2204 } 2205 /* Load EMEM section. */ 2206 error = rsu_fw_loadsection(sc, emem, ememsz); 2207 if (error != 0) { 2208 device_printf(sc->sc_dev, 2209 "could not load firmware section %s\n", "EMEM"); 2210 goto fail; 2211 } 2212 /* Wait for load to complete. */ 2213 for (ntries = 0; ntries != 50; ntries++) { 2214 usb_pause_mtx(&sc->sc_mtx, hz / 100); 2215 reg = rsu_read_2(sc, R92S_TCR); 2216 if (reg & R92S_TCR_EMEM_CODE_DONE) 2217 break; 2218 } 2219 if (ntries == 50) { 2220 device_printf(sc->sc_dev, "timeout waiting for EMEM transfer\n"); 2221 error = ETIMEDOUT; 2222 goto fail; 2223 } 2224 /* Enable CPU. */ 2225 rsu_write_1(sc, R92S_SYS_CLKR, 2226 rsu_read_1(sc, R92S_SYS_CLKR) | R92S_SYS_CPU_CLKSEL); 2227 if (!(rsu_read_1(sc, R92S_SYS_CLKR) & R92S_SYS_CPU_CLKSEL)) { 2228 device_printf(sc->sc_dev, "could not enable system clock\n"); 2229 error = EIO; 2230 goto fail; 2231 } 2232 rsu_write_2(sc, R92S_SYS_FUNC_EN, 2233 rsu_read_2(sc, R92S_SYS_FUNC_EN) | R92S_FEN_CPUEN); 2234 if (!(rsu_read_2(sc, R92S_SYS_FUNC_EN) & R92S_FEN_CPUEN)) { 2235 device_printf(sc->sc_dev, 2236 "could not enable microcontroller\n"); 2237 error = EIO; 2238 goto fail; 2239 } 2240 /* Wait for CPU to initialize. */ 2241 for (ntries = 0; ntries < 100; ntries++) { 2242 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_IMEM_RDY) 2243 break; 2244 rsu_ms_delay(sc); 2245 } 2246 if (ntries == 100) { 2247 device_printf(sc->sc_dev, 2248 "timeout waiting for microcontroller\n"); 2249 error = ETIMEDOUT; 2250 goto fail; 2251 } 2252 2253 /* Update DMEM section before loading. */ 2254 dmem = __DECONST(struct r92s_fw_priv *, &hdr->priv); 2255 memset(dmem, 0, sizeof(*dmem)); 2256 dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172; 2257 dmem->nendpoints = 0; 2258 dmem->rf_config = 0x12; /* 1T2R */ 2259 dmem->vcs_type = R92S_VCS_TYPE_AUTO; 2260 dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS; 2261#ifdef notyet 2262 dmem->bw40_en = (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) != 0; 2263#endif 2264 dmem->turbo_mode = 1; 2265 /* Load DMEM section. */ 2266 error = rsu_fw_loadsection(sc, (uint8_t *)dmem, sizeof(*dmem)); 2267 if (error != 0) { 2268 device_printf(sc->sc_dev, 2269 "could not load firmware section %s\n", "DMEM"); 2270 goto fail; 2271 } 2272 /* Wait for load to complete. */ 2273 for (ntries = 0; ntries < 100; ntries++) { 2274 if (rsu_read_1(sc, R92S_TCR) & R92S_TCR_DMEM_CODE_DONE) 2275 break; 2276 rsu_ms_delay(sc); 2277 } 2278 if (ntries == 100) { 2279 device_printf(sc->sc_dev, "timeout waiting for %s transfer\n", 2280 "DMEM"); 2281 error = ETIMEDOUT; 2282 goto fail; 2283 } 2284 /* Wait for firmware readiness. */ 2285 for (ntries = 0; ntries < 60; ntries++) { 2286 if (!(rsu_read_1(sc, R92S_TCR) & R92S_TCR_FWRDY)) 2287 break; 2288 rsu_ms_delay(sc); 2289 } 2290 if (ntries == 60) { 2291 device_printf(sc->sc_dev, 2292 "timeout waiting for firmware readiness\n"); 2293 error = ETIMEDOUT; 2294 goto fail; 2295 } 2296 fail: 2297 firmware_put(fw, FIRMWARE_UNLOAD); 2298 return (error); 2299} 2300 2301 2302static int 2303rsu_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2304 const struct ieee80211_bpf_params *params) 2305{ 2306 struct ieee80211com *ic = ni->ni_ic; 2307 struct rsu_softc *sc = ic->ic_softc; 2308 struct rsu_data *bf; 2309 2310 /* prevent management frames from being sent if we're not ready */ 2311 if (!sc->sc_running) { 2312 m_freem(m); 2313 ieee80211_free_node(ni); 2314 return (ENETDOWN); 2315 } 2316 RSU_LOCK(sc); 2317 bf = rsu_getbuf(sc); 2318 if (bf == NULL) { 2319 ieee80211_free_node(ni); 2320 m_freem(m); 2321 RSU_UNLOCK(sc); 2322 return (ENOBUFS); 2323 } 2324 if (rsu_tx_start(sc, ni, m, bf) != 0) { 2325 ieee80211_free_node(ni); 2326 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2327 RSU_UNLOCK(sc); 2328 return (EIO); 2329 } 2330 RSU_UNLOCK(sc); 2331 2332 return (0); 2333} 2334 2335static void 2336rsu_init(struct rsu_softc *sc) 2337{ 2338 struct ieee80211com *ic = &sc->sc_ic; 2339 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2340 uint8_t macaddr[IEEE80211_ADDR_LEN]; 2341 struct r92s_set_pwr_mode cmd; 2342 int error; 2343 int i; 2344 2345 RSU_ASSERT_LOCKED(sc); 2346 2347 /* Init host async commands ring. */ 2348 sc->cmdq.cur = sc->cmdq.next = sc->cmdq.queued = 0; 2349 2350 /* Power on adapter. */ 2351 if (sc->cut == 1) 2352 rsu_power_on_acut(sc); 2353 else 2354 rsu_power_on_bcut(sc); 2355 2356 /* Load firmware. */ 2357 error = rsu_load_firmware(sc); 2358 if (error != 0) 2359 goto fail; 2360 2361 /* Enable Rx TCP checksum offload. */ 2362 rsu_write_4(sc, R92S_RCR, 2363 rsu_read_4(sc, R92S_RCR) | 0x04000000); 2364 /* Append PHY status. */ 2365 rsu_write_4(sc, R92S_RCR, 2366 rsu_read_4(sc, R92S_RCR) | 0x02000000); 2367 2368 rsu_write_4(sc, R92S_CR, 2369 rsu_read_4(sc, R92S_CR) & ~0xff000000); 2370 2371 /* Use 128 bytes pages. */ 2372 rsu_write_1(sc, 0x00b5, 2373 rsu_read_1(sc, 0x00b5) | 0x01); 2374 /* Enable USB Rx aggregation. */ 2375 rsu_write_1(sc, 0x00bd, 2376 rsu_read_1(sc, 0x00bd) | 0x80); 2377 /* Set USB Rx aggregation threshold. */ 2378 rsu_write_1(sc, 0x00d9, 0x01); 2379 /* Set USB Rx aggregation timeout (1.7ms/4). */ 2380 rsu_write_1(sc, 0xfe5b, 0x04); 2381 /* Fix USB Rx FIFO issue. */ 2382 rsu_write_1(sc, 0xfe5c, 2383 rsu_read_1(sc, 0xfe5c) | 0x80); 2384 2385 /* Set MAC address. */ 2386 IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 2387 rsu_write_region_1(sc, R92S_MACID, macaddr, IEEE80211_ADDR_LEN); 2388 2389 /* It really takes 1.5 seconds for the firmware to boot: */ 2390 usb_pause_mtx(&sc->sc_mtx, (3 * hz) / 2); 2391 2392 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting MAC address to %s\n", 2393 __func__, 2394 ether_sprintf(macaddr)); 2395 error = rsu_fw_cmd(sc, R92S_CMD_SET_MAC_ADDRESS, macaddr, 2396 IEEE80211_ADDR_LEN); 2397 if (error != 0) { 2398 device_printf(sc->sc_dev, "could not set MAC address\n"); 2399 goto fail; 2400 } 2401 2402 rsu_write_1(sc, R92S_USB_HRPWM, 2403 R92S_USB_HRPWM_PS_ST_ACTIVE | R92S_USB_HRPWM_PS_ALL_ON); 2404 2405 /* Set PS mode fully active */ 2406 memset(&cmd, 0, sizeof(cmd)); 2407 cmd.mode = R92S_PS_MODE_ACTIVE; 2408 RSU_DPRINTF(sc, RSU_DEBUG_RESET, "%s: setting ps mode to %d\n", 2409 __func__, cmd.mode); 2410 error = rsu_fw_cmd(sc, R92S_CMD_SET_PWR_MODE, &cmd, sizeof(cmd)); 2411 if (error != 0) { 2412 device_printf(sc->sc_dev, "could not set PS mode\n"); 2413 goto fail; 2414 } 2415 2416#if 0 2417 if (ic->ic_htcaps & IEEE80211_HTCAP_CBW20_40) { 2418 /* Enable 40MHz mode. */ 2419 error = rsu_fw_iocmd(sc, 2420 SM(R92S_IOCMD_CLASS, 0xf4) | 2421 SM(R92S_IOCMD_INDEX, 0x00) | 2422 SM(R92S_IOCMD_VALUE, 0x0007)); 2423 if (error != 0) { 2424 device_printf(sc->sc_dev, 2425 "could not enable 40MHz mode\n"); 2426 goto fail; 2427 } 2428 } 2429 2430 /* Set default channel. */ 2431 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2432#endif 2433 sc->sc_scan_pass = 0; 2434 usbd_transfer_start(sc->sc_xfer[RSU_BULK_RX]); 2435 2436 /* We're ready to go. */ 2437 sc->sc_running = 1; 2438 return; 2439fail: 2440 /* Need to stop all failed transfers, if any */ 2441 for (i = 0; i != RSU_N_TRANSFER; i++) 2442 usbd_transfer_stop(sc->sc_xfer[i]); 2443} 2444 2445static void 2446rsu_stop(struct rsu_softc *sc) 2447{ 2448 int i; 2449 2450 sc->sc_running = 0; 2451 sc->sc_calibrating = 0; 2452 taskqueue_cancel_timeout(taskqueue_thread, &sc->calib_task, NULL); 2453 2454 /* Power off adapter. */ 2455 rsu_power_off(sc); 2456 2457 for (i = 0; i < RSU_N_TRANSFER; i++) 2458 usbd_transfer_stop(sc->sc_xfer[i]); 2459} 2460 2461static void 2462rsu_ms_delay(struct rsu_softc *sc) 2463{ 2464 usb_pause_mtx(&sc->sc_mtx, hz / 1000); 2465} 2466